US 6,456,620 B1Grant

Method and apparatus for constructing a latin square matrix for network communication

Issue Date:2002-09-24

•30 Claims

•12 Drawing Sheets

Abstract

Disclosed is a method for all-to-all personalized exchange for a class of multistage interconnecting networks (MINs). The method is based on a Latin square matrix corresponding to a set of admissible permutations of a multistage interconnecting network. Disclosed are first and second methods for constructing a Latin square matrix used in the personalized exchange technique. Also disclosed is a generic method for decomposing all-to-all personalized exchange patterns into admissible permutations to form the Latin square matrix for self-routing networks which are a subclass of the MINs.

Metadata

Assignees

Verizon Laboratories Inc.
The University of Vermont

Inventors

Jianchao Wang
Yuanyuan Yang

Application Information

Application Number:US 09/251,562

Filing Date:1999-02-17

Priority Date:1999-02-17

Art Unit:7

Classifications

IPC:

H04L 1228H04L 1256G06F 1500G06F 1576

Field of Search:

3703883703903703893703513704223704083703743704133704183953253958003952000239520013395200153952002395428395429712 11712 12712 18712 13

Patent Drawings (12 sheets)

Description

Background of the Invention

[0003] This application generally relates to networks, and more specifically to communications in a network.

[0004] Collective communication generally involves global data movement and global control among a group of nodes in a network. Many scientific applications exhibit the need of such collective communication patterns. For example, efficient support for collective communication may significantly reduce communication latency and simplify the programming of parallel computers. Collective communication has received much attention in telecommunication and parallel processing in recent years.

[0005] All-to-all communication is one type of collective communication. In all-to-all communication, every node in a group sends a message to each other node in the group. Depending on the nature of the message to be sent, all-to-all communication can be further classified as all-to-all broadcast and all-to-all personalized exchange. In all-to-all broadcast, every node sends the same message to all other nodes. In all-to all personalized exchange, every node sends a distinct message to every other node. All-to-all broadcast and all-to-all personalized exchange may be used in networking and parallel computational applications. For example, all-to-all broadcasting may be used in performing matrix multiplication, LU-factorization, and Householder transformations. All-to-all personalized exchange may be used, for example, in performing matrix transposition and fast Fourier transforms (FFTs).

[0006] Techniques for all-to-all personalized exchange have been considered in different types of networks. A first class of techniques is used in a high-dimensional network type, such as the hypercube. One drawback of using the first class of techniques in a high-dimensional network type is the poor scalability due to the unbounded node degrees of the high-dimensional network topology.

[0007] A second class of techniques have been developed for use in mesh and torus networks. These techniques have an advantage over the first techniques in that these network types have bounded node degrees and are more scalable. However, these second techniques used in the mesh and torus networks have a drawback in that long communications delays may be experienced in all-to-all personalized exchange due to the network topology.

[0008] Thus, there is required a technique for performing all-to-all personalized exchanges which is scalable while simultaneously seeking to minimize communication delays.

Brief Description of the Drawings

[0009] The above-mentioned and other features of the invention will now become apparent by reference to the following description taken in connection with the accompanying drawings in which:

[0010] FIG. 1 is an embodiment of a computer system according to the present invention;

[0011] FIGS. 2A-2C are block diagrams of example types of multistage interconnection networks;

[0012] FIG. 3 is a block diagram of an embodiment of an 8×8 baseline network;

[0013] FIGS. 4A and 4B are flowcharts depicting method steps of an embodiment of performing an all-to-all personalized exchange method in a multistage interconnection network;

[0014] FIG. 5 is an example of an illustration of a basic permutation for an 8×8 mapping;

[0015] FIG. 6A is a flowchart depicting method steps of an embodiment for mapping numbers using basic permutations;

[0016] FIG. 6B is an example illustration of applying the method steps of FIG. 6A;

[0017] FIG. 7 is a flowchart depicting method steps of an embodiment of constructing a Latin square matrix;

[0018] FIG. 8 is a flowchart depicting method steps of an embodiment of a second method of constructing a Latin square matrix;

[0019] FIG. 9A depicts the various steps of transforming a number zero using a basic permutation list;

[0020] FIG. 9B is an example of an 8×8 Latin square matrix;

[0021] FIGS. 10A-10H are block diagrams of an embodiment of switch settings for an 8×8 baseline network;

[0022] FIGS. 11A-11H are block diagrams of an embodiment of switch settings for an 8×8 omega network; and

[0023] FIGS. 12A-12H are block diagrams of an embodiment of switch settings in an 8×8 indirect binary n-cube network.

Summary of the Invention

[0024] In accordance with one aspect of the invention, a method, system, and computer program product for constructing a Latin-square matrix are presented. Basic permutations are calculated. A permutation set is calculated using the basic permutations. A list of numbers a₀, a₁, . . . a_n−1is defined such that {a₀, a₁, . . . a_n−1}={0, 1, . . . n−1}. Each entry of the Latin-square matrix is calculated as follows:

[\begin{matrix} a_{0} & a_{1} & a_{2} & \dots & a_{n - 1} \\ ρ_{1} (a_{0}) & ρ_{1} (a_{1}) & ρ_{1} (a_{2}) & \dots & ρ_{1} (a_{n - 1}) \\ ρ_{2} (a_{0}) & ρ_{2} (a_{1}) & ρ_{2} (a_{2}) & \dots & ρ_{2} (a_{n - 1}) \\ ⋮ & ⋮ & ⋮ & ⋮ & ⋮ \\ ρ_{n - 1} (a_{0}) & ρ_{n - 1} (a_{1}) & ρ_{n - 1} (a_{2}) & \dots & ρ_{n - 1} (a_{n - 1}) \end{matrix}]

[0025] In accordance with another aspect of the invention, a method, system, and computer program product for constructing a matrix in which no two entries in a row and a column are equivalent are presented. The matrix is an n-dimensional square matrix. A list of “n” elements is provided in which each element is a number. A list of basic permutations is built. Each basic permutation is a function providing a mapping of a first one of the elements to a second one of the elements. Given a first row of the matrix, successive rows of the matrix are built using the immediately prior row of the matrix and the functions defined by the basic permutations.

[0026] In accordance with yet another aspect of the invention, a method, system, and computer program product for constructing a Latin-square matrix for use in network communication is presented. The nodes communicate using a multistage interconnection network. A list of “n” elements is provided in which each element is a number. A list of basic permutations is built in which each basic permutation is a function providing a mapping of a first one of the elements to a second one of the elements. Given a first row of the matrix, successive rows of the matrix are built in which each row is produced using the immediately prior row of the matrix and the functions defined by the basic permutations.

[0027] The Latin square matrix constructed may be used in performing all-to-all communications in a multistage interconnection network. At particular times, distinct messages are sent between nodes of the network in accordance with the Latin square matrix.

[0028] Thus there is described a technique for use in performing all-to-all personalized exchanges which is scalable while simultaneously seeking to minimize communication delays.

Detailed Description of the Preferred Embodiment

[0029] Referring now to FIG. 1, shown is an embodiment of a processor with nodes communicating using a multistage interconnection network (MIN) 20. Within this example of a computer system 10 shown are processor nodes P₀through P_n−1labeled 12-14. Conventional processors may be used in a preferred embodiment although the type of processor best suited for use may vary depending on particularities of a preferred embodiment and its application. These processor nodes communicate through the MIN 20. A processor node 12 provides an input I₀into the MIN 20, and receives an output O₀from the MIN 20. Similarly processor nodes P₁through P_n−1provide inputs and receive outputs from the MIN 20. Generally the MIN 20 is used for interprocess communication between nodes P₀through P_n−1as needed, for example, in performing parallel processing applications in the computer system 10.

[0030] Generally, the MIN 20 of computer system 10 can be chosen from a variety of networks, such as crossbar, Clos, Benes, baseline, omega, indirect binary n-cube. Although generally any MIN may be used for interprocess communication in a computer system 10 as depicted in FIG. 1, a preferred embodiment of the invention may also include those MIN networks which are members of a class of self-routing networks containing a unique path between each input/output pair in the network. Networks such as baseline, omega, and indirect binary n-cube, for example, are members of the class of self-routing networks. Other MIN network types such as the crossbar, Clos, and Benes network are not members of the self-routing network class. Although the crossbar and Clos network both can realize all possible permutations between network input and outputs, and have a constant communication latency, the network cost associated with the hardware of an n×n crossbar and a three-stage Clos network are O(n²) and O(n^{{fraction (3/2)}}), respectively, which are generally considered too high for large systems, for example, such as computer system 10 with many processor nodes. A Benes network which has a network cost of O(n log n) may also realize all permutations, but not all permutations may be easily routed through the network and some rearrangements of existing connections may be needed. In addition, the Benes network may also be viewed as a concatanation of a baseline network and a reverse baseline network with the center stages overlapped. The Benes network typically has a network cost as well as the communication latency of approximately twice those of a baseline type of network.

[0031] The hardware for implementing the MIN 20 is straightforward to one skilled in the art given the description in text which follows. Generally, a MIN may include multistage switching elements.

[0032] Thus, a preferred embodiment of the invention may include any MIN network, or a specific type of MIN network, the self-routing network, such as a baseline, rather than non-self-routing networks, such as a Clos or Benes network. Although self-routing networks generally realize a proper subset of permutations of inputs and outputs, realization of a full permutation capability is not necessary in an all-to-all personalized exchange. It should be noted that the class of self-routing networks may prove to be a better choice in a particular preferred embodiment of the invention than non-self-routing networks.

[0033] In the paragraphs that follow, first presented is a generalized method for performing all-to-all communications using a MIN network. Subsequently, two methods for generating a Latin square matrix used in the generalized method of all-to-all communications are presented. A generic technique for generating Latin square matrices for use with self-routing networks is also disclosed. Generally, as will become apparent from the following descriptions, using a MIN facilitates interprocess communication over prior art approaches due to the shorter communication latency and better scalability.

[0034] It should generally be noted that the computer system 10 of FIG. 1 is only one embodiment of interprocess communication that may be used with the invention. Additionally, the processor 10 of FIG. 1 can include any number of nodes to facilitate any one of a variety of other uses such as, for example, parallel computing within the computer system 10.

[0035] Shown in FIGS. 2A-2C are three types of multistage interconnection networks that may be used in a preferred embodiment of the MIN in the computer system 10 of FIG. 1. As known to those skilled in the art, FIG. 2A shows a baseline network, FIG. 2B shows an omega network, and FIG. 2C shows an indirect binary n-cube network. In the example shown in FIGS. 2A-2C, an 8×8 network is illustrated. In particular, the “8×8” refers to the number of inputs and outputs, respectively, in and out of the network. As known to those skilled in the art, a typical network structure for the class of MINs has “n” equal to “₂m” inputs and outputs and to “log (n)=m” stages, with each stage consisting of {fraction (n/2)}, 2×2 switches, and any two adjacent stages connected by n-interstage links.

[0036] A permutation is a one-to-one mapping between the network inputs and outputs, as in FIGS. 1 and 2A-2C. For an n×n network, suppose there is a one-to-one mapping ρ which maps input i to output a_i(i.e. ρ(i)=a_i), where a_iε{0, 1, . . . , n−1} for 0≦i≦n−1, and a_i≠a_jfor i≠j.

[0037] Let

ρ = (\begin{matrix} 0 & 1 & \dots & n - 1 \\ a_{0} & a_{1} & \dots & a_{n - 1} \end{matrix})

[0038] denote this permutation. In particular, when ρ(i)=i for 0≦i≦n−1, this permutation is referred to as an identity permutation and denoted as I.

[0039] Some properties and notations of permutations which will be used in following paragraphs are now noted. Given two permutations ρ₁and ρ₂, a composition ρ₁ρ₂of the two permutations is also a permutation, which maps i to ρ₁(ρ₂(i)). Clearly, ρ₁=Iρ=ρ, but in general ρ₁ρ₂≠ρ₂ρ₁. However, the associative law does apply here. That is, ρ₁(ρ₂ρ₃)=(ρ₁ρ₂)ρ₃. Let ρⁱdenote the composition of i permutations ρ's. Also, if ρ₁ρ₂=I, ρ₁is the inverse of ρ₂and vice versa. This is denoted as ρ₁=ρ₂⁻¹and ρ₂=ρ₁⁻¹. A permutation can also be expressed as a cycle or composition of several cycles. For example, in a 4×4 mapping, a cycle (0, 3, 2) represents a permutation in which 0, 3, and 2 are mapped to 3, 2, and 0, respectively, while 1 is kept unchanged. In addition, for representational convenience, the following notation is used to represent a mapping ρ(a)=b

a \overset{ρ}{\to} b

[0040] In the context of a MIN, each stage in the network can be viewed as a shorter n×n network, and so does each set of interstage links. Let σ_i(0≦i≦m−1) denote the permutation represented by stage i, and π_i(0≦i≦m−2) denote the permutation represented by the set of interstage links between stage i and stage i+1. The permutation σ_iis referred to as stage permutation, the permutation φ_ias an interstage permutation, and the permutation realized by the entire multistage interconnection network as an admissible permutation of the network. Clearly, an admissible permutation can be expressed by a composition of stage permutations and interstage permutations. For example, the admissible permutation of a baseline network can be expressed as

[0041] σ_m−1π_m−2. . . π₀σ₀ (1)

[0042] In general, interstage permutations π_i's are fixed by the network topology. For a baseline network, suppose the binary representation of a number aε{0, 1, . . . , n−1} is P_m−1P_m−2. . . P₁P₀. Then the permutation π_irepresents the following mapping:

\begin{matrix} p_{m - 1} p_{m - 2} \dots p_{1} p_{0} \overset{π_{i}}{\to} p_{m - 1} p_{m - 2} \dots p_{m - i} p_{0} p_{m - i - 1} \dots p_{2} p_{1} & (2) \end{matrix}

[0043] This mapping corresponds to a 1-bit circular-right-shift among the m−i least significant bits while keeping the i most significant bits unchanged.

[0044] However, stage permutation σ_i's are not fixed since each switch can be set to either parallel or cross. Thus σ_ican be a composition of any subset of cycles {(0, 1), (2, 3), . . . , (n−1, n)}, which implies that there are a total of 2^{{fraction (n/2)}} possible choices for each σ_i. It follows that by (1) the number of all admissible permutations of a baseline network is (2{fraction (n/2)})^{log n}=n^{{fraction (n/2)}}. This also holds for other networks with a similar structure, such as omega and indirect binary n-cube, shown in FIGS. 2B and 2C, respectively.

[0045] Referring now to FIG. 3, shown is a routing example of an 8×8 baseline network. Recall that FIG. 2A set forth an embodiment of an example baseline network, as used now in FIG. 3. In the MIN 20 of FIG. 3, there are stage permutations σ₀=(2, 3), σ₁=(0, 1)(4, 5), and σ₂=(0, 1) (2, 3) (4, 5) (6, 7), and interstage permutations (in both binary and decimal).

π_{0} = (\begin{matrix} 000 & 001 & 010 & 011 & 100 & 101 & 110 & 111 \\ 000 & 100 & 001 & 101 & 010 & 110 & 011 & 111 \end{matrix}) = (\begin{matrix} 0 & 1 & 2 & 3 & 4 & 5 & 6 & 7 \\ 0 & 4 & 1 & 5 & 2 & 6 & 3 & 7 \end{matrix})

π_{1} = (\begin{matrix} 000 & 001 & 010 & 011 & 100 & 101 & 110 & 111 \\ 000 & 010 & 001 & 011 & 100 & 110 & 101 & 111 \end{matrix}) = (\begin{matrix} 0 & 1 & 2 & 3 & 4 & 5 & 6 & 7 \\ 0 & 2 & 1 & 3 & 4 & 6 & 5 & 7 \end{matrix})

[0046] For input 0, the following transformation is obtained:

0 \overset{σ_{0}}{\to} 0 \overset{π_{0}}{\to} 0 \overset{σ_{1}}{\to} 1 \overset{π_{1}}{\to} 2 \overset{σ_{2}}{\to} 3

[0047] that is,

0 \overset{σ_{2} π_{1} σ_{1} π_{0} σ_{0}}{\to} 3

[0048] After computing the transformation for every input, the overall permutation obtained for the switch settings in the network is:

σ_{2} π_{1} σ_{1} π_{0} σ_{0} = (\begin{matrix} 0 & 1 & 2 & 3 & 4 & 5 & 6 & 7 \\ 3 & 7 & 5 & 1 & 0 & 4 & 2 & 6 \end{matrix})

[0049] An embodiment, as shown in FIG. 1, is used in all-to-all personalized exchange in a MIN of log-n stages. In following paragraphs, first discussed is the lower bound on the communication time for all-to-all personalized exchange in such a network, and then proposed is a technique for realizing all-to-all personalized exchange.

[0050] The following lemma concerns the lower bound on the maximum communication delay of all-to-all personalized exchange in a MIN.

[0051] Lemma 1 The maximum communication delay of all-to-all personalized exchange in an n×n network of log n stages is at least Ω(n+log n).

[0052] Proof. The lemma holds because each processor must receive one message from all other n−1 processors, which takes Ω(n) time, and each message must go through log n stages from its source processor to its destination processor, which takes Ω(log n) time.

[0053] A Latin square is defined as an n×n matrix

[\begin{matrix} a_{0, 0} & a_{0, 1} & \dots & a_{0, n - 1} \\ a_{1, 0} & a_{1, 1} & \dots & a_{1, n - 1} \\ ⋮ & ⋮ & ⋮ \\ a_{n - 1, 0} & a_{n - 1, 1} & \dots & a_{n - 1, n - 1} \end{matrix}]

[0054] in which the entries a_i,jare numbers in {0, 1, 2, . . . , n−1} and no two entries in a row (or a column) have the same value. A Latin square may be described equivalently in a different way: for all i and j, 0≦j, 0≦i, j≦n−1, the entries of each row in the matrix, a_i,0, a_i,1, . . . , a_i,n−1, form a permutation

(\begin{matrix} 0 & 1 & 2 & \dots & n - 1 \\ a_{i, 0} & a_{i, 1} & a_{i, 2} & \dots & a_{i, n - 1} \end{matrix})

[0055] and the entries of each column in the matrix, a_0,j, a_1,j, . . . , a_n−1,j, also form a permutation

(\begin{matrix} 0 & 1 & 2 & \dots & n - 1 \\ a_{0, j} & a_{1, j} & a_{2, j} & \dots & a_{n - 1, j} \end{matrix})

[0056] Two Latin squares are equivalent if one can be transformed into another by swapping rows of its matrix. This concept is useful when considering different approaches to constructing a Latin square.

[0057] Generally, for a MIN under consideration, there exists a Latin square such that any permutation formed by each row of the matrix is admissible to the network. An all-to-all personalized exchange method (ATAPE) may be designed which is generic for the class of multistage interconnection networks (MINs). For simplicity in describing this embodiment, it is assumed that every message has the same length so that the message transmission at each stage is synchronized. Although this is true for the embodiment described herein, other preferred embodiments may have messages of differing length. A higher-level description of the ATAPE method is given in Table I in following text with corresponding method steps in FIGS. 4A and 4B.

[0058] Referring now to FIGS. 4A and 4B, shown are example method steps for performing all-to-all personalized exchange within the class of MINs. Generally, as previously described, the all-to-all personalized exchange method is a method for sending distinct messages from each processor to each other processor, for example, as in the computer system 10 of FIG. 1. As indicated at step 40, method steps 44-52 are performed by each processor, in parallel, for all processors, j, 0≦j≦n−1. Control proceeds to step 44 where a loop control variable i is initialized to 0. After step 44, control proceeds to step 46 where, for each a_ijin the Latin square matrix, a distinct personalized message is prepared to be sent from processor j to the processor denoted by the entry into the matrix a_ij. Control proceeds to step 48 where the message is inserted into processor j's outgoing message queue. Control proceeds to step 50 where the local variable i is incremented by 1. Control proceeds to step 52 where a determination is made as to whether or not i is less than or equal to n−1. If a determination is made at step 52 that i is less than or equal to n−1, control proceeds back to step 46 where steps 46, 48, and 50 are again repeated until i reaches the quantity n. Note that steps 44, and the loop formed by steps, 46, 48, 50 and 52 are performed in parallel by each processor.

[0059] If a determination is made at step 52 that i is not less than or equal to the quantity of n−1, to control proceeds to step 60 of FIG. 4B. As indicated at step 60, another set of steps, 62-68, are performed in parallel by each processor similar to those steps 44-52. At step 62, a local variable i is initialized to 0. At step 64, for the message with destination address a_i,jin processor j's outgoing message queue, the message is sent to processor a_ijthrough input j of the network. Subsequently, at step 66 the local variable i is incremented by 1. At step 68 a determination is made as to whether or not the quantity represented by i is less than or equal to the quantity of n−1. If a determination is made at step 68 that i is less than or equal to n−1, control proceeds to step 64. Steps 64 and 66 are repeated until the quantity represented by i is not less than or equal to n−1. When a determination is made at step 68 that i is not less than or equal to n−1, control proceeds to step 72 where the process depicted by FIGS. 4A and 4B terminates.

[0060] Table I: All-to-all personalized exchange method for a class of multistage interconnection networks


Method ATAPE
begin

[0061] In the foregoing Table I, the method steps depicted by ATAPE are represented in previously described FIGS. 4A and 4B. Generally, in method ATAPE, processor j sends distinct messages to all destinations in the order of a_0,j, a_1,j, . . . , a_n−1,j, which corresponds to the column j of the Latin square. Generally, for method ATAPE in time frame i, all n processors send their messages simultaneously to destinations a_i,0, a_i,1, . . . , a_i,n−1, an which corresponds to the row i of the Latin square. In method ATAPE, all-to-all personalized exchange is achieved by realizing n permutations which correspond to the n rows of the Latin square, under the assumption that each permutation represented by a row of the Latin square is admissible to the network.

[0062] Note that, as previously described, a preferred embodiment may include a MIN which is self-routing. In this instance, the sequential steps of 2.1 may be performed in a pipelined fashion. This achieves a form of parallelism since two messages entering from two inputs of a switch may pass the switch simultaneously without any conflicts. Subsequently, once the previous n messages leave the switches of the current stage, the next n messages can enter the switches of this stage. Therefore, for self-routing networks, the time complexities of Step 1 and Step 2 are O(n) and O(n+log n), respectively. The total time delay for the all-to-all personalized exchange technique in self-routine networks is generally O(n+log n).

[0063] In the following text, described are methods for constructing the Latin square matrix as used in the all-to-all personalized exchange methods of FIGS. 4A and 4B previously described.

[0064] In following paragraphs, general terms and notation used throughout the application is described. Additionally, first and second methods for constructing a Latin square matrix, or Latin square, are set forth. It should be noted that although two methods are described herein, other methods known to those skilled in the art may also be used to construct a Latin square matrix that may be used, for example, in performing the methods steps of FIGS. 4A and 4B for network communications.

[0065] Defined is a set of basic permutations used for constructing a Latin square. For an n×n mapping, where n=2^m, m basic permutations φ_i(1≦i≦m) are defined as follows. Let the binary representation of a number aε{0, 1, . . . , n−1} be P_m−1P_m−2. . . P₁P₀. Then

\begin{matrix} p_{m - 1} p_{m - 2} \dots p_{i} p_{i - 1} p_{i - 2} \dots p_{1} p_{0} \overset{φ_{i}}{\to} p_{m - 1} p_{m - 2} \dots p_{i} {\overline{p}}_{i - 1} p_{i - 2} \dots p_{1} p_{0} & (3) \end{matrix}

[0066] The permutation φ_iis actually the operation flipping the i^thbit of a binary number. φ_imay also be expressed as a composition of {fraction (n/2)} 2-cycles. For example, the three basic permutations for n=8 are

φ_{1} = (0, 1) (2, 3) (4, 5) (6, 7)

φ_{2} = (0, 2) (1, 3) (4, 6) (5, 7)

φ_{3} = (0, 4) (1, 5) (2, 6) (3, 7)

[0067] Referring now to FIG. 5, shown is a pictorial representation of the foregoing permutations φ₁, φ₂, and φ₃.

[0068] Referring now to FIG. 6A, shown are steps of one method for mapping numbers using the basic permutation. The mapping of n numbers 0, 1, 2, . . . , n−1 by the basic permutation φ_i(1≦i≦m=log n) is performed as follows. Divide the entire segment containing all n numbers into 2^m−j+1subsegments with each subsegment containing 2ⁱ⁻¹consecutive numbers, as at step 80. Starting from subsegment 0, group each two consecutive subsegments into a pair, as in step 84. Subsequently, as in step 88, swap two subsegments in each pair. As an example of applying these method steps of FIG. 6A, consider φ₂of FIG. 5. Divide eight numbers into four subsegments: ∥0, 1∥, ∥2, 3∥, ∥4, 5∥ and ∥6, 7∥. Then, swap the first pair of consecutive subsegments it ∥0, 1∥ and ∥2, 3∥, and also swap the second pair of consecutive subsegments ∥4, 5∥ and ∥6, 7∥. Thus, φ₂maps 0, 1, 2, 3, 4, 5, 6, 7 respectively to 2, 3, 0, 1, 6, 7, 4, 5.

[0069] Referring now to FIG. 6B, shown is an example illustration of applying the method steps of FIG. 6A.

[0070] Prior to a description of using the basic permutations in constructing Latin squares, some relevant properties of basic permutations are described.

[0071] Lemma 2 The set of basic permutations φ_i(1≦i≦m) defined in (3) has the properties that the composition of any two basic permutations is exchangeable, and the composition of two identical basic permutations equals the identity permutation. That is,

[0072] φ_iφ_j=φ_jφ_i, for 1≦i, j≦m (4)

[0073] and

[0074] φ_iφ_i=1, for 1≦i≦m (5)

[0075] Proof. The exchangeability (4) may be determined from the definition of the basic permutations. Generally, any binary number P_m−1P_m−2 . . . P_i−1 . . . P₁P₀may be mapped to P_m−2. . . P_i−1. . . P₁P₀may be mapped to P_m−1P_m−2. . . {overscore (P)}_i−1. . . {overscore (P)}_j−1P₁P₀by either permutation φ_iφ_jor permutation φ_jφ_i.

[0076] Similarly, equation (5) holds true because applying the composition of two φ_i's implies first flipping the i^thbit and then flipping it back.

[0077] Both properties in Lemma 2 will be relevant to later text.

[0078] The construction of a Latin square by using the basic permutations is now discussed.

[0079] Given m basic permutations φ₁, φ₂, . . , φ_m, a permutation set is constructed of compositions of basic permutations as follows

[0080] Ψ={φ_iφ_i. . . φ_i|m≧i₁≧ . . . ≧i_k≧1 and m≧k≧1} (6)

[0081] For example, for n=8 there are

[0082] Ψ={φ₁, φ₂, φ₃, φ₂φ₁, φ₃φ₁, φ₃φ₂, φ₃φ₂φ₁}

[0083] Based on the properties (4) and (5) in Lemma 2, any composition of one or more basic permutations equals one of the permutations in Ψ. For example, take the composition φ₁φ₂φ₁. Since

[0084] φ₁φ₂φ₁=(φ₁φ₂)φ₁=(φ₂φ₁)φ₁=φ₂(φ₁φ₁)=φ₂1=φ₂,

[0085] this composition equals φ₂which belongs to Ψ.

[0086] Generally, in Ψ there are (₁^m) permutations which are composed of one basic permutation,(₂^m) permutations which are composed of two basic permutations, and so on. Since

(\begin{matrix} m \\ 1 \end{matrix}) + (\begin{matrix} m \\ 2 \end{matrix}) + \dots + (\begin{matrix} m \\ m \end{matrix}) = 2^{m} - 1 = n - 1

[0087] it follows that |Ψ|=n−1.

[0088] Based on the permutation set Ψ Latin squares may be constructed as described in the following theorem.

[0089] Theorem 1 Let ρ₁, ρ₂, . . . , ρ_n−1be the n−1 permutations in Ψ, and a₀, a₁, . . . , a_n−1be a list of numbers such that {a₀, a₁, . . . , a_n−1}={0, 1, . . . , n−1}. Then the following matrix is a Latin square.

\begin{matrix} [\begin{matrix} a_{0} & a_{1} & a_{2} & \dots & a_{n - 1} \\ ρ_{1} (a_{0}) & ρ_{1} (a_{1}) & ρ_{1} (a_{2}) & \dots & ρ_{1} (a_{n - 1}) \\ ρ_{2} (a_{0}) & ρ_{2} (a_{1}) & ρ_{2} (a_{2}) & \dots & ρ_{2} (a_{n - 1}) \\ ⋮ & ⋮ & ⋮ & ⋮ & ⋮ \\ ρ_{n - 1} (a_{0}) & ρ_{n - 1} (a_{1}) & ρ_{n - 1} (a_{2}) & \dots & ρ_{n - 1} (a_{n - 1}) \end{matrix}] & (7) \end{matrix}

[0090] Proof. Since {a₀, a₁, . . . , a_n−1}={0, 1, . . . , n−1} and each ρ_iis a permutation, then the set of numbers in the i^throw of the matrix, {ρ_i(a₀), ρ_i(a₁), . . . , ρ_i(a_n−1)}={0, 1, . . . , n−1}. That is, each row of the matrix forms a permutation.

[0091] Now consider the set of numbers in the j^thcolumn of the matrix, {a_j,ρ₁(a_j), ρ₂(a_j), . . . , ρ_n−1(a_j)}. By the definition of Ψ in (6) and the definition of φ_iin (3), given a ρ_i, say, ρ_i=φ₄φ₂φ₁, then ρ_i(a_j) is the number obtained by flipping bit 4, bit 2 and bit 1 of the binary representation of number a_j. Generally, since ρ₁, ρ₂, . . . , ρ_n−1represent permutations which may flip the bits of a number in all possible ways, a_j, ρ₁(a_j), ρ₂(a_j), . . . . . , ρ_n−1(a_j) together cover the numbers in {0, 1, . . . , n−1}. Thus, the column of the matrix also forms a permutation. Hence, the matrix is a Latin square.

[0092] Referring now to FIG. 7, shown is an example of an embodiment of the method steps of a first method for constructing a Latin square matrix. In other words, the flowchart steps of FIG. 7 summarize that method which has just been described using equations 6 and 7 to produce a Latin square matrix. In step 100, the basic permutations, φ_is, are calculated for i from 1 to m where m=log n. Recall that n is the dimension of the rows and columns in our n×n matrix and our n×n network. In step 104, Ψ is calculated using Equation 6. In step 108 the Latin square matrix is constructed with entries as defined using Equation 7 from Theorem 1.

[0093] The foregoing method for construction of a Latin square is generally useful in mathematically proving the existence of a Latin square for the MINs. However, the time complexity of generating a Latin square using this first technique may be quite high since each permutation in Ψ may contain up to m basic permutations. Therefore a second alternate method for constructing a Latin square matrix will now be described. The first technique generally has a greater time complexity than the second technique which will now be described.

[0094] The general technique of the second method for constructing a Latin square matrix will now be described. Referring now to FIG. 8, shown are the method steps of a second embodiment for constructing a Latin square matrix. At step 110, a permutation of the n elements a₀. . . a_n−1is provided. Generally, as previously described, each of the elements a₀. . . a_n−1corresponds to one of the processor nodes in the computer system 10, as in FIG. 1. In the next step 112, a list of basic permutations is built. Each of the basic permutations, as previously described, is a function providing a mapping of one of the processor nodes to another processor node. In this particular instance the list of basic permutations generates a list whose right-most bits form a Gray code sequence. This will be described in more detail in following text. At step 114, the first row of the Latin square matrix is constructed using the original permutation list as provided in step 110. The method proceeds to step 116 where successive rows of the Latin square matrix are built using the immediately preceding row and the basic permutation list. The basic permutations, for example at step 116, provide a mapping of a current row of the Latin square matrix to an immediately successive row of the Latin square matrix.

[0095] Generally, the method steps depicted in FIG. 8 construct a Latin square matrix in a row-by-row iterative fashion in the sense that the current row is obtained by applying a basic permutation in the list to a previously generated row. Details of each of these previously described steps of FIG. 8 are described in text which follows. It should be noted that since there are a total of n−1 basic permutations in the list and each of them is applied to n entries of a row, the time complexity of the construction of this method is of O(n²).

[0096] Following is Table II which contains a pseudo-code type description of the second technique for producing a Latin square matrix, as generally described in conjunction with FIG. 8.

TABLE II

The construction of a Latin square matrix

[0097] Following is a proof that this second technique produces a Latin square matrix.

[0098] Theorem 2 The matrix constructed by the method of Latin square in Table II is a Latin square.

[0099] Proof. First to be shown is that the number of basic permutations generated by function BuildBasicList (k) is 2^k−1 so that there are 2^m−1=n−1 basic permutations in the list passed to function BuildLatinSquare in main program LatinSquare. Let this number be P(k), then the following recurrence can be established as

[0100] P(k)=2P(k−1)+1 and P(1)=1 (8)

[0101] The solution to the recurrence of equation (8) is 2^k−1.

[0102] The LatinSquare method of Table II generates an n×n matrix by applying the basic permutation list to the original row, a₀, a₁, . . . , a_n−1, in an iterative way. To prove the matrix generated is a Latin square, first focus on the case of applying the basic permutation list to a number a_jiteratively. The first permutation in the list is applied to number a_jto obtain a new number. Subsequently, the second permutation is applied to this new number to obtain another number; and so on. After exhausting the basic permutations in the list, a list of numbers is obtained which forms a column of the matrix.

[0103] Now described is the basic permutation list which contains the operations which generate a Gray code sequence. A k-bit Gray code sequence contains 2^kbinary codewords, each of length k bits, in which two adjacent codewords differ in exactly one bit. For example, consider the basic permutation list {φ₁, φ₂, φ₁, φ₃, φ₁, φ₂, φ₁} for n=8. Referring now to FIG. 9A, shown are steps applying this list to number 0 to obtain {000, 001, 011, 010, 110, 111, 101, 100} in binary.

[0104] Generally, the following claim may be proven by induction: applying the basic permutation list outputted by BuildBasicList(k) to an m-bit binary number, P_m−1P_m−2. . . P₁P₀, generates a list of the numbers of form

p_{m - 1} p_{m - 2} \dots p_{k} \frac{k}{xx \dots x,}

[0105] whose k rightmost bits form a k-bit Gray code sequence. Note that the foregoing “k” above the string of “xx . . . x” is notation used to indicate the “k” rightmost bits in which each “x” in the “xx . . . x” denotes a bit.

[0106] First notice that given a binary number b and a basic permutation φ_i, b and φ_i(b) differ only in the i^thbit. When k=1, there is only permutation φ₁, and the rightmost bit of the numbers generated P_m−1P_m−2. . . p₁x, form a list {0, 1} which is a 1-bit Gray code sequence. Assume the claim holds true for k−1. Now consider BuildBasicList(k). After the first call of BuildBasicList (k−1), there is a permutation list which generally generates numbers of form

p_{m - 1} p_{m - 2} \dots p_{k} p_{k - 1} \frac{k - 1}{xx \dots x,}

[0107] whose (k−1) rightmost bits form a (k−1) bit Gray code sequence. Then add φ_kto the permutation list. Apply φ_kto the previous number by flipping the k^thbit of the number to obtain a new number. Next, call BuildBasicList (k−1) again to add to the permutation list those permutations which may generate all numbers of form

p_{m - 1} p_{m - 2} \dots p_{k} {\overline{p}}_{k - 1} \frac{k - 1}{xx \dots x}

[0108] whose (k−1) rightmost bits form a (k−1)-bit Gray code sequence. Thus, the resulting permutation list generates all numbers of the form

p_{m - 1} p_{m - 2} \dots p_{k} \frac{k}{xx \dots x,}

[0109] whose k rightmost bits form a k-bit Gray code sequence. It should be noted that the bar or line over the p_k−1represents the complement or negation operation.

[0110] In the LatinSquare of Table II, the basic permutation list outputed by BuildBasicList (m) is applied to any a_j(0≦a_j≦n−1) in the original row, the resulting number list, which is column j of the matrix obtained by the method, consists of numbers of an m-bit Gray code sequence which covers {0, 1, . . . , n−1}.

[0111] Additionally, the original row a₀, a₁, . . . , a_n−1includes the members of {0, 1, . . . , n−1}, so does each of the other n−1 rows of the matrix. Thus, the resulting matrix is a Latin square.

[0112] Referring now to FIG. 9B, shown is a Latin square generated by method LatinSquare of Table II.

[0113] Theorem 3 The Latin square in Theorem 2 is equivalent to that in Theorem 1.

[0114] Proof. Let the basic permutation list in Table II LatinSquare be

[0115] {φ_k,φ_k, . . . , φ_k}.

[0116] Then the set of permutations which are applied to the original number list {a₀, a₁, . . . , a_n−1} in the method is

[0117] ψ′=}φ_k,φ_k,φ_k,φ_kφ_k,φ_k, . . . ,φ_kφ_k. . . φ_kφ_k}

[0118] By Theorem 2, no two permutations in Ψ′ are the same, which yields

[0119] |Ψ′|=n−1=|Ψ|.

[0120] Also using the properties (4) and (5) of basic permutations, any permutation in Ψ′ can be transformed to the format of Ψ in (6). That is,

[0121] Ψ′=Ψ

[0122] Thus, the Latin squares in Theorem 2 and Theorem 1 are equivalent.

[0123] An example to illustrate the proof of Theorem 3 is now given. For n=8, the basic permutation list is {φ₁, φ₂, φ₁, φ₃, φ₁, φ₂, φ₁}. The following one-to-one correspondence between Ψ′ and Ψ may be listed as:

\begin{matrix} Ψ^{'} = Ψ \\ φ_{1} = φ_{1} \\ φ_{2} φ_{1} = φ_{2} φ_{1} \\ φ_{1} φ_{2} φ_{1} = φ_{2} \\ φ_{3} φ_{1} φ_{2} φ_{1} = φ_{3} φ_{2} \\ φ_{1} φ_{3} φ_{1} φ_{2} φ_{1} = φ_{3} φ_{2} φ_{1} \\ φ_{2} φ_{1} φ_{3} φ_{1} φ_{2} φ_{1} = φ_{3} φ_{1} \\ φ_{1} φ_{2} φ_{1} φ_{3} φ_{1} φ_{2} φ_{1} = φ_{3} \end{matrix}

[0124] The set of basic permutations φ_i(1≦i≦m) and the Latin square matrix produced, for example, using the two methods previously described, are closely related to the class of self-routing MINS. Generally, admissible permutations for the class of self-routing MINs may be generated in a generic way to form the Latin square needed in the all-to-all personalized exchange method of Table I. In paragraphs that follow, set forth is a description of this generic way to generate Latin square matrices which may be used in self-routing MINs for all-to-all personalized exchange.

[0125] Generally, let each stage permutation, (as previously defined) φ_i=φ₁or I. Recall that φ₁is the permutation (0, 1) (2, 3) . . . (n−2, n−1), and I is the identity permutation. Accordingly, all switches in each stage of the network are set to either cross or parallel to correspond, respectively, to φ₁and I.

[0126] In paragraphs that follow, it will be shown that this generic method for generating admissible permutations for use in a Latin square matrix is valid for baseline, omega and indirect binary n-cube networks. In fact, this approach may be generally applied to the entire class of self-routing MINs.

[0127] Recall, as set forth in previous descriptions included herein, the overall permutation of a baseline network is σ_m−1π_m−2. . . π₀σ₀, where interstage permutations π's are defined in (2) and the stage permutations σ_i's now take either φ₁or I. The following lemmas represent properties of the compositions of π_i's and φ_i's.

[0128] Lemma 3 The composition of i(1≦i≦m−1) consecutive interstage permutations π_m−2π_m−3, . . . , π_m−i−1is the following permutation

\begin{matrix} p_{m - 1} p_{m - 2} \dots p_{i + 1} p_{i} \dots p_{1} p_{o} \overset{π_{m - 2} π_{m - 3} {…π}_{m - i - 1}}{\to} p_{m - 1} p_{m - 2} \dots p_{i + 1} p_{0} p_{1} \dots p_{i} & (9) \end{matrix}

[0129] Proof. Applying π_m−i−1, π_m−i, . . . , π_m−3,π_m−2one by one to a number P_m−1P_m−2. . . P₁P₀, then

p_{m - 1} \dots p_{i + 1} p_{i} \dots p_{1} p_{0} \overset{π_{m - i - 1}}{\to} p_{m - 1} \dots p_{i + 1} p_{0} p_{i} \dots p_{1} \overset{π_{m - i}}{\to} p_{m - 1} \dots p_{i + 1} p_{0} p_{1} p_{i} \dots p_{3} p_{2} \overset{π_{m - i + 1}}{\to} \dots \overset{π_{m - 3}}{\to} p_{m - 1} \dots p_{i + 1} p_{0} p_{1} \dots p_{i + 2} p_{i} p_{i - 1} \overset{π_{m - 2}}{\to} p_{m - 1} \dots p_{i + 1} p_{0} p_{1} \dots p_{i - 1} p_{i}

[0130] Let

[0131] π=π_m−2π_m−3. . . π₁π₀ (10)

[0132] which is the composition of all π_i's. π may also be viewed as the overall permutation of a baseline network in which all switches are set to parallel.

[0133] The following Corollary gives a special case of Lemma 3, which indicates that π maps a binary number to its inverse.

[0134] Corollary 1

\begin{matrix} p_{m - 1} p_{m - 2} \dots p_{1} p_{0} \overset{π}{\to} p_{0} p_{1} \dots p_{m - 2} p_{m - 1} & (11) \end{matrix}

[0135] Corollary 2 The composition of the i(1≦i≦m−1) consecutive π_j's and φ₁satisfies the following equation:

[0136] (π_m−2π_m−3. . . π_m−i−1)φ₁=φ_i+1(π_m−2π_m−3. . . π_m−i−1 (12)

[0137] Proof. From Lemma 3 and mapping (3), it can be determined that the permutations on both sides of (12) map P_m−1P_m−2. . . P₁P₀to P_m−1P_m−2. . . P_i+1{overscore (P)}₀P₁. . . P_i.

[0138] Theorem 4 Let the stage permutation of each stage in a baseline network take either φ₁or I (i.e., the switches in this stage are either all set to cross or all set to parallel). The admissible permutations that correspond to these switch settings form a Latin square.

[0139] Proof. Since each stage permutation σ_itakes either φ₁or I, the overall permutation σ_m−1π_m−2σ_m−2. . . π₀σ₀has the following general form for k≧1 and 0≦i₁<i₂< . . . <i_k≦m−1

[0140] π_m−2. . . π_m−i₋₁φ₁π_m−i₋₂. . . π_m−i₋₁φ₁π_m−i₋₂. . . π_m−i₋₁φ₁π_m−i₋₂. . . π₁π₀ (13)

[0141] Notice that when i₁=0, (13) becomes

[0142] φ₁π_m−2. . . π_m−i₋₁σ₁π_m−i₋₂. . . π_m−i₋₁φ₁π_m−i₋₂. . . π₁π₀

[0143] By repeatedly using Corollary 2, (13) becomes

[0144] (φ_i₊₁φ_i₊₁. . . φ_i₋₁)(π_m−2π_m−3. . . π₁π₀)=(φ_i₋₁φ_i₋₁. . . φ_i₋₁)π=(φ_i₊₁φ_i₋₁. . . φ_i₋₁)π

[0145] Comparing the set

[0146] {φ_i₊₁φ_i₊₁. . . φ_i₊₁1 k≧1, 0≦i₁≦i₂≦ . . . ≦i_k≦m−1}

[0147] with the definition of Ψ in (6), it can be determined they are equivalent. Letting a₀=π(0), a₁=π(1), . . . a_n−1=π(n−1), and using Theorem 1, all permutations of form (13) form a Latin square. Additionally π rcorresponds to the first row of the Latin square.

[0148] The second method of Table II LatinSquare(List {π(0), π(1), . . . , π(n−1)}) may be used to construct the Latin square for a baseline network. For example, for an 8×8 network, the first row, π(0), π(1), . . . , π(n−1), is computed by Corollary 1, which is 0, 4, 2, 6, 1, 5, 3, 7. LatinSquare is then called to generate the remaining n−1 rows of the Latin square.

[0149] Referring now to FIGS. 10A-10H, possible switch settings for an 8×8 baseline network are shown. The corresponding Latin square is L₁of (14) below. L₂and L₃in (14) will be used in the following paragraphs setting forth descriptions involving different networks.

\begin{matrix} L_{1} = [\begin{matrix} 0 & 4 & 2 & 6 & 1 & 5 & 3 & 7 \\ 1 & 5 & 3 & 7 & 0 & 4 & 2 & 6 \\ 3 & 7 & 1 & 5 & 2 & 6 & 0 & 4 \\ 2 & 6 & 0 & 4 & 3 & 7 & 1 & 5 \\ 6 & 2 & 4 & 0 & 7 & 3 & 5 & 1 \\ 7 & 3 & 5 & 1 & 6 & 2 & 4 & 0 \\ 5 & 1 & 7 & 3 & 4 & 0 & 6 & 2 \\ 4 & 0 & 6 & 2 & 5 & 1 & 7 & 3 \end{matrix}] & (14) \\ L_{2} = [\begin{matrix} 0 & 1 & 2 & 3 & 4 & 5 & 6 & 7 \\ 1 & 0 & 3 & 2 & 5 & 4 & 7 & 6 \\ 3 & 2 & 1 & 0 & 7 & 6 & 5 & 4 \\ 2 & 3 & 0 & 1 & 6 & 7 & 4 & 5 \\ 6 & 7 & 4 & 5 & 2 & 3 & 0 & 1 \\ 7 & 6 & 5 & 4 & 3 & 2 & 1 & 0 \\ 5 & 4 & 7 & 6 & 1 & 0 & 3 & 2 \\ 4 & 5 & 6 & 7 & 0 & 1 & 2 & 3 \end{matrix}] \\ L_{3} = [\begin{matrix} 0 & 2 & 4 & 6 & 1 & 3 & 5 & 7 \\ 1 & 3 & 5 & 7 & 0 & 2 & 4 & 6 \\ 5 & 7 & 1 & 3 & 4 & 6 & 0 & 2 \\ 4 & 6 & 0 & 2 & 5 & 7 & 1 & 3 \\ 6 & 4 & 2 & 0 & 7 & 5 & 3 & 1 \\ 7 & 5 & 3 & 1 & 6 & 4 & 2 & 0 \\ 3 & 1 & 7 & 5 & 2 & 0 & 6 & 4 \\ 2 & 0 & 6 & 4 & 3 & 1 & 7 & 5 \end{matrix}] \end{matrix}

[0150] Referring back to FIG. 2B, an omega network is depicted. In an n×n omega network, each of the log n interstage permutations is a shuffle function which is exactly π₀⁻¹, where π₀is defined in (2). In fact, π₀⁻¹is a 1-bit circular-left-shift operation, that is,

\begin{matrix} p_{m - 1} p_{m - 2} \dots p_{1} p_{0} \overset{π_{0}^{- 1}}{\to} p_{m - 2} p_{m - 3} \dots p_{1} p_{0} p_{m - 1} & (15) \end{matrix}

[0151] The overall permutation of an omega network is σ_m−1π₀⁻¹σ_m−2π₀⁻¹. . . φ₁π₀^−1σ₀π₀⁻¹. Let π₀⁻ⁱdenote the composition of i permutations π₀⁻ⁱ_s.

[0152] Lemma 4

[0153] π₀⁻ⁱφ₁=φ₁₊₁π₀⁻ⁱfor ≦i≦m−1 (16)

[0154] π₀^−m=I (17)

[0155] Proof. When repeatedly applying π₀⁻¹to a binary number P_m−1P_m−2. . . P₁P₀, obtained is:

[0156] π₀⁻¹π₀⁻¹π₀⁻¹p_m−1p_m−2. . . p₁p₀→p_m−2p_m−3. . . p₁p₀p_m−1→p_m−3. . . p₁p₀p_m−1p_{m−2→ . . .}

[0157] In general, for 0≦i≦m−1,

\begin{matrix} p_{m - 1} p_{m - 2} \dots p_{1} p_{0} \overset{π_{0}^{- i}}{\to} p_{m - i - 1} p_{m - i - 2} \dots p_{1} p_{0} p_{m - 1} \dots p_{m - i} & (18) \end{matrix}

[0158] Letting i=m−1 and applying π₀⁻¹one more time, (17) holds true.

[0159] To prove (16), in one instance there is

p_{m - 1} p_{m - 2} \dots p_{1} p_{0} \overset{π_{0}^{- 1} φ_{1}}{\to} p_{m - i - 1} p_{m - i - 2} \dots p_{1} \overline{p_{0}} p_{m - 1} \dots p_{m - i}

[0160] In another instance, by applying φ_i+1π₀⁻ⁱto P_m−1P_m−2. . . P₁P₀, P_m−i−1P_m−i−2. . . P₁{overscore (P)}₀P_m−1P_m−imay also be obtained. Therefore, equation π₀⁻¹φ₁=φ_i+1π₀⁻ⁱholds true.

[0161] Note that π₀^−mis the overall permutation of an omega network in which all switches are set to parallel. By (17), this permutation equals the identity permutation.

[0162] A theorem for omega networks exists which is similar to theorem 4 for baseline networks.

[0163] Theorem 5 Let the stage permutation of each stage in an omega network take either φ₁or I (i.e., the switches in this stage are either all set to cross or all set to parallel). The admissible permutations that correspond to these switch settings form a Latin square.

[0164] Proof. Since each stage permutation σ_itakes either φ₁or I, the overall permutation takes the following format for k≧2, i₁≧0, i₂, . . . , i_k≧1, and i₁+i₂+ . . . +i_k=m

[0165] π₀⁻ⁱφ₁π₀⁻ⁱφ₁. . . π₀⁻ⁱφ₁π₀⁻ⁱ (19)

[0166] By repeatedly using Lemma 4,

π_{0}^{- i_{1}} φ_{1} π_{0}^{- i_{2}} φ_{1} \dots π_{0}^{- i_{k - 1}} φ_{1} π_{0}^{- i_{k}} {by}_{=} (16) φ_{i_{1} + 1} φ_{(i_{1} - i_{2}) - 1} φ_{(i_{1} + i_{2} + i_{3}) - 1} \dots φ_{\sum_{j = 1}^{k - 1} i_{j} + 1} π_{0}^{- m} {by}_{=} (17) φ_{i + 1} φ_{(i_{1} \cdot i_{2}) - 1} φ_{(i_{1} + i_{2} + i_{3}) + 1} \dots φ_{\sum_{j = 1}^{k - 1} i_{j} + 1} {by}_{=} (4) φ_{\sum_{j = 1}^{k - 1} i_{j} + 1} φ_{\sum_{j = 1}^{k - 2} i_{j} + 1} \dots φ_{(i_{1} + i_{2}) + 1} φ_{i_{1} + 1}

[0167] It may be verified that the set

{φ_{\sum_{j = 1}^{k - 1} i_{j} + 1} φ_{\sum_{j = 1}^{k - 2} i_{j} + 1} \dots φ_{(i_{1} + i_{2}) + 1} φ_{i_{1} - 1} | k \geq 2, i_{1} \geq 0, i_{2} \dots i_{k} \geq 1, i_{1} + i_{2} + \dots + i_{k} = m}

[0168] is equal to Ψ in (6). Letting a₀, a₁=1, . . . , a_n−1=n−1, and using Theorem 1, all permutations of form (19) form a Latin square.

[0169] The method LatinSquare(List {0, 1, 2, . . . , n−1}) of Table II may be used to construct the Latin square for an omega network. Referring now to FIGS. 11A-11H, switch settings in an 8×8 omega network are depicted. The corresponding Latin square is L2 in (14), as previously set forth.

[0170] In following paragraphs, a description regarding the generic method for self-routing networks as used with an indirect binary n-cube network. Let τ_jdenote the interstage permutation between stage i and i+1 for 0≦i≦m−2 in an indirect binary n-cube network. τ_irepresents the following mapping

\begin{matrix} p_{m - 1} p_{m - 2} \dots p_{i + 2} p_{i + 1} p_{i} \dots p_{1} p_{0} \overset{τ_{i}}{\to} p_{m - 1} p_{m - 2} \dots p_{i + 2} p_{0} p_{i} \dots p_{1} p_{i + 1}, & (20) \end{matrix}

[0171] which is the function of swapping bit 1 and bit i+2. Similar to a baseline network, the overall m permutation of an indirect binary n-cube network is σ_m−1τ_m−2σ_m−2. . . τ₀σ₀, and the stage permutations σ_i's are now taking either φ₁or I. Let

[0172] τ=τ_m−2τ_m−3. . . τ₁τ₀ (21)

[0173] which is the overall permutation corresponding to that all switches in the network are set to parallel.

[0174] Lemma 5 The composition of i(1≦i≦m−1) consecutive interstage permutations τ_m−2,τ_m−3, . . . , τ_m−i−1is the following permutation

\begin{matrix} p_{m - 1} p_{m - 2} \dots p_{m - i + 1} p_{m - i} p_{m - i - 1} \dots p_{1} p_{0} \overset{τ_{m - 2} τ_{m - 3} \dots τ_{m - i - 1}}{\to} p_{m - 2} \dots p_{m - i + 1} p_{m - i} p_{0} p_{m - i - 1} \dots p_{2} p_{1} p_{m - 1} & (22) \end{matrix}

[0175] Proof. Applying τ_m−i−1, τ_m−i, . . . τ_m−3,τ_m−2one by one to a binary number P_m−1P_m−2. . . P₁P₀, then

p_{m - 1} \dots p_{m - i + 1} p_{m - i} p_{m - i - 1} \dots p_{1} p_{0} \overset{τ_{m - i - 1}}{\to} p_{m - 1} \dots p_{m - i + 1} p_{0} p_{m - i - 1} \dots p_{1} p_{m - i} \overset{τ_{m - i}}{\to} p_{m - 1} \dots p_{m - i + 2} p_{m - i} p_{0} p_{m - i - 1} \dots p_{1} p_{m - i + 1} \overset{τ_{m - i + 1}}{\to} \dots \overset{τ_{m - 3}}{\to} p_{m - 1} p_{m - 3} \dots p_{m - i + 1} p_{m - i} p_{o} p_{m - i - 1} \dots p_{1} p_{m - 2} \overset{τ_{m - 2}}{\to} p_{m - 2} \dots p_{m - i + 1} p_{m - i} p_{0} p_{m - i - 1} \dots p_{1} p_{m - 1}

[0176] The following Corollary indicates that τ defined in (21) is actually a 1-bit circular-left-shift operation.

[0177] Corollary 3

\begin{matrix} p_{m - 1} p_{m - 2} \dots p_{1} p_{0} \overset{τ}{\to} p_{m - 2} \dots p_{2} p_{1} p_{0} p_{m - 1} & (23) \end{matrix}

[0178] Proof. Letting i=m−1 in Lemma 5.

[0179] Corollary 4 The composition of the i(1≦i≦m−1) consecutive τ_j's and φ₁satisfies the following equation:

[0180] (τ_m−2τ_m−3. . . , τ_m−i−1)φ₁=φ_m−i+1(τ_m−2τ_m−3. . . , τ_m−i−1) (24)

[0181] Proof. By Lemma 5 and the definition of φ₁in (3), both permutations map

[0182] P_m−1P_m−2. . . P₁P₀

[0183] to

[0184] P_m−2. . . P_m−i−1{overscore (P)}₀P_m−i−1. . . P₁P_m−1

[0185] Theorem 6 Let the stage permutation of each stage in an indirect binary n-cube network take either φ₁or I (i.e., the switches in this stage are either all set to cross or all set to parallel). The admissible permutations that correspond to these switch settings form a Latin square.

[0186] Proof. Since each stage permutation σ_itakes either φ₁or I, the overall permutation σ_m−1τ_m−2σ_m−2. . . τ₀σ₀has the following general form for k≧1 and 0≦i₁<i₂< . . . <i_k≦m−1

[0187] τ_m−2. . . τ_m−i₋₁φ₁τ_m−i₋₂. . . τ_m−i₋₁φ₁τ_m−i₋₂. . . τ_m−i₋₁φ_1τ_m−i. . . τ₁τ₀(25)

[0188] Notice that when i₁=0, (25) becomes

[0189] φ₁τ_m−2. . . τ_m−i₁φ₁τ_m−i₋₂. . . τ_m−i₋₁φ₁τ_m−i₋₂. . . τ₁τ₀

[0190] by repeatedly using Corollary 4, (25) becomes

[0191] (φ_m−i₊₁φ_m−i₊₁. . . φ_m−i₊₁)(τ_m−2τ_m−3. . . τ₁τ₀)=(φ_m−i₋₁φ_m−i₋₁. . . φ_m−i₋₁)τ for i₁≧1

[0192] or

[0193] (φ₁σ_m−i₋₁. . . σ_m−i₋₁)τ=(φ_m−i₋₁. . . φ_m−i₋₁φ₁)τ for i₁=0.

[0194] Comparing the set

[0195] {φ_m−i₊₁φ_m−i₊₁. . . φ_m−i₊₁|k≧1, 1≦i₁<i₂< . . . <i_k≦m−1}

[0196] ∪{φ_m−i₋₁. . . φ_m−i₋₁φ₁|k≧1, 0=i₁<i₂< . . . <i_k≦m−1}

[0197] with the definition of Ψ in (6), it can be determined that they are equivalent. Letting a₀=τ(0), a₁=τ(1), . . . , a_n−1=τ(n−1) and using Theorem 1, all permutations of form (13) form a Latin square. Moreover, corresponds to the first row of the Latin square.

[0198] Method 2 of Table II LatinSquare(List {τ(0), τ(1), . . . , τ(n−1)}) may be used to construct the Latin square for an indirect binary n-cube network. Referring now to FIGS. 12A-12H in FIG. 9, possible switch settings in an 8×8 indirect binary n-cube network are depicted. The corresponding Latin square is L3 in (14).

[0199] In following paragraphs, summarized is the general time complexity of the all-to-all personalized exchange method for the MIN subclass of self-routing networks. Generally, the method for an all-to-all personalized exchange using self-routing networks takes O(n+log n)=O(n) time, which matches the lower bound for this type of network within a constant factor. Constructing a Latin square matrix using the second method as previously described takes O(n²) time. Note that the Latin square construction methods previously described may be run once off-line at the time a network is built, and the Latin square matrix associated with the network may be viewed as one of the system parameters. Therefore, the time complexity of this method is not included in the communication delay.

[0200] Now the time complexity of the all-to-all personalized exchange method as used in a self-routing MIN network is generally compared with known techniques for other network topologies, including hypercube and 2D and 3D mesh/torus networks. In addition, also compared are the node degree, which reflects the number of I/O ports of each node, and the diameter, which is related to data transmission time. The comparison results are listed in Table III.

TABLE III

Comparisons of various networks used for all-to-all personalized exchange

[0201] From Table III, the previously disclosed methods for the class of self-routing multistage interconnection networks (MINs) achieves a lower time complexity for all-to-all personalized exchange than with other network types. In terms of node degree, which reflects the scalability of a network, the MIN networks previously described are comparable to a mesh or a torus, while a hypercube has a node degree of log n. Thus, a multistage interconnection network (MIN), particularly a self-routing MIN, may generally be a good choice for implementing all-to-all personalized exchange due to its short communication delay and scalability.

[0202] In this application, presented is an all-to-all personalized exchange method for use with the class of MINs. The new method is based on a Latin square matrix, which corresponds to a set of admissible permutations of a MIN and may be viewed as a system parameter of the network. Disclosed are first and second methods for constructing the Latin square matrix used in the personalized exchange technique. Also disclosed is a generic method for decomposing all-to-all personalized exchange patterns into admissible permutations to form the Latin square matrix for a subclass of the MIN class, those self-routing or unique path networks. By taking advantage of the property of a MIN having a single input/output port per node, the MIN is useful and efficient in implementing all-to-all personalized exchange due to its shorter communication latency and better scalability than non-MIN networks.

[0203] The foregoing description sets forth a technique using a MIN network that affords a flexible and efficient way of performing all-to-all communications using a Latin Square matrix for use in a variety of embodiments. Additionally, two techniques for generating a Latin square matrix were set forth. These two techniques afford a flexible way for generating a Latin square matrix that may be used in any type of MIN network. Additionally, for a particular type of MIN network, the self-routing network, a generic technique is described which affords a flexible and efficient method of generating admissible permutations that are included in a Latin square matrix for performing all-to-all personalized message exchange.

[0204] The foregoing technique for performing all-to-all personalized message exchange is scalable for use in applications with a large number of nodes that communicate while simultaneously minimizing the communication delay.

[0205] Having described preferred embodiments of the invention, it will now become apparent to those of skill in the art that other embodiments incorporating its concepts may be provided. It is felt, therefore, that this invention should not be limited to the disclosed embodiments, but rather should be limited only by the spirit and scope of the appended claims.

Claims

What is claimed is:

1. A method for performing all-to-all personalized exchanges in a system that includes a plurality of first and second nodes connected to a multistage interconnection network, comprising:

determining a Latin square matrix that includes n rows and n columns, the Latin square matrix including a plurality of entries identifying the second nodes;

preparing, by each of the first nodes, a message intended for each of the second nodes identified in the Latin square matrix; and

sending, by each of the first nodes, the message to each of the second nodes via the multistage interconnection network.

2. The method of claim 1, wherein the determining a Latin square matrix includes:

{φ_i1φ_i2. . . φ_ik|m≧i₁>i₂> . . . >i_k≧1Λm≧k≧1},

calculating m basic permutations, denoted φ₁, φ₂, . . . , φ_m, by φ_i(1≦i≦m), m being equal to base-two-logarithm of n, each φ_irepresenting negating an i^thbit of a binary number,

calculating the permutation set having n−1 members, denoted ρ₁, ρ₂, . . . ρ_n−1, the permutation set being constructed as follows:

defining a list of numbers a₀, a₁, . . . a_n−1such that {a₀, a₁, . . . a_n−1}={0, 1, . . . n−1}, and calculating each entry of the Latin square matrix as:

[\begin{matrix} α_{0} & α_{1} & α_{2} & \dots & α_{n - 1} \\ ρ_{1} (α_{0}) & ρ_{1} (α_{1}) & ρ_{1} (α_{2}) & \dots & ρ_{1} (α_{n - 1}) \\ ρ_{2} (α_{0}) & ρ_{2} (α_{1}) & ρ_{2} (α_{2}) & \dots & ρ_{2} (α_{n - 1}) \\ ⋮ & ⋮ & ⋮ & ⋮ & ⋮ \\ ρ_{n - 1} (α_{0}) & ρ_{n - 1} (α_{1}) & ρ_{n - 1} (α_{2}) & \dots & ρ_{n - 1} (α_{n - 1}) \end{matrix}] .

3. The method of claim 1, wherein the Latin square matrix includes a matrix in which no two entries in each of the rows are equivalent and no two entries in each of the columns are equivalent.

4. The method of claim 3, wherein the determining a Latin square matrix includes:

providing a list of n elements in which each of the elements is a number,

building a list of basic permutations of the list in which each of the basic permutations is a function providing a mapping of a first one of the elements to a second of the elements, the function representing flipping one of the bits in a binary representation of the first element producing the second element, the list of basic permutations generating a list of numbers whose rightmost bits form a gray code sequence,

building a first row of the Latin square matrix using the list, and

building successive rows of the Latin square matrix in which each of the rows of the Latin square matrix is produced using the immediately prior row of the Latin square matrix and the functions defined by the list of basic permutations.

5. The method of claim 4, wherein the multistage interconnection network is a baseline network, and the list of n elements is constructed using interstage permutations, each of the interstage permutations being predetermined in accordance with topology of the baseline network.

6. The method of claim 4, wherein the multistage interconnection network is an omega network, and the list of n elements is constructed using interstage permutations, each of the interstage permutations being predetermined in accordance with topology of the omega network.

7. The method of claim 4, wherein the multistage interconnection network is an indirect binary n-cube network, and the list of n elements is constructed using interstage permutations, each of the interstage permutations being predetermined in accordance with topology of the indirect binary n-cube network.

8. The method of claim 1, wherein the entries in the Latin square matrix identify the second nodes α_i,j, where 0≦j≦n−1 and 0≦i≦n−1; and

the preparing a message by a first node j includes:

sequentially preparing a message from the first node j to each of the second nodes a_i,jidentified in the Latin square matrix.

9. The method of claim 8, wherein the sending each of the messages by the first node j includes:

sequentially sending one of the messages from the first node j to each of the second nodes a_i,jthrough the multistage interconnection network.

10. The method of claim 9 wherein the sending each of the messages by the first node j further includes:

outputting each of the messages to input j of the multistage interconnection network.

11. A method for performing all-to-all personalized exchanges in a system that includes a plurality of nodes connected to a multistage interconnection network, comprising:

determining a Latin square matrix that includes n rows and n columns, the Latin square matrix including a plurality of destination addresses a_i,j, where 0≦j≦n−1 and 0≦i≦n−1;

performing in parallel for each of the nodes j:

sequentially preparing, for each of the destination addresses a_i,j, a message from the node j to one of the nodes identified by the destination address a_i,j, and

storing each of the messages in a queue; and

performing in parallel for each of the nodes j:

sequentially sending each of the messages from the node j to each of the destination addresses a_i,j.

12. The method of claim 11, wherein the determining a Latin square matrix includes:

{ρ_i1φ_i2. . . φ_ik|m≧i₁>i₂> . . . >i_k≧1Λm≧k≧1},

calculating m basic permutations, denoted φ₁, φ₂, . . . , φ_m, by φ_i(1≦i≦m), m being equal to base-two-logarithm of n, each φ_irepresenting negating an i^thbit of a binary number,

calculating the permutation set having n−1 members, denoted ρ₁, ρ₂, . . . ρ_n−1, the permutation set being constructed as follows:

defining a list of numbers a₀, a₁, . . . a_n−1such that {a₀, a₁, . . . a_n−1}={0, 1, . . . n−1}, and

calculating each entry of the Latin square matrix as:

[\begin{matrix} α_{0} & α_{1} & α_{2} & \dots & α_{n - 1} \\ ρ_{1} (α_{0}) & ρ_{1} (α_{1}) & ρ_{1} (α_{2}) & \dots & ρ_{1} (α_{n - 1}) \\ ρ_{2} (α_{0}) & ρ_{2} (α_{1}) & ρ_{2} (α_{2}) & \dots & ρ_{2} (α_{n - 1}) \\ ⋮ & ⋮ & ⋮ & ⋮ & ⋮ \\ ρ_{n - 1} (α_{0}) & ρ_{n - 1} (α_{1}) & ρ_{n - 1} (α_{2}) & \dots & ρ_{n - 1} (α_{n - 1}) \end{matrix}] .

13. The method of claim 11, wherein the Latin square matrix includes a matrix in which no two entries in each of the rows are equivalent and no two entries in each of the columns are equivalent.

14. The method of claim 13, wherein the determining a Latin square matrix includes:

providing a list of n elements in which each of the elements is a number,

building a first row of the Latin square matrix using the list, and

15. The method of claim 14, wherein the multistage interconnection network is a baseline network, and the list of n elements is constructed using interstage permutations, each of the interstage permutations being predetermined in accordance with topology of the baseline network.

16. The method of claim 14, wherein the multistage interconnection network is an omega network, and the list of n elements is constructed using interstage permutations, each of the interstage permutations being predetermined in accordance with topology of the omega network.

17. The method of claim 14, wherein the multistage interconnection network is an indirect binary n-cube network, and the list of n elements is constructed using interstage permutations, each of the interstage permutations being predetermined in accordance with topology of the indirect binary n-cube network.

18. The method of claim 11, wherein the sequentially sending each of the messages includes:

outputting each of the messages to input j of the multistage interconnection network.

19. A system for performing all-to-all personalized exchanges in an environment that includes a plurality of first and second nodes connected to a multistage interconnection network, comprising:

means for determining a Latin square matrix that includes a same number of rows and columns, the Latin square matrix including a plurality of entries that identify the second nodes;

means for preparing a message from each of the first nodes to each of the second nodes identified in the Latin square matrix; and

means for sending the message from each of the first nodes to each of the second nodes via the multistage interconnection network.

20. The system of claim 19, wherein the means for determining a Latin square matrix includes:

{φ_i1φ_i2. . . φ_ik|m≧i₁>i₂> . . . >i_k≧1Λm≧k≧1},

means for calculating m basic permutations, denoted φ₁, φ₂, . . . φ_m, by φ_i(1≦i≦m), m being equal to base-two-logarithm of n, each φ_irepresenting negating an i^thbit of a binary number,

means for calculating the permutation set having n−1 members, denoted ρ₁, ρ₂, . . . ρ_n−1, the permutation set being constructed as follows:

means for defining a list of numbers a₀, a₁, . . . a_n−1such that {a₀, a₁, . . . a_n−1}={0, 1, . . . n−1}, and

means for calculating each entry of the Latin square matrix as:

[\begin{matrix} α_{0} & α_{1} & α_{2} & \dots & α_{n - 1} \\ ρ_{1} (α_{0}) & ρ_{1} (α_{1}) & ρ_{1} (α_{2}) & \dots & ρ_{1} (α_{n - 1}) \\ ρ_{2} (α_{0}) & ρ_{2} (α_{1}) & ρ_{2} (α_{2}) & \dots & ρ_{2} (α_{n - 1}) \\ ⋮ & ⋮ & ⋮ & ⋮ & ⋮ \\ ρ_{n - 1} (α_{0}) & ρ_{n - 1} (α_{1}) & ρ_{n - 1} (α_{2}) & \dots & ρ_{n - 1} (α_{n - 1}) \end{matrix}] .

21. The system of claim 19, wherein the Latin square matrix includes a matrix in which no two entries in each of the rows are equivalent and no two entries in each of the columns are equivalent.

22. The system of claim 21, wherein the means for determining a Latin square matrix includes:

means for providing a list of n elements in which each of the elements is a number,

means for building a list of basic permutations of the list in which each of the basic permutations is a function providing a mapping of a first one of the elements to a second of the elements, the function representing flipping one of the bits in a binary representation of the first element producing the second element, the list of basic permutations generating a list of numbers whose rightmost bits form a gray code sequence,

means for building a first row of the Latin square matrix using the list, and

means for building successive rows of the Latin square matrix in which each of the rows of the Latin square matrix is produced using the immediately prior row of the Latin square matrix and the functions defined by the list of basic permutations.

23. The system of claim 19, wherein the multistage interconnection network is one of a baseline network, an omega network, and an indirect binary n-cube network.

24. A system for performing all-to-all personalized exchanges in an environment that includes a plurality of nodes connected to a multistage interconnection network, comprising:

means for determining a Latin square matrix that includes n rows and n columns, the Latin square matrix including a plurality of destination addresses a_i,j, where 0≦j≦n−1 and 0≦i≦n−1;

means for sequentially preparing, in parallel by each of the nodes j and for each of the destination addresses a_i,j, a message from the node j to one of the nodes identified by the destination address a_i,j;

means for storing the message; and

means for sequentially sending, in parallel by each of the nodes j, the message from the node j to each of the destination addresses a_i,j.

25. The system of claim 24, wherein the means for determining a Latin square matrix includes:

{φ_i1φ_i2, . . . φ_ik|m≧i₁>i₂> . . . >i_k≧1Λm≧k≧1},

means for calculating m basic permutations, denoted φ₁, φ₂, . . . φ_m, by φ_i(1≦i≦m), m being equal to base-two-logarithm of n, each φ₁representing negating an i^thbit of a binary number,

means for calculating the permutation set having n−1 members, denoted ρ₁, ρ₂, . . . ρ_n−1, the permutation set being constructed as follows:

means for defining a list of numbers a₀, a₁, . . . a_n−1such that {a₀, a₁, . . . a_n−1}={0, 1, . . . n−1}, and

means for calculating each entry of the Latin square matrix as:

[\begin{matrix} α_{0} & α_{1} & α_{2} & \dots & α_{n - 1} \\ ρ_{1} (α_{0}) & ρ_{1} (α_{1}) & ρ_{1} (α_{2}) & \dots & ρ_{1} (α_{n - 1}) \\ ρ_{2} (α_{0}) & ρ_{2} (α_{1}) & ρ_{2} (α_{2}) & \dots & ρ_{2} (α_{n - 1}) \\ ⋮ & ⋮ & ⋮ & ⋮ & ⋮ \\ ρ_{n - 1} (α_{0}) & ρ_{n - 1} (α_{1}) & ρ_{n - 1} (α_{2}) & \dots & ρ_{n - 1} (α_{n - 1}) \end{matrix}] .

26. A The system of claim 24, wherein the Latin square matrix includes a matrix in which no two entries in each of the rows are equivalent and no two entries in each of the columns are equivalent.

27. The system of claim 26, wherein the means for determining a Latin square matrix includes:

means for providing a list of n elements in which each of the elements is a number,

means for building a first row of the Latin square matrix using the list, and

28. The method of claim 24, wherein the multistage interconnection network includes one of a baseline network, an omega network, and an indirect binary n-cube network.

29. A method for performing all-to-all exchanges in an environment that includes a plurality of first and second nodes connected to a multistage interconnection network, comprising:

generating a square matrix that includes a plurality of entries that identify the second nodes;

preparing a message from each of the first nodes to each of the second nodes identified in the square matrix; and

sending the messages from the first nodes to the second nodes via the multistage interconnection network.

30. A method for performing all-to-all exchanges in an environment that includes a plurality of first and second nodes connected to a multistage interconnection network, comprising:

generating a square matrix that includes a plurality of entries that correspond to a plurality of destination addresses;

sequentially preparing, in parallel by each of the first nodes and for each of the destination addresses, a message from the first node to one of the second nodes identified by the destination address; and

sequentially sending, in parallel by each of the first nodes, the message from the first node to the destination address via the multistage interconnection network.

Patent Citations (6)

Patent	Date	Inventor	Cited By
US4984237(A)	1991-01-01	Franaszek	Examiner
US5142686(A)	1992-08-01	Hecht et al.	Examiner
US5361255(A)	1994-11-01	Diaz et al.	Examiner
US5671222(A)	1997-09-01	Chen et al.	Examiner
US5689500(A)	1997-11-01	Chiussi et al.	Examiner
US6201808(B1)	2001-03-01	Wang et al.	Examiner

Non-Patent Literature (22)

J. Duato, et al., “Interconnection Networks: An Engineering Approach”, Chapter 1 and 5, IEEE Computer Society Press, Los Alamitos, CA, 1997.Applicant
D.K. Panda, “Issues in Designing Efficient and Practical Algorithms for Collective Communication on Wormhole-Routed Systems,” Proceedings of the 1995 ICPP Workshop on Challenges for Parallel Processing, pp. 8-15, 1995.Applicant
Y. Yang, et al., “Nonblocking Broadcast Switching Networks,” IEEE Trans. Computers, vol. C-40, No. 9, pp. 1005-1015, 1991.Applicant
Y. Yang, et al., “Broadcast Ring Sandwich Networks,” IEEE Trans. Computers, vol. C-44, No. 10, pp. 1169-1180, 1995.Applicant
Y. Yang, “A Class of Interconnection Networks for Multicasting,” IEEE Trans. Computers, vol. C-47, No. 8, pp. 899-906, Aug., 1998.Applicant
Y. Yang, et al., “A New Self-Routing Multicast Network,” Proceedings of the First Merged IEEE International Parallel Processing Symposium & Symposium on Parallel and Distributed Processing (IPPS/SPDP '98), Orlando, FL, pp. 351-357, Mar., 1998.Applicant
S.L. Johnsson, et al, “Optimum Broadcasting and Personalized Communication in Hypercubes,” IEEE Trans. Computers, vol. C-38, No. 9, pp. 1249-1268, Sep., 1989.Applicant
D.S. Scott, “Efficient All-to-All Communication Patterns in Hypercube and Mesh Topologies,” Proceedings of the 6th Conference: Distributed Memory Concurrent Computers, pp. 398-403, 1991.Applicant
R. Thakur and A. Choudhary, “All-to-All Communication on Meshes with Wormhole Routing,” Proceedings of 8th IEEE International Parallel Processing Symposium, pp. 561-565, Apr., 1994.Applicant
Y. Saad, et al., “Data Communication in Parallel Architectures,” Parallel Computing, vol. 11, pp. 131-150, 1989.Applicant
Y.-C. Tseng, et al., “All-to-All Personalized Communication in a Wormhole-Routes Torus,” IEEE Trans. Parallel and Distributed Systems, vol. 7, No. 5, pp. 498-505, May, 1996.Applicant
Y.-C. Tseng, et al., “Bandwidth-Optimal Complete Exchange on Wormhole Routed 2D/3D Torus Networks: A Diagonal-Propagation Approach,” IEEE Trans. Parallel and Distributed Systems, vol. 8, No. 4, pp. 380-396, Apr., 1997.Applicant
F. Petrini, “Total-Exchange on Wormhole K-ary n-cubes with Adaptive Routing,” Proceedings of the First Merged IEEE International Parallel Processing Symposium & Symposium on Parallel and Distributed Processing, pp. 267-271, Orlando, FL, Mar., 1998.Applicant
Y.J. Suh, et al., “All-to-All Communication with Minimum Start-up Costs in 2D/3D Tori and Meshes,” IEEE Trans. Parallel and Distributed Systems, vol. 9, No. 5, pp. 442-458, May, 1998.Applicant
Y.J. Suh, et al., “Efficient All-to-All Personalized Exchange in Multidimensional Torus Networks,” Proceedings of 1998 International Conference on Parallel Processing, pp. 468-475, Aug. 1998.Applicant
D. Gannon, et al., “On the Impact of Communication Complexity in the Design of Parallel Numerical Algorithms,” IEEE Trans. Computer, vol. C-33, pp. 1180-1194, Dec., 1984.Applicant
S.L. Johnsson, “Communication Efficient Basic Linear Algebra Computations on Hypercube Architectures,” Journal of Parallel Distributed Computing, vol. 4, pp. 133-172, Apr., 1987.Applicant
C.-L. Wu, et al., “On a Class of Multistage Interconnection Networks,” IEEE Trans. Computers, vol. C-29, No. 8, pp. 694-702, Aug., 1980.Applicant
C. Clos, “A Study of Non-Blocking Switching Networks,” The Bell System Technical Journal, vol. 32, pp. 406-424, 1953.Applicant
V.E. Benes, “Heuristic Remarks and Mathematical Problems Regarding the Theory of Switching Systems,” The Bell System Technical Journal, vol. 41, pp. 1201-1247, 1962.Applicant
L.R. Goke, et al., “Banyan Networks for Partitioning Multiprocessor Systems,” Proceedings of the First Annual Symposium on Computer Architecture, 1973, pp. 21-28.Applicant
D. Nassimi, et al., “A Self-Routing Benes Network and Parallel Permutation Algorithms,” IEEE Trans. Computers, vol. C-30, No. 5, pp. 332-340, May, 1981.Applicant

Abstract