Power conversion apparatus and methods with reduced current and voltage switching

[0002] This application claims the priority of U.S. Provisional Application No. 60/158,538 filed Oct. 8, 1999, the disclosure of which is hereby incorporated herein by reference.

[0003] The present invention relates to power conversion apparatus and methods, and more particularly, to switching converters and methods of operation thereof.

[0004] DC-to-DC power conversion is commonly achieved using switching regulator circuits. These switching regulator circuits often include one or more switching elements that selectively couple a DC power source to a primary winding of a transformer such that an AC voltage is produced on a secondary winding of the transformer. This AC voltage may then be rectified and filtered to produce a DC output voltage. The DC output voltage may be regulated by controlling the switching frequency and/or duty cycle of the switching elements.

[0005] It is generally desirable that the switching element(s) of a switching regulator operate at high frequencies to allow for the use of small and lightweight magnetic components (e.g., lightweight transformers and inductors). An unfortunate result of such high frequency switching operations may be increased power dissipation due to resistance and capacitance associated with the switching element(s). Accordingly, it is generally desirable for the switching element(s) of a switching regulator to switch under minimized current and/or voltage conditions to reduce power dissipation.

[0006] Examples of power converters that may provide reduced or “zero current” switching (ZCS) are described in U.S. Pat. No. 4,415,959 to Vinciarelli; and in U.S. Pat. No. 4,823,249 to Garcia, II. Examples of power converters that may provide for reduced or “zero voltage” switching (ZVS) are described in “Design Review: 500 W, 40 W/in³Phase Shifted ZVT Power Converter,” Topic 4, SEM-900 Power Supply Design Seminar Manual, Unitrode Integrated Circuit Corporation; “Optimum ZVS Full-Bridge DC/DC Converter with PWM Phase Shift Control: Analysis, Design Considerations, and Experimental Results,” by Balogh et al., APEC'94 Proceedings, pp. 159-165 (1994); “A Novel Soft-Switching Full Bridge DC/DC Converter: Analysis, Design Considerations, and Experimental Results At 1.5 kW, 100 kHz,” by Redl et al., PESC'90 Proceedings, pp. 162-172 (1990); “Designing a Phase Shifted Zero Voltage Transition (ZVT) Power Converter,” Topic 3, SEM-900 Power Supply Design Seminar Manual, Unitrode Integrated Circuit Corporation; “A Fixed Frequency ZVS High Power SMR Converter with Zero to Rated Load Variation Capability,” by Moshopolous et al., INT-ELEC'92 Proceedings, pp. 351-358 (1992); “UC3879 Phase-Shift Resonant Controller” Data Sheet, Unitrode Integrated Circuit Corporation; “The New UC3879 Phase Shifted PWM Controller Simplifies the Design of Zero Voltage Transition Full Bridge Converters,” Application NoteU154, Unitrode Integrated Circuit Corporation.

[0007] According to embodiments of the invention, a power conversion apparatus, e.g., a DC-to-DC converter, includes a transformer having primary and secondary windings. A first switching circuit has an input port configured to be coupled across a DC power source and an output port coupled to the primary winding of the transformer. A switch control circuit is operatively associated with the first switching circuit and causes the first switching circuit to alternately apply first and second polarity voltages to the primary winding. A second switching circuit is operative to transfer energy to a load from the secondary winding via a first capacitor responsive to application of the first polarity voltage to the primary winding and to transfer energy to the load from the secondary winding via a second capacitor responsive to application of the second polarity voltage to the primary winding.

[0008] According to embodiments of the invention, the first switching circuit comprises at least one switch, and the switch control circuit constrains the at least one switch to operate when current in the at least one switch falls to a predetermined level, e.g., substantially near zero. The switch control circuit may operate the at least one switch responsive to a current through the transformer. Alternatively, the switch control circuit may estimate a time when current in the at least one switch will reach the predetermined level and may operate the at least one switch based on the estimated time.

[0009] According to other embodiments of the invention, the first switching circuit comprises first and second half bridges, and the switch control circuit controls a time delay between operations of the first and second half-bridges. The switch control circuit may control the time delay such that the first and second half-bridges operate under substantially zero current switching conditions. In some embodiments of the invention, the switch control circuit maintains a fixed time delay between operations of the first and second half-bridges. In other embodiments, the switch control circuit controls the time delay responsive to a sensed current through the transformer and/or responsive to an input voltage applied to the switching circuit.

[0010] According to other aspects of the invention, the first switching circuit comprises at least one switch, and the switch control circuit constrains the at least one switch to operate when voltage across the at least one switch falls to a predetermined level, for example, substantially near zero. The first switching circuit may comprise a first half-bridge including first and second switches and a second half-bridge including third and fourth switches. The switch control circuit, in transitioning the first switching circuit from a first state in which the second and third switches are closed and the first and fourth switches are open and a second state in which the first and third switches are closed and the second and fourth switches are open, may open the second switch before closing the first switch such that a voltage across the first switch is reduced, for example, to a voltage substantially near zero, before the first switch closes. The switch control circuit, in transitioning the first switching circuit from the second state to a third state in which the first and fourth switches are closed and the first and third switches are open, may also open the third switch before closing the fourth switch such that a voltage across the fourth switch is reduced, for example, to a voltage substantially near zero, before the fourth switch closes.

[0011] In other embodiments of the invention, a power conversion apparatus includes a transformer having primary and secondary windings. First and second half-bridges are configured to be coupled across a DC power source and coupled to respective first and second terminals of the primary winding of the transformer. An output circuit is coupled to the secondary winding of the transformer and includes first and second capacitors and at least one inductor configured to be coupled to a load. The output circuit is operative to transfer energy to the load from the secondary winding via the first capacitor responsive to application of a first polarity voltage to the primary winding of the transfer and to transfer energy to the load from the secondary winding via the second capacitor responsive to application of a second polarity voltage to the primary winding of the transformer. A switch control circuit, operatively associated with the first and second half-bridges, varies a frequency at which the first and second half-bridges operate responsive to an output voltage produced by the output circuit.

[0012] In some embodiments of the invention, the switch control circuit is operative to control a time delay between operations of the first and second half-bridges. For example, the switch control circuit may control the time delay such that the first and second half-bridges operate under substantially zero current switching conditions.

[0013] For example, the switch control circuit maintains a fixed time delay between operations of the first and second half-bridges, or the switch control circuit may vary the time delay responsive to a sensed current and/or to an input voltage applied to the first and second half-bridges.

[0014] In still other embodiments of the invention, a power conversion apparatus includes transformer having primary and secondary windings. A switching circuit is coupled to the primary winding of the transformer and configured to be coupled to a DC power source, and is operative to couple the DC power source to the primary winding of the transformer with a first polarity in a first state and to couple the DC power source to the primary winding of the transformer with a second polarity in a second state. An output circuit is coupled to the secondary winding of the transformer and includes first and second capacitors and at least one inductor configured to be coupled to a load. The output circuit is operative to transfer energy to the load from the secondary winding via the first capacitor responsive to the first state of the switching circuit and to transfer energy to the load from the secondary winding via the second capacitor responsive to the second state of the switching circuit. The switching circuit may vary a frequency at which the switching circuit alternates between the first and second states to control an output voltage applied to the load.

[0015] In other embodiments of the invention, the output circuit, when the switching circuit is in the first state, delivers current from the secondary winding to the first capacitor responsive to current in the secondary winding exceeding a first level and reduces current in the secondary winding responsive to discharge of the first capacitor. The output circuit, when the switching circuit is in the second state, also delivers current from the secondary winding to the second capacitor responsive to current in the secondary winding exceeding a second level and reduces current in the secondary winding responsive to discharge of the second capacitor. Respective capacitances of the first and second capacitors may be such that respective discharge currents produced from respective ones of the first and second capacitors in response to respective ones of the first and second states of the switching circuit are sufficient to cause the output circuit to block current flow in the secondary winding.

[0016] In still other embodiments, the output circuit, when the switching circuit is in the first state, delivers current from the secondary winding to the first capacitor responsive to current in the secondary winding exceeding a current demand of the load and then discharges current from the first capacitor through the at least one output inductor to supply current to the load. The output circuit, when the switching circuit is in the second state, also delivers current from the secondary winding to the second capacitor responsive to current in the secondary winding exceeding a current demand of the load and then discharges the second capacitor through the at least one output inductor to supply current to the load. Respective capacitances of the first and second capacitors may be such that respective peak discharge currents produced from respective ones of the first and second capacitors responsive to respective ones of the first and second states of the switching circuit are greater than or equal to a current delivered to the load via the at least one inductor.

[0017] In yet other embodiments of the invention, the apparatus further comprises a sensor that senses a current in at least one of the primary and secondary windings. The switching circuit is responsive to the sensor such that the first switching circuit short-circuits the primary winding when the sensed current meets a predetermined criterion. In other embodiments, a switch control circuit predicts a time at which current in at least one of the primary winding and the secondary winding meets a predetermined criterion and causes the switching circuit to short the primary winding based on the predicted time.

[0018] According to another aspect of the invention, the output circuit comprises a second switching circuit, for example, a diode bridge, that controls current flow between the secondary winding, the first and second capacitors and the at least one output inductor. The second switching circuit may control current flow between the secondary winding, the first and second capacitors and the at least one output inductor such that, when the first switching circuit is in the first state, the second switching circuit clamps the first capacitor when current in the secondary winding is less than a first level, conducts current from the secondary winding to the first capacitor responsive to current in the secondary winding exceeding a second level, and reduces current flow in the secondary winding responsive to discharge of the first capacitor. When the first switching circuit is in the second state, the second switching circuit may clamp the second capacitor when current in the secondary winding is less than a third level, conduct current from the secondary winding to the second capacitor when current in the secondary winding exceeds a fourth level, and reduce current flow in the secondary winding responsive to discharge of the second capacitor.

[0019] According to method embodiments of the invention, first and second polarity voltages are alternately applied to a primary winding of a transformer. Energy is transferred to a load from a secondary winding of the transformer via a first capacitor responsive to application of the first polarity voltage to the primary winding. Energy is transferred to the load from the secondary winding via a second capacitor responsive to application of the second polarity voltage to the primary winding. The step of alternately applying first and second polarity voltages to a primary winding may comprise operating a switching circuit coupled to a DC power source and to the primary winding such that at least one switch of the switching circuit is constrained to operate when current in the at least one switch falls to a predetermined level. The step of alternately applying first and second polarity voltages to a primary winding may also comprise operating the switching circuit that at least one switch of the switching circuit is constrained to operate when voltage across the at least one switch falls to a predetermined level.

[0020] According to other method embodiments, the step of alternately applying first and second polarity voltages to a primary winding comprises controlling a frequency at which first and second half-bridges of a switching circuit coupled to a DC power source and to the primary winding operate. The step of alternately applying first and second polarity voltage may also include controlling a time delay between operations of the first and second bridges, e.g., to achieve reduced or substantially zero current switching. For example, a fixed time delay may be maintained between operations of the first and second half-bridges, or the time delay may be controlled responsive to a sensed current through the transformer and/or an input voltage applied to the switching circuit.

[0021] FIG. 1 is a schematic diagram illustrating a power conversion apparatus and method according to embodiments of the invention.

[0022] FIG. 2 is a waveform diagram graphically illustrating exemplary operations of a power conversion apparatus according to embodiments of the invention.

[0023] FIGS. 3-5 and 7 are schematic diagrams illustrating power conversion apparatus according to embodiments of the invention.

[0024] FIG. 6 is a schematic diagram illustrating a timing circuit according to embodiments of the invention.

[0025] FIGS. 8A-8B are waveform diagrams illustrating exemplary operations of a power conversion apparatus according to embodiments of the invention.

[0026] FIGS. 9 and 10 are schematic diagrams illustrating output circuits according to embodiments of the invention.

[0027] FIG. 11 is a schematic diagram illustrating a power supply according to embodiments of the invention.

[0028] The present invention now will be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein;

[0029] rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

[0030] In the drawings, like numbers refer to like elements.

[0031] FIG. 1 illustrates a power conversion apparatus 100 and method according to embodiments of the invention. The power conversion apparatus 100 includes a full-bridge switching circuit 110 coupled to a transformer 120 and an output circuit 130. The switching circuit 110 includes first, second, third and fourth switches 111, 112, 113, 114. An input port of the switching circuit 110 is coupled to a DC power source (not shown) at an input port 101 of the apparatus 100. An output port of the switching circuit 110 is coupled to a primary winding 121 of the transformer 120.

[0032] The output circuit 130 includes a switching circuit 135, here shown as a full-bridge rectifier circuit including diodes 131, 132, 133, 134. The switching circuit 135 has an input port coupled to a secondary winding 122 of the transformer 120. The output circuit 130 also includes first and second capacitors 141, 142, respective ones of which couple a first terminal of the input port of the switching circuit 135 to respective first and second terminals of an output port of the switching circuit 135. The output circuit 130 further includes an output inductor 150 configured to be coupled in series with the switching circuit 135 and a load (not shown) coupled to an output port 102 of the apparatus 100. The switching circuit 135, first and second capacitors 141, 142, and the output inductor 150 are used in resonant energy transfer operations, as described in detail below.

[0033] It will be appreciated that the power conversion apparatus 100 may be implemented using a variety of different electronic components and configurations. For example, the input switching circuit 110 may be implemented using switching transistors, such as insulated gate bipolar transistors or MOSFETs, or other suitable switching devices. The switching circuit 135 may be implemented using a passive diode bridge, as shown in FIG. 1, or by using an active circuit including switching devices, such as transistors, that may be controlled to provide similar functionality.

[0034] Exemplary operations of the power conversion apparatus of FIG. 1 will now be described with reference to FIG. 1 and the waveform diagrams of FIG. 2. In particular, FIG. 2 illustrates a two-part resonant energy transfer process in which energy is transferred from the secondary winding 122 of the transformer 120 to the output port 102 via respective ones of the capacitors 141, 142. It is assumed that prior to a time t₁, switches 112, 114 are “on” (closed) and switches 111, 113 are “off” (open), shorting the primary winding 121 of the transformer 120. It is also assumed that, prior to time t₁, a current freewheels through the output inductor 150 and the diodes 131, 132, 133, 134. After time t₁, switch 112 is turned off and switch 111 is turned on. As the secondary winding 122 of the transformer 120 is shorted by the conducting diodes 131, 132, 133, 134, the input voltage V_inapplied at the input port 101 initially appears across a leakage inductance (not shown) of the transformer 120, causing the primary current I_pand the reflected secondary current ^I_sto increase in a linear fashion. As the secondary current I_sincreases, current in the diodes 131, 133 decreases.

[0035] At a time t₂when the secondary current I_sbecomes equal or greater than the output current I_outin the output inductor 150, current in the diodes 131, 133 is reduced to approximately zero. After time t₂, current passing through the output inductor 150 is channeled through diodes 132, 134 and the secondary winding 122 of the transformer 120, and is reflected in the primary current I_p. Concurrently, a circuit including the capacitor 141 and the leakage inductance of the transformer 120 is effectively coupled in parallel with the secondary winding 122 of the transformer 120, causing the capacitor 141 to resonantly charge and generating a voltage V₁across the capacitor 141. As the capacitor 141 is discharged through the output inductor 150, current I_sthrough the secondary winding 122 is reduced, a reduction that is reflected in the primary current I_p. If the discharge current from the capacitor 141 is sufficiently high, the primary current I_pmay be reduced to substantially near zero at a time t₃.

[0036] When the primary current I_papproaches zero, switch 114 can be turned off and switch 113 can turned on under substantially reduced current conditions. Because the capacitor 141 has been charged to a voltage V₁greater than the input voltage V_in, the diode 132 becomes reverse biased, causing the secondary current I_sand the reflected primary current I_pto remain substantially near zero, even if switch 11430 remains on and switch 113 remains on after the primary and secondary currents I_p, I_sapproach zero. The capacitor 141 continues to discharge to supply the output current I_out. In this manner, energy is transferred from the secondary winding 122 of the transformer 120 to the output port 102 via resonant charging of the capacitor 141.

[0037] When the voltage V₁across the capacitor 141 approaches zero, a current again begins to freewheel through the output inductor 150 and the diodes 131, 132, 133, 134. Opening switch 114 and closing switch 113 shorts the primary winding 121 of the transformer 120.

[0038] At a time t₄, a second stage of the energy transfer cycle is begun by turning switch 131 off and turning switch 132 on, applying the input voltage V_inacross the primary winding 121 of the transformer 120 with a reversed polarity. The primary current I_pincreases in magnitude as the input voltage V_inis applied across the leakage inductance of the transformer 120. When the reflected secondary current I_sreaches the current I_outin the inductor 150 at time t₅, diodes 133, 132 turn off, causing current to be channeled through the secondary winding 122 of the transformer 120 and the output inductor 150 via the diodes 131, 134. Concurrently, the capacitor 142 begins charging, increasing the magnitude of the voltage V₂. When the capacitor 142 begins to discharge, the primary and secondary currents I_p, I_sbegin to decrease. If the discharge current is sufficiently high, the primary current I_pis reduced to at or near zero at time t₆, again allowing switch 113 to be turned off and switch 114 to be turned on under substantially reduced current conditions.

[0039] It will be appreciated that the above-described operations may be varied within the scope of the present invention. For example, the operations described above include switching the switches 111, 112, 113, 114 at times at which the primary current I_phas reached at or near zero, which may minimize switching losses. However, it will be appreciated that the present invention also includes “suboptimal” variations in which the switches 111, 112, 113, 114 are operated when the primary current I_pfalls to a predetermined non-zero level, such that lesser switching loss reductions may nonetheless be effected. In addition, although FIG. 3 illustrates operating the switches 111, 112, 113, 114 substantially instantaneously upon reduction of the primary current I_pto zero, these switching operations may be delayed as described above. Moreover, although it may be optimal to select the capacitors 141, 142 such that peak discharge current is sufficiently high to force the primary current I_pto near zero, alternative configurations that utilize capacitor values that provide lesser peak discharge currents may also be used with the present invention.

[0040] The full-bridge switching circuit 110 comprising switches 111, 112,113, 114 may be viewed as a combination of a first half-bridge (switches 111, 112) and a second half-bridge (switches 113, 114). The output voltage V_outproduced by the apparatus 100 may be regulated by modulating the frequency at which the half bridges operate. In particular, the half-bridges may be operated at near 50% duty cycles, with a time delay between the operation of the first half-bridge (switches 111, 112) and the second half-bridge (switches 113, 114) that preferably is at least as long at the time interval t_dfrom the time the primary current I_pbegins to flow and the time the primary current I_pagain falls to substantially near zero. It will be appreciated that this is a fundamentally different operational technique than those used in many conventional converters, i.e., converters that modulate pulse width and/or control phase shift.

[0041] The time interval t_dmay be expressed as: $\begin{array}{cc}{t}_d=\left(\frac{I_0}{V_{\mathrm{in}}}*L\right)+\frac{\arcsin \left(I_0\frac{\rho }{V_{\mathrm{in}}}\right)+\pi }{{\omega }_0},& \left(1\right)\end{array}$

[0042] where $\rho =\sqrt{\frac{L}{C}},$  ω₀={square root over (LC)},

[0043] C is the capacitance of capacitors 141, 142, and L is the inductance of the output inductor 150. It will be appreciated from equation (1) that as the input voltage V_inincreases, the time interval t_ddecreases, thus allowing the delay between operation of the leading and trailing half bridges to be decreased.

[0044] FIG. 3 illustrates a power conversion apparatus 300 and methods according to embodiments of the invention in which a regulated output voltage is produced by varying a frequency at which alternating polarity voltages are applied to the primary winding of a transformer 120 responsive to an output voltage V_outproduced by an output circuit 130 coupled to the secondary winding of the transformer 120, while a secondary current I_sis sensed to generate appropriate switch control signals to control a time delay between applications of the alternating polarity voltages to thereby provide reduced or substantially zero current switching. Elements of FIG. 3 that are identical to those illustrated in FIG. 1 are indicated by like reference numerals, and detailed description thereof will be omitted in light of the previous description with reference to FIG. 1. The power conversion apparatus 300 includes a voltage control circuit 330 that monitors the output voltage V_outand V_inand responsively generates a frequency command (e.g., an analog voltage or digital value) as an input for a switch control circuit 320. The switch control circuit 320 controls the switching frequencies of the first half-bridge (switches 111, 112) and the second half-bridge (switches 113, 114) responsive to the frequency command. The switch control circuit 320 is also operative to control the time delay between operations of the first and second half-bridges responsive to secondary current I_ssensed by a current detector 310. The switch control circuit 320 may maintain a time delay between operation of the first and second half-bridges that causes the switches 111, 112, 113, 114 to operate under reduced or substantially zero current switching conditions, as described above. In addition, the switch control circuit 320 also may maintain appropriate “dead time” between opening and closing operations of the switches of the each of the half-bridges (switches 111, 112 and switches 113, 114) to provide reduced or substantially zero voltage switching as described in greater detail below.

[0045] It will be further appreciated that the embodiments illustrated in FIG. 3 are offered for illustrative purposes, and that a variety of circuit implementations may be used with the present invention. For example, it will be appreciated that, in general, the voltage control circuit 330 and the switch control circuit 320 may be implemented using analog and/or digital circuitry, including, but not limited to, special-purpose analog and/or digital circuits and/or special or general purpose computing devices running firmware or software, such as microcontrollers, microprocessors, digital signal processors, and the like. It will also be appreciated that functions of such components may be integrated in a single device, such as a microcontroller, microprocessor, or application specific integrated circuit (ASIC), or may distributed among multiple devices.

[0046] FIG. 4 illustrates a power conversion apparatus 400 according to other embodiments of the invention. Elements of FIG. 4 that are identical to those illustrated in FIG. 1 are indicated by like reference numerals, and detailed description thereof will be omitted in light of the previous description of FIG. 1. A frequency command (e.g., an analog voltage or digital value) is applied to a clock signal generator circuit 440, which produces a clock signal having a frequency that varies responsive to the frequency command. The clock signal is applied to a first clock divider circuit 421 that divides the clock signal to produce complementary switch signals to control switches 113, 114 of a first half-bridge. The switching control signals produced by the clock divider circuit 431 may have approximately 50% duty cycle and may maintain dead time between opening and closing operations of switches 113, 114 to provide reduced or substantially zero voltage switching as described in greater detail below.

[0047] Switches 111, 112 of a second half-bridge are controlled by similar signals generated by a second clock divider circuit 432. A zero-crossing detector circuit 420 generates a zero-crossing detection signal responsive to a current transformer 410 that senses secondary current I_s. The zero-crossing detector circuit 420 generates a pulse in the zero-crossing detection signal when the secondary current I_sis substantially zero, such that the zero crossing detection signal is effectively a clock signal that has a frequency that is slaved to the input clock signal provided by the clock signal generator circuit 440 through the operation of the resonant circuit 130. The zero-crossing detection signal is applied to the second clock divider circuit 432, producing complementary switching control signals that are applied to the switches 111, 112. The switching control signals may have approximately 50% duty cycle, and may maintain dead time between opening and closing operations of the switches 111, 112 to provide reduced or substantially zero voltage switching as described in greater detail below.

[0048] It will be appreciated that the embodiments illustrated in FIG. 4 are offered for illustrative purposes, and that a variety of different control circuits may be used with the present invention. For example, it will be appreciated that, in general, the zero-crossing detector circuit 420, the clock signal generator circuit 440 and the clock divider circuits 431, 432, may be implemented using analog and/or digital circuitry, including, but not limited to, special-purpose analog and/or digital circuits and/or special or general purpose computing devices running firmware or software, such as microcontrollers, microprocessors, digital signal processors, and the like. It will also be appreciated that functions of such components may be integrated in a single device, such as a microcontroller, microprocessor or application specific integrated circuit (ASIC), or may distributed among multiple devices.

[0049] FIG. 5 illustrates a power conversion apparatus 500 according to other embodiments of the invention, which do not require sensing current to maintain desired phasing between half-bridges. Elements of the power conversion apparatus 500 that are identical to those illustrated in FIG. 1 are indicated by like reference numerals, and detailed description thereof will be omitted in light of the previous description of FIG. 1. A switch control circuit 510 is responsive to regulate an output voltage V_outusing a delay between operations of the first half-bridge (switches 111, 112) and a second half-bridge (switches 113, 114) that is determined based on the input voltage V_out. An appropriate delay t_d′ introduced between operations of the first and second half-bridges by the switch control circuit 510 may be estimated using the relation: $\begin{array}{cc}{t}_d^{\prime }\left(V_{\mathrm{in}}\right)=t_d\left(V_{\mathrm{in},\max },I_{\mathrm{out},\max }\right)-\frac{t_d\left(V_{\mathrm{in},\min },I_{\mathrm{out},\max }\right)-t_d\left(V_{\mathrm{in},\max },I_{\mathrm{out},\max }\right)}{V_{\mathrm{in},\max }-V_{\mathrm{in},\min }}*\left(V_{\mathrm{in}}-V_{\mathrm{in},\min }\right),& \left(2\right)\end{array}$

[0050] where t_d′(V_in) is the desired delay time for a given value of the input voltage V_in, t_d(V_in,min, I_{out, max}) is the time required for secondary current to begin to flow and again return to near zero for a minimum input voltage V_in,minand a maximum output current i_{out, max}, and t_d(V_in,max, I_out,max) is the time required for secondary current to begin to flow and again return to near zero for a maximum input voltage V_{in, max}and a maximum output current I_{out, max}. The switching control signals produced by the switch control circuit 510 may have approximately 50% duty cycle, and may 30 introduce appropriate “dead time” between opening and closing operations of the switches 111, 112 and the opening and closing operations of switches 113, 114 to provide reduced or substantially zero voltage switching as described in greater detail below.

[0051] FIG. 6 illustrates a timing circuit 600 for determining an appropriate delay time from an input voltage V_inaccording to embodiments of the invention. The timing circuit 600 includes a monostable multivibrator 610 (e.g., a “555” timer chip) having a trigger input TRIGGER that receives a clock signal CLK that has a frequency proportional to a desired frequency at which input half-bridges (e.g., switches 111, 112, 113, 114 of FIG. 5) are to operate. Responsive to a transition (e.g., leading edge) of the clock signal CLK, the multivibrator 610 produces a pulse PULSE at an output terminal OUT having a width that is controlled by first and second resistors R₁, R₂and a capacitor C₁coupled to a threshold input THRESHOLD. The resistors R₁, R₂and the capacitor C₁can be selected such that the pulse width satisfies equation (2).

[0052] It will be appreciated that the embodiments illustrated in FIGS. 5-6 are illustrative, and that a variety of different control circuits may be used with the present invention. For example, it will be appreciated that, in general, the switch control circuit 510 of FIG. 5 may be implemented using analog and/or digital circuitry, including, but not limited to, special-purpose analog and/or digital circuits and/or special or general purpose computing devices running firmware or software, such as microcontrollers, microprocessors, digital signal processors, and the like.

[0053] As mentioned above, timing of the opening and closing of the switches of a conversion apparatus such as the apparatus 100 of FIG. 1 may be controlled such that reduced or “zero voltage” switching (ZVS) may be achieved in addition to the reduced current switching described above. Exemplary operations for achieving such reduced voltage switching will now be described with reference to FIGS. 7 and 8.

[0054] Referring to FIG. 7, a power conversion apparatus 700 according to other embodiments of the present invention includes a full-bridge input switching circuit 710 including switching transistors 711, 712, 713, 714, here shown as MOSFETs which have integral diodes (it will be appreciated that, if switching devices other than MOSFETs are used, actual diodes may be used) and associated switch capacitances. An input port of the switching circuit 710 receives a DC input voltage V_inat an input port 701 of the apparatus 700. An output port of the switching circuit 710 is coupled to a primary winding of a transformer 720, here modeled as including an ideal 1:1 transformer 721, a leakage inductance 722 and a magnetizing inductance 723. The switching transistors 711, 712, 713, 714 are controlled by signals generated by a switch control circuit 770. A secondary winding of the transformer 720 is coupled to a output circuit 730 that includes diodes 731, 731, 733, 734 connected in a full bridge configuration, first and second storage capacitors 741, 742, an output inductor 750 and a filter capacitor 760. The apparatus 700 may produce a DC output voltage V_outat an output port 702 from an input voltage V_inat the input port 701 in a manner similar to that described above with reference to FIG. 1. FIGS. 8A-8B illustrate exemplary switching operations that may be used in passing from a period in which the input voltage V_inis applied to the primary of the transformer 720 via switches 712, 713 to a period in which the input voltage V_inis applied to the primary of the transformer 720 via switches 711, 714. It will be readily apparent that similar switching operations are also applicable to a transition from a period in which the input voltage V_inis applied to the primary of the transformer 720 via switches 711, 714 to a period in which the input voltage V_inis applied to the primary of the transformer 720 via switches 712, 713.

[0055] In a time interval from a time t₇to time t₈, switches 711, 714 are off while switches 712 and 713 are on, thus applying the input voltage V_into the primary of the transformer 720 during an energy transfer cycle in which a current I₇₁₂flowing through the switch 712 first increases and then decreases through the operation of the resonant circuit 730, in manner similar to that described above with reference to FIGS. 1 and 2. The application of the input voltage V_inacross the primary of the transformer 720 also causes a magnetizing current I^mflowing through the magnetizing inductance 723 to increase in magnitude. At time t₈(i.e., a time at when a current through the switch 712 reaches a desirably low level), switch 712 is opened, leaving the primary of the transformer 720 open-circuited. When switch 712 is opened, the magnetizing current I_mbegins to charge the capacitance of switch 712 and to concurrently discharge the capacitance of switch 711. Voltage V₇₁₁across switch 711 decreases while the voltage V₇₁₂across switch 712 increases. Once the voltage V₇₁₂approaches the input voltage V_in, the integral diode of switch 711 begins to conduct. Eventually, the voltage V₇₁₁is reduced to the point that switch 711 can be turned on at time t₉under reduced or substantially near zero voltage conditions. After switch 711 is turned on at time t₉, switches 711 and 713 short the primary of the transformer 720, “trapping” the magnetizing current I_min the primary of the transformer 720.

[0056] It will be understood that optimal reduction in switching losses may be achieved if the interval between the opening of switch 712 and the closing of switch 711 is sufficiently long to allow the voltage across the switch 711 to reach substantially near zero voltage. A minimum time to achieve substantially zero voltage may be viewed at the time required for the magnetizing current I^mto charge the total effective capacitance at the junction of switches 711, 712 to the input voltage V_in. However, it will be understood that longer delays may be used, as the diode across switch 711 will conduct to maintain a low voltage across switch 711.

[0057] Referring now to FIG. 8B, at time t₁₀, switch 713 is turned off, causing the magnetizing current I^mto charge the capacitance of switch 713 and to concurrently discharge the capacitance of switch 714 as the voltage V₇₁₃across switch 713 increases towards the input voltage V_inand the voltage V₇₁₄across switch 714 eventually falls near zero, such that switch 714 may be turned on at t₁₁under reduced or substantially near zero voltage conditions. Upon closing of switch 714, current I₇₁₄through switch 714 begins to build as a new energy transfer cycle begins.

[0058] Unlike the previous transition between the opening of switch 712 and the closing of switch 711, however, the opening of switch 713 causes voltage across the primary of the transformer 720 to build up. In order for the voltage across switch 714 to be reduced to near zero, the magnetizing current I_mpreferably is at least equal to current that builds up in the leakage inductance 722 as the voltage V₇₁₃across switch 713 approaches the input voltage V_in. Otherwise, if the current in the leakage inductance 722 becomes equal to the magnetizing current I^mbefore the voltage V_sw3across switch 713 approaches V_in, the charging/discharging process may stop before the voltage V_sw4across switch 714 reaches a desirably low level.

[0059] From the above description, it can be seen that a difference in operation exists between the transition of the “leading” half-bridge comprising switches 711, 712 and the transition of the “trailing” half-bridge comprising switches 713, 714. In order to reduce losses associated with the charging/discharging of the switch capacitances, it may be advantageous for energy provided by the magnetizing current I_mto be sufficient to fully discharge the switch capacitances without undue dissipation in the switches and the transformer 720. However, it will be appreciated that other performance criteria, such as electromagnetic interference (EMI) criteria, may influence the selection of the proper magnetizing inductance and the dead time between switching operations of the half-bridges.

[0060] If it is assumed that capacitances of the switches 713, 714 are independent of the voltage and a time interval (t₁₀-t₉) between time t₉and time t₁₀is constant, an energy constraint for the switching of switches 713, 714 may be expressed as:

[0061] ½L*I_m,pk²=½C_sw*V_in²,  (3)

[0062] where L is the value of the leakage inductance 722, I_m,pkis the peak value of the magnetizing current I_m, C_swis the total capacitance of the switches 711, 713. The peak magnetizing current I_m,pkmay be expressed as: $\begin{array}{cc}{I}_{m,\mathrm{pk}}=\frac{1}{2}*\frac{V_{\mathrm{in}}}{L_m*\left(t_{10}-t_9\right)},& \left(4\right)\end{array}$

[0063] where L_mis the value of the magnetizing inductance 723.

[0064] An advantageous value L_mfor the magetizing inductance 723 can be found by combining equations (3) and (4) to produce:

[0065] L_m=½*(t₁₀-t₉)*L/C_sw.  (5)

[0066] As mentioned above, in addition to providing adequate magnetizing energy to allow zero voltage switching of switches 713, 714, it may also desirable to provide sufficient delay between the switching of switches 711, 712 to allow these switches to be operated under substantially zero voltage conditions. If the magnetizing energy is exactly equal to that defined by equation (3), it may be desirable that the delay t_d1between the operations of switches 711, 712 be approximately equal to a quarter of the natural period of oscillation of L and C_sw: $\begin{array}{cc}{t}_{\mathrm{d1}}=\frac{\pi \sqrt{L{C}_{\mathrm{sw}}}}{2}.& \left(6\right)\end{array}$

[0067] It will be understood that output circuits according to the invention may have different configurations than those illustrated in FIGS. 1 and 3-5 and 7. In embodiments of the invention shown in FIG. 9, a output circuit 930 coupled to first and second secondary windings 922a, 922bof a transformer 920 may include parallel-connected resonant circuits 930a, 930bthat produce an output voltage V_outacross an output capacitor 960. The first output circuit 930aincludes diodes 931, 932 which control energy transfer to a first capacitor 941 and on to a load (not shown) coupled across the output capacitor 960 via a first output inductor 951 responsive to application of a voltage of a first polarity across a primary winding 921, in a manner similar to that described with reference to FIG. 1. The second output circuit 930bincludes diodes 933, 934 that control energy transfer to a second capacitor 942 and on to a load via a second output inductor 952 responsive to application of an opposite polarity voltage across the primary winding 921.

[0068] In embodiments of the invention illustrated in FIG. 10, a output circuit 1030 coupled to first and second secondary windings 1022a, 1022bof a transformer 1020 includes series-connected output circuits 1030a, 1030b. The first output circuit 1030aincludes diodes 1031, 1032 that control energy transfer to a first capacitor 1041 and on to a load (not shown) coupled across an output capacitor 1060 via a first output inductor 1051 responsive to application of a voltage of a first polarity across a primary winding 1021 of the transformer 1020, in a manner similar to that described above with reference to FIG. 1. The second output circuit 1020bincludes diodes 1033, 1034 that control energy transfer to a second capacitor 1042 and on to the load via a second inductor 1052 responsive to application of an opposite polarity voltage cross the primary winding 1021.

[0069] It will be appreciated that the circuit topologies illustrated in FIGS. 9 and 10 ay be controlled using techniques similar to those described above with reference to FIGS. 1-8. It will also be appreciated that, in other embodiments of the invention, an output circuit for a power conversion apparatus may be constructed such that it is reconfigurable to either of the output circuit topologies of FIGS. 9 and 10 using, for example, appropriate switching elements. In such a manner, a power conversion apparatus capable of supplying different output voltage levels may be provided.

[0070] FIG. 11 illustrates a power supply 1100 according to embodiments of the present invention, which includes a DC-DC power converter 1120 that can provide reduced current and/or reduced voltage switching as described above. The power supply 1100 is configured to connect to an AC power supply 10, and includes a rectifier circuit 1110 that receives an AC input voltage VAC from the AC power supply 10, and provides a DC voltage VDC to an energy storage circuit, here shown as a capacitor 1120.

[0071] The power supply 110 further includes a power converter 1130 that receives the DC voltage VDC and generates an output voltage Vout therefrom. In particular, the power converter 1130 includes a switching circuit 1131 that, responsive to control signals generated by a voltage control circuit 1134, applies the DC voltage VDC with alternating polarity across a primary winding of a transformer 1132, e.g, in a manner as described above. An output circuit 1133 coupled to a secondary winding of the transformer 1132 generates the output voltage Vout using alternating energy transfers via first and second capacitors 1133a, 1133b. The voltage control circuit 1134 controls the switching circuit 1131 based on the output voltage V_out, e.g, by modulating the frequency at which first and second half-bridges in the switching circuit 1131 operate, as described above. Preferably, the voltage control circuit 1134 controls the switching circuit 1131 to provide reduced current and voltage switching as described above.

[0072] It will be appreciated that the power supply 1100 is presented for illustrative purposes, and that the invention may be used in a variety of other applications. For example, power converters according to the invention may be used in other types of power supplies, such as uninterruptible power supplies, as well as in other DC-DC converter applications. These may include, for example, rack-mounted power supplies, power supplies integrated in devices such as computers or telecommunications equipment, and integrated circuit power conversion devices.

[0073] In the drawings and specification, there have been disclosed typical preferred embodiments of the invention and, although specific terms are employed, they are used in a generic and descriptive sense only and not for purposes of limitation, the scope of the invention being set forth in the following claims.