Semiconductor apparatus and frame used for fabricating the same

[0002] This application claims the priority of application Ser. No. H10-232127, filed Aug. 18, 1998 in Japan, the subject matter of which is incorporated herein by reference.

[0003] The present invention relates to a semiconductor apparatus, and more particularly to a heat-radiating mechanism for a semiconductor package.

[0004] A conventional semiconductor apparatus is described in Japanese Patent Laying Open Kokai No. H6-78574. The conventional semiconductor apparatus includes a package substrate, a semiconductor chip mounted on a surface of the package substrate, an elastic layer and a wiring pattern. The elastic layer is made of an insulating material and is formed to surround the semiconductor chip. A film including the wiring pattern and a base film is formed on the semiconductor chip and the elastic layer. The wiring pattern includes leads connected at one end to the semiconductor chip and at the other end to outer terminals, which are provided on the elastic layer. The semiconductor chip is provided in an opening of the elastic layer, and is molded with resin by a potting process.

[0005] In the above described conventional semiconductor apparatus, the semiconductor chip is arranged between the package substrate and the molding resin, so that heat generated in the semiconductor chip is not radiated sufficiently. As a result, the semiconductor chip is over heated, and therefore, performance and reliability of the semiconductor chip may deteriorate.

[0006] Accordingly, an object of the present invention is to provide a semiconductor apparatus in which a semiconductor chip is prevented from overheating.

[0007] Another object of the present invention is to provide a frame, used for fabricating a semiconductor apparatus, in which a semiconductor chip is prevented from overheating.

[0008] Additional objects, advantages and novel features of the present invention will be set forth in part in the description that follows, and in part will become apparent to those skilled in the art upon examination of the following or may be learned by practice of the invention. The objects and advantages of the invention may be realized and attained by means of the instrumentalities and combinations particularly pointed out in the appended claims.

[0009] According to a first aspect of the present invention, a semiconductor apparatus includes an insulation tape which is provided with a device hole therein; and a semiconductor chip which is mounted in the device hole of the insulation tape, and is provided at a first surface with electrode pads. The semiconductor apparatus also includes a wiring pattern which comprises leads connected at one end to the electrode pads; and a heat-radiation member which is provided on the first surface of the semiconductor chip so that heat generated in the semiconductor chip is radiated outwardly via the heat-radiation member.

[0010] According to a second aspect of the present invention, a frame includes an insulation tape which is provided with a device hole, in which a semiconductor chip is mounted; and a wiring pattern which includes leads connected at one end to electrode pads, provided on a first surface of the semiconductor chip. The frame also includes a heat-radiation member which is provided on the first surface of the semiconductor chip so that heat generated in the semiconductor chip is outwardly radiated via the heat-radiation member.

[0011] As described above, according to the present invention, heat generated in the semiconductor chip is radiated through the heat-radiation member. As a result, the heat-radiation rate of the semiconductor chip is increased, and therefore, the semiconductor chip is prevented from over heating.

[0012] FIG. 1A is a plane view illustrating a conventional semiconductor apparatus in a condition before a resin molding process.

[0013] FIG. 1B is a cross-sectional view illustrating the conventional semiconductor apparatus, shown in FIG. 1A, in a condition after the resin molding process.

[0014] FIG. 2A is a plane view illustrating a semiconductor apparatus, according to a first preferred embodiment of the present invention, in a condition before a resin molding process.

[0015] FIG. 2B is a cross-sectional view illustrating the semiconductor apparatus, shown in FIG. 2A, in a condition after the resin molding process.

[0016] FIG. 3 is a cross-sectional view illustrating a semiconductor apparatus, according to a second preferred embodiment of the present invention.

[0017] FIG. 4A is a plane view illustrating a semiconductor apparatus, according to a third preferred embodiment of the present invention, in a condition before a resin molding process.

[0018] FIG. 4B is a cross-sectional view illustrating the semiconductor apparatus, shown in FIG. 4A, in a condition after the resin molding.

[0019] FIG. 5A is a plane view illustrating a semiconductor apparatus, according to a fourth preferred embodiment of the present invention, in a condition before a resin molding process.

[0020] FIG. 5B is a cross-sectional view illustrating the semiconductor apparatus, shown in FIG. 5A, in a condition after the resin molding process.

[0021] FIG. 6 is a plane view illustrating a semiconductor apparatus according to a fifth preferred embodiment of the present invention.

[0022] For better understanding of the present invention, a conventional technology is first described. FIGS. 1A and 1B depict a conventional semiconductor apparatus in conditions before and after a resin molding process, respectively. Such a conventional semiconductor apparatus is described in Japanese Patent Laying Open Kokai No. H6-78574.

[0023] The conventional semiconductor apparatus includes a package substrate 21, a semiconductor chip 22, an elastic layer 23 and a wiring pattern 25. The semiconductor chip 22 is mounted on a surface of the package substrate 21. The elastic layer 23 is made of insulating material and is formed to surround the semiconductor chip 22. A film, including the wiring pattern and a base film 26, is formed on the semiconductor chip 22 and the elastic layer 23. The wiring pattern 25 includes leads connected at one end to connecting portions of the semiconductor chip 22 and at the other end to outer terminals 24, which are provided on the elastic layer 23. The base film 26 is shaped to be square to cover the elastic layer 23. The semiconductor chip 22 provided in an opening of the elastic layer 23 is molded with resin 27 using potting equipment.

[0024] In the above described conventional semiconductor apparatus, the semiconductor chip 22 is arranged between the package substrate 21 and the molding resin 27, so that heat generated in the semiconductor chip is not radiated sufficiently. As a result, the semiconductor chip 22 is over heated, and therefore, performance and reliability of the semiconductor chip 22 may deteriorate. In general, a semiconductor chip generates much heat at a surface on which electrodes are formed. According to the above mentioned conventional semiconductor apparatus, the surface is covered with the molding resin 27, therefore heat cannot be radiated well. On the other hand, heat generated in the semiconductor chip 22 can be radiated through itself, however, enough heat cannot be transferred to the substrate 21.

[0025] FIGS. 2A and 2B show a TCP (Tape Carrier Package) type of semiconductor apparatus, according to a first preferred embodiment of the present invention. In this application, TCP means a package fabricated using TAB (Tape Automated Bonding) technology, including a T-BGA (Tape Ball Grid Allay). That is, the invention is applicable to semiconductor apparatus fabricated using a BGA (Ball Grid Allay) technique.

[0026] An insulation tape 101 is made of material having an electrical insulation characteristic, such as polyimide, and is shaped to be square. The insulation tape 101 is provided with a device hole 104 in which a semiconductor chip 103 is mounted. The insulation tape 101 is provided at a surface with a wiring pattern 102 made of conductive material, such as copper.

[0027] The wiring pattern 102 includes leads extending perpendicular to each side of the device hole 104. Each lead has one end connected, via bumps 106, to electrode pads of the semiconductor chip 103, and another end connected to outer terminals 110.

[0028] A heat-radiation pattern 105 is provided on a surface 103aof the semiconductor chip 103 where the electrode pads are arranged on. The heat-radiation pattern 105 is shaped to be square and is in contact with the surface 103awith an adhesive layer 107. The heat-radiation pattern 105 is provided at each corner with a support member 105a, which extends outwardly. Each support member 105ais connected to the insulation tape 101.

[0029] The insulation tape 101, the wiring pattern 102 and the heat-radiation pattern 105 form a frame. The wiring pattern 102 and the heat-radiation pattern 105 are made of a conductive material, such as copper. The frame is used for TAB (Tape Automated Bonding). For fabricating the frame, a two-layer structure or a three-layer structure can be used. The two-layer structure includes an insulation tape and a conductive layer. The three-layer structure includes an adhesive layer between the insulation tape and the conductive layer.

[0030] When the two-layer structure is applied to the first preferred embodiment of the present invention, a metal layer is formed on an insulation tape by a chemical plating or sputtering technique. Next, a resist layer is patterned on the metal layer by a photolithography technique. Then, the wiring pattern and the heat-radiation pattern of copper are formed by electrolytic plating using the resist layer as a mask.

[0031] The room surrounding the semiconductor chip 103 in the device hole 104 is filled up with a molding resin 108. The wiring pattern 102 is covered at the portions extending into the device hole 104 with the molding resin 108. The heat-radiation pattern 105 is also covered with the molding resin 108. An insulating layer 109 is provided at the portions of the wiring pattern 102, that are connected to the insulation tape 101. The insulating layer 109 is not provided at the portions where the outer terminals 110 are connected.

[0032] In the above described semiconductor apparatus according to the first preferred embodiment of the present invention, when fabricated, the outer terminals 110 are connected to a wiring pattern of a substrate, not shown. Outer circuitry on the substrate are connected to the inner circuitry of the semiconductor chip 103 via the outer terminals 110, the wiring pattern 102 and the bumps 106.

[0033] The semiconductor chip 103 is exposed at the other (upper) surface, so that heat generated in the semiconductor chip 103 is directly radiated from the upper surface, as shown in FIG. 2B. Heat generated in the semiconductor chip 103 is radiated through the heat-radiation pattern 105 to the air and to the substrate. Consequently, heat of the semiconductor chip 103 is well radiated to the outside, and therefore overheating of the semiconductor chip can be prevented.

[0034] FIG. 3 shows a semiconductor apparatus according to a second preferred embodiment of the present invention. In FIG. 3, the same or corresponding components of the first preferred embodiment shown in FIGS. 2A and 2B are represented by the same reference numerals; and the same description is not repeated to avoid redundant explanation.

[0035] In the semiconductor apparatus according to the second preferred embodiment, shown in FIG. 3, outer terminals 111 are connected to a heat-radiation pattern 105. The heat-radiation pattern 105 is covered at the bottom surface with an insulation layer 109 except for the region where the outer terminals 111 are provided. In mounting a process, the outer terminals 111 are connected to a substrate (not shown) in the same manner as outer terminals 110.

[0036] FIGS. 4A and 4B show a semiconductor apparatus according to a third preferred embodiment of the present invention. In FIGS. 4A and 4B, the same or corresponding components of the first and second preferred embodiments, shown in FIGS. 2A, 2B and 3 are represented by the same reference numerals; and the same description is not repeated to avoid redundant explanation.

[0037] In the third preferred embodiment, shown in FIGS. 4A and 4B, a heat-radiation pattern 105 is provided with round openings 105b, through which a gas generated from an adhesive layer 107 travels outwardly. As a result, when moisture or water contained in the adhesive layer 107 is gasified by heat of the semiconductor chip 103, the gas is radiated out of the heat-radiation pattern 105. Thus, an undesirable force is not applied between the semiconductor chip 103 and the heat-radiation pattern 105, and therefore, those elements are prevented from being broken by such a force.

[0038] FIGS. 5A and 5B show a semiconductor apparatus according to a fourth preferred embodiment of the present invention. In FIGS. 5A and 5B, the same or corresponding components of the first to third preferred embodiments, shown in FIGS. 2A, 2B, 3, 4A and 4B are represented by the same reference numerals; and the same description is not repeated to avoid redundant explanation.

[0039] In the fourth preferred embodiment, shown in FIGS. 5A and 5B, a heat-radiation pattern 105 includes a radiating portion 105cand connecting portions 105d. The radiating portion 105cis designed to be in contact with the center of a surface 103aof the semiconductor chip 103. The connecting portions 105dextend from the radiating portion 105coutwardly in the same manner as the leads of the wiring pattern 102.

[0040] The connecting portions 105dare electrically connected at one end to electrode pads of the semiconductor chip 103 via bumps 106. Preferably, the electrodes of the semiconductor chip 103 connected to the connecting portions 105dare supply electrodes or ground electrodes, which do not change in voltage. If the connecting portions 105dare connected to supply electrodes or ground electrodes of the semiconductor chip 103, the heat-radiation pattern 105 can be used as a common plane, so that the voltage level can be stable. And therefore, margin to outer noise can be increased.

[0041] FIG. 6 shows a semiconductor apparatus according to a fifth preferred embodiment of the present invention. In FIG. 6, the same or corresponding components of the first to fourth preferred embodiments, shown in FIGS. 2A, 2B, 3, 4A, 4B, 5A and 5B are represented by the same reference numerals; and the same description is not repeated to avoid redundant explanation.

[0042] In the fifth preferred embodiment, shown in FIG. 6, a heat-radiation pattern 105 includes a radiating portion 105cand connecting portions 105d. Each pair of the connecting portions 105dare arranged at both sides of a micro-stream line (high-speed signal line) 102ain the leads 102. Preferably, the connecting portions 105dare connected to supply electrodes or ground electrodes, so that the connecting portions 105dfunction as a barrier which prevents cross-influence between the adjacent two signal lines.