Method for manufacturing a semiconductor package on a leadframe

[0002] This invention relates to a method of manufacturing a semiconductor package on a leadframe. The invention is particularly suitable for, but not limited to, semiconductor packages that are mounted on leadframes which are trimmed from a strip after semiconductor dies have been encapsulated.

[0003] Leadframes are employed during the manufacture of semiconductor packages. The advantage of lead frames is that leads of a semiconductor package can be kept in a desired position relative to each other and an associated flag (die mount) during wire bonding to a die and encapsulation of the die. Examples of known leadframes are disclosed in U.S. Pat. Nos. 5,882,955 and 5,889,317 both by Huang, Chih-Kung et al, and both assigned to Sitron Precision Co., Ltd.

[0004] A conventional leadframe has a flag portion coupled to peripheral portions by tie bar portions, and lead portions that extend inwardly from the peripheral portion towards the flag portion. Dam bar portions extend between adjacent lead portions, as well as between, lead portions and the peripheral portions.

[0005] A typical semiconductor packaging process comprises the steps of mounting a semiconductor die on the flag portion, connecting wires between the semiconductor die and free ends of the lead portions, and encapsulating the semiconductor die, the flag portion, the free ends of the lead portions and the wires in mold compound, to form a semiconductor package on the leadframe. Next, during a trim and form operation, the dam bar portions are cut away, and the lead portions are severed from the peripheral portions and bent to a predetermined shape. Finally, the tie bar portions are severed, thus separating the semiconductor package from the leadframe. The semiconductor packages are then individually tested. Handling individual semiconductor packages during testing is difficult, in part due to their small size, and in part due to the need for each of the semiconductor packages to be arranged in a particular orientation for testing. Another problem is defects, such as bent leads, caused by handling.

[0006] To reduce these handling problems, an approach that has been considered is to test the semiconductor packages while they are attached to the leadframe by the tie bar portions, i.e. before severing the tie bar portions. However, since all the flag portions on a leadframe are electrically coupled by the tie bar portions to the leadframe, effectively, this structure shorts all the flag portions together. In order to test the semiconductor packages on the leadframe, the semiconductor packages need to be electrically isolated.

[0007] Conventionally, removing the dam bar portions, severing and forming the lead portions, and severing the tie bar portions is performed by an integrated process utilizing in-line automated equipment. A disadvantage of testing first, then severing the tie bar portions is the interruption of the inline process. Another disadvantage is that, after testing, a leadframe must now be loaded onto a machine to sever the tie bar portions. These disadvantages reduce the efficiency of the semiconductor packaging process.

[0008] The invention will now be described, by way of example, with reference to the drawings, in which:

[0009] FIGS. 1(a) to (g) inclusive are top plan views of the steps of the method of manufacturing the semiconductor package;

[0010] FIGS. 2(a), (b) and (c) are respective top plan, side elevation and end elevation views of the semiconductor package; and

[0011] FIG. 3 is a sectional side view of the semiconductor package connected to a testing unit.

[0012] Referring to FIG. 1(a), there is illustrated a strip 10 having a leadframe 20 for packaging a semiconductor device in accordance with the present invention. Leadframe 20 has a flag portion 21 to support semiconductor die 31. A support portion 22 connects flag portion 21 to peripheral portion 23. Leadframe 20 has a plurality of lead portions 24. Each portion 24 has an inner lead portion 25, having a free end extending inwardly towards (but spaced a small distance from) flag portion 21, and an outer lead portion 26 extending from peripheral portion 23. The lead portions 24 and support portion 22 are connected together by connecting portions 27 which extend to strip 10.

[0013] During a semiconductor packaging process, semiconductor die 31 is mounted on flag portion 21, and wires 33 bonded between the free ends of inner lead portions 25 and semiconductor die 31. Semiconductor die 31, flag portion 21, the wires, and the inner lead portions 25, are then encapsulated in encapsulant or mold compound to form a semiconductor package. The molds (not shown) advantageously have cavities that form molded links between semiconductor package 30 (in FIG. 1(b)) that will be formed and strip 10.

[0014] Referring to FIG. 1(b), connecting portions 27 and strip 10 act as dambars for encapsulant during the molding process. The molding process forms links 40 which couple and support semiconductor package 30 on strip 10. As links 40 are of mold compound which is non-electrically conductive, semiconductor package 30 is supported on strip 10 but is electrically isolated from strip 10.

[0015] Referring to FIG. 1(c), connecting portions 27 are removed and links 40 continue to support semiconductor package 30 in the strip 10.

[0016] Referring to FIG. 1(d), outer lead portions 26 are severed from peripheral portion 23 and semiconductor die 31 can be connected to a test unit 50 (see FIG. 3) for functionality tests. Alternatively, as shown in FIG. 1(e), lead portions 24 are progressively formed.

[0017] As shown in FIG. 1(f), semiconductor package 30 is now ready to be singulated from strip 10, and this is effected by a push pin 60 or other mechanical driver which causes semiconductor package 30 to be released from strip 10 by breaking links 40. Semiconductor package 30 (see FIGS. 2(a) to (c) inclusive) is now formed.

[0018] The method of the present invention, as described, advantageously enables links 40 to be formed integrally with semiconductor package 30 as semiconductor die 31 and other components are encapsulated; enables semiconductor package 30 to be linked to, and supported by, strip 10 for electrical testing of semiconductor die 31 for functionality, semiconductor package 30 being electrically isolated from strip 10; and enables the completed semiconductor package 30 to be easily released from strip 10 in a controlled manner.

[0019] This enables high productivity rates to be maintained, while minimizing damage to semiconductor package 30 during the manufacturing and testing steps.