Non-isolated A.C./D.C. converter

[0002] 1. Field of the Invention

[0003] The present invention relates to non-isolated power supplies for supplying a low D.C. voltage from a high A.C. voltage. Such power supplies, also called power converters, can be found in most electric household appliances, for example, washing machines, for the supply of low voltage circuits such as, for example, logic circuits (microprocessors, programmable logic), control circuits of electromechanical actuators (relays) or electronic actuators (triacs), etc . . .

[0004] The present invention more specifically relates to converters intended for providing two D.C. voltages, one of which is positive and the other one of which is negative with respect to a reference point also forming a reference for the A.C. power supply.

[0005] 2. Discussion of the Related Art

[0006] FIG. 1 shows a first example of a conventional AC/DC converter with positive and negative outputs. This converter uses a transformer T, the primary winding L1 of which receives on two terminals E1 and E2 an A.C. voltage Vac (for example, mains 240 V/50 Hz or 110 V/60 Hz). The two terminals of secondary L2 of transformer T provide a low A.C. voltage Vi, the peak amplitude of which approximately corresponds to the values desired for output voltages V+ and V− of the converter. Each output voltage V+, V− is sampled across a capacitor, respectively C1, C2. Each capacitor is connected, in series with a diode, respectively D1, D2, to secondary winding L2 of the transformer. The anode of diode D1 and the cathode of diode D2 are connected to the high terminal of winding L2. The common node M of capacitors C1 and C2, which is the reference of voltages V+ and V−, is connected to input terminal E2.

[0007] FIG. 2 shows a second conventional example of an AC/DC converter adapted to providing two output voltages V+ and V− of opposite signs. A high voltage capacitor Cx is connected via a resistor R of small value to input terminal E1. The second terminal of capacitor Cx is connected via rectifying diodes D1, D2 to low voltage capacitors C1 and C2, the second terminals of which are connected to a reference terminal M connected to terminal E2. A Zener diode DZ1, DZ2, is connected in parallel on each of capacitors C1, C2. Capacitor Cx has a small value as compared to that of each of capacitors C1, C2, to provide a high impedance to the variations of the input voltage.

[0008] The above-described converters are relatively simple to form due to the small number of components used. However, these converters have the major disadvantage of being bulky and expensive.

[0009] For the converter of FIG. 1, the high cost and the large bulk are due to the transformer. Further, non-negligible losses appear even in the absence of any flow (iron losses of the transformer).

[0010] For the converter of FIG. 2, the cost and the bulk are due to the capacitor that must withstand the voltage of the supply system. This converter further generates non-negligible losses.

[0011] The present invention provides a novel solution to make a converter from a high A.C voltage into two symmetrical low D.C. voltages, which overcomes the disadvantages of known solutions.

[0012] The present invention aims, in particular, at providing a novel solution with a reduced or minimized bulk.

[0013] The present invention also aims at a solution that respects electromagnetic compatibility constraints.

[0014] The present invention also provides a novel converter that automatically adapts to the current demand of the load. More specifically, the present invention provides a solution adapted to a large range of currents, that is, which enables, if necessary, providing substantially larger currents than conventional solutions, without generating significant losses.

[0015] The present invention further aims at improving the regulation of the converter output voltage.

[0016] To achieve these and other objects, the present invention provides a converter receiving an A.C. voltage between an input terminal and a reference terminal and providing two D.C. voltages of opposite polarities across a first and a second capacitor, a common terminal of which is connected to the reference terminal. This converter includes a first one-way switch connected between the input terminal and a node of the circuit; a third capacitor, connected in parallel with the first capacitor, between said node and the reference terminal; circuit means including a second switch for connecting the second capacitor in series with the third capacitor when the second switch is closed; and a control circuit for closing the first switch only at the beginning and at the end of halfwaves of given polarity, the second switch being open when the first switch is closed.

[0017] According to an embodiment of the present invention, the circuit means include a controllable current source to ensure the supply of a constant current.

[0018] According to an embodiment of the present invention, the second switch is connected between said node and the reference terminal.

[0019] According to an embodiment of the present invention, the first capacitor is connected to said node via a first diode, the third capacitor being connected via a third diode to the reference terminal.

[0020] According to an embodiment of the present invention, a second diode is connected between the second capacitor and the junction point of the third capacitor and of the third diode.

[0021] According to an embodiment of the present invention, the control circuit receives an information about the D.C. voltage across the first capacitor and controls the first switch so that this D.C. voltage is substantially constant.

[0022] According to an embodiment of the present invention, the first switch is controllable in voltage or current to be turned off or on and is able to block the mains voltage forwardly or in reverse when it is not controlled to the on state.

[0023] The foregoing objects, features and advantages of the present invention will be discussed in detail in the following non-limiting description of specific embodiments in connection with the accompanying drawings.

[0024] FIGS. 1 and 2, previously described, are meant to show the state of the art and the problem to solve;

[0025] FIGS. 3A and 3B very schematically show an embodiment of an AC/DC converter according to the present invention; and

[0026] FIGS. 4A to 4D illustrate, in the form of timing diagrams, the operation of a converter according to the present invention.

[0027] The same elements have been designated with the same references in the different drawings. For clarity, only those elements that are necessary to the understanding of the present invention have been shown in the drawings and will be described hereafter.

[0028] As schematically illustrated in FIG. 3A, a converter according to the present invention receives on two input terminals 11 and 12 an A.C. voltage, terminal 12 forming a reference terminal. D.C. output voltages V+ and V−, respectively positive and negative, are available across capacitors C1 and C2 that have a common terminal M forming the reference terminal of the converter, connected to terminal 12.

[0029] A one-way switch K is connected by its anode to a terminal 11 and by its cathode to a terminal 13. Between terminals 13 and 12 are arranged in parallel, capacitor C1 in series with a diode D1, and a capacitor C3 in series with a diode D3. Diodes D1 and D3 are biased to be conductive when terminal 13 is positive with respect to terminal 12. The anode of diode D1 is connected to terminal 13. The cathode of diode D3 is connected to terminal 12. A diode D2 is connected by its anode to the terminal of capacitor C2 that is not connected to node M and by its cathode to the junction point of capacitor C3 and of diode D3. A switch K′ is connected between terminals 13 and 12.

[0030] Switches K and K′ are controlled by a control circuit 15 (CTRL) that is connected to terminals 11 and 12, from which it receives its power supply and an information about the A.C. input voltage. Control circuit 15 also receives (to regulate the value of the output voltage) an information about the voltage present across capacitor C1.

[0031] The operation of a converter according to the present invention will be described in relation with FIGS. 4A to 4D. These drawings show, in the form of timing diagrams, an example of shape of the voltages characteristic of the converter according to the present invention. FIG. 4A shows A.C. voltage Vac. FIG. 4B shows voltage VC3 across capacitor C3. FIG. 4C shows output voltage V− across capacitor C2. FIG. 4D shows output voltage V+ across capacitor C1. For simplification and unless otherwise mentioned, no account will be taken of the voltage drops in the circuit diodes.

[0032] The following discussion of the operation of the converter of the present invention relates to a steady state, and the transient state of initial charge of capacitors C1 and C2 can be deduced from this operation by taking into account the fact that the voltage levels can take several halfwaves before being reached.

[0033] According to the present invention, circuit 15 controls switch K so that it is only closed at the beginning and at the end of each positive halfwave of voltage Vac, during periods t0-t1 at halfwave beginnings and t2-t3 at halfwave ends. Switch K′ is open during these periods.

[0034] Between times t0 and t1, diodes D1 and D3 are forward biased. Accordingly, the current flowing through switch K charges capacitor C1 (FIG. 4D) as well as capacitor C3 (FIG. 4B). However, capacitor C2 continues its discharges into the load (not shown) connected thereacross (FIG. 4C).

[0035] At time t1, circuit 15 turns off switch K after detecting that voltage V+ has reached the desired value V0. Capacitor C1 starts discharging as it provides voltage V+ to a load. The load supply power is then provided by capacitors C1 and C2. The supply voltage across capacitor C3 however remains constant between t1 and t4 and between t5 and t2.

[0036] At a time t4 slightly subsequent to time t1, circuit 15 turns switch K′ on. This results in a discharge of capacitor C3 into capacitor C2 by path C3, K′, C2, D2. Thus, the voltages across capacitors C2 and C3 are balanced. Preferably, a circuit (not shown in FIG. 3A) adapted to ensuring a constant current discharge is provided in series with switch K′.

[0037] The turn-on delay of switch K′ with respect to the turning-off of switch K (times t1 to t4) aims at avoiding any risk of simultaneous conduction of these switches, which would result in short-circuiting the A.C. power supply. For the same reason, switch K′ is turned off, in the vicinity of the end of the halfwave, at a time t5 prior to time t2 of turning-on of switch K.

[0038] From time t2 to time t3 corresponding to the end of the halfwave, capacitors C1 and C3 complete their respective charges.

[0039] During negative halfwaves, between times t3 and t0, capacitors C1 and C2 supply the loads not shown that are connected to them, switch K being off and switch K′ being optionally off or on.

[0040] For simplification, the loads have been assumed to be purely resistive. The converter of the present invention is however not limited to such loads.

[0041] It should be noted that, since circuit 15 has the function of regulating the current sampled by switch K from the A.C. power supply, to maintain a voltage V+=V0 at each end of a charge period at the beginning of a halfwave (time t1), the converter of the present invention is well adapted to a variation of the power required by one of the loads.

[0042] FIG. 3B shows the same circuit as FIG. 3A. The elements have been arranged so that all the components belonging to the same silicon chip are arranged within a frame 21. The only non-integrated elements then are capacitors C1, C2, and C3. Switch K has been shown in the form of a component T such as an insulated gate bipolar transistor (IGBT) associated with a gate switch k. Generally, component T is a switch letting through the current in a single direction, controllable in voltage or current to be turned off or on, able to block the mains voltage in reverse, and forwardly when it is not on. Switch K′ has been shown in the form of a current source controlled to be blocked or active.

[0043] An advantage of the present invention is that no current is sampled from the A.C. power supply except in the vicinity of the zero crossing of a halfwave. The present invention thus reduces or minimizes the dissipated power of the circuit by limiting the periods of energy sampling from the mains to the zero crossing of the halfwaves and avoids the generation of large current pulses upon turning-off and turning-on of switch K.

[0044] Another advantage of the present invention is not to require the use of high-voltage passive power components.

[0045] Another advantage of the present invention is that output voltages V+ and V− are regulated with respect to neutral 12 of A.C. voltage Vac.

[0046] Of course, the present invention is likely to have various alterations, modifications, and improvements which will readily occur to those skilled in the art. Further, although the present invention has been described hereabove in relation with a switch K operating in halfwaves, a fullwave rectification may be performed upstream by means of a diode bridge.

[0047] Such alterations, modifications, and improvements are intended to be part of this disclosure, and are intended to be within the spirit and the scope of the present invention. Accordingly, the foregoing description is by way of example only and is not intended to be limiting. The present invention is limited only as defined in the following claims and the equivalents thereto.