Active pixel sensor with fully-depleted buried photoreceptor

[0002] This application claims benefit of U.S. Provisional application No. 60/122,217, filed Mar. 1, 1999.

[0003] Active pixel sensors are well known in the art. The basic active pixel sensor is described in U.S. Pat. No. 5,471,515.

[0004] Active pixel sensors can use different kinds of active elements as their charge receiving elements. FIGS. 1A-1C show three different examples of three of the common image sensing active elements.

[0005] A basic photodiode active pixel is shown in FIG. 1A. This includes a photodiode 100 on the substrate below an active oxide 102. The photodiode is connected directly to an output transistor 104. A gate 106 connects the photodiode 100 to a diffusion region 108 that is held at voltage VDD.

[0006] The photodiode can be reset by activating gate 106, connecting the photodiode to VDD. Subsequent accumulation of charge changes the voltage on the photodiode.

[0007] The basic photogate active pixel sensor is shown in FIG. 1B. The active photogate 120 connects to the output transistor 122 through a transfer gate 124. This facilitates correlated double sampling in which the level of the photogate is first tested, then charge is transferred, and the value obtained again. Only the difference between the two charge amounts are used as an indication of the output. Hence, the output better indicates the amount of photogenerated electrons.

[0008] FIG. 1C shows the so-called pinned photodiode used as an active element in an active pixel sensor. The pinned photodiode is shown in U.S. Pat. No. 5,625,210. A transfer gate with channel implant 140 is used to transfer the charge out of the photodiode 142. The channel implant is used to adjust the bias of the pinned photodiode to facilitate charge output.

[0009] The present system teaches using a fully-depleted buried photoreceptor with a coupled floating diffusion. The photoreceptor can be a “buried” diode, with an overlying portion of substrate.

[0010] These and other aspects will be described in detail with reference to the accompanying drawings, wherein:

[0011] FIGS. 1A-1C show prior photosensitive elements as used in active pixel sensors;

[0012] FIG. 2A shows a photosensor of an embodiment in which the output transistor is directly connected to the photosensor;

[0013] FIGS. 2B-2D show potential level diagrams for such a device;

[0014] FIG. 3 shows an alternative system in which a transfer gate is use to support correlated double sampling

[0015] FIG. 4 shows a fabrication layout of the system using a P-type buried photosensor with an N-well and a P-well; and

[0016] FIG. 5 shows a N-type buried device.

[0017] An embodiment uses a fully depleted buried photodiode 200 as the photosensitive element. This photodiode is connected to a floating diffusion 205. That diffusion forms the output, either directly or via a transfer gate. The floating diffusion 205 is connected to an output transistor 210, e.g. a transistor that is configured as a source follower. A reset transistor 205 has a gate 206 that is activated to connect floating diffusion to a diffusion region 208 that is held at VDD. This resets photodiode 200. The floating diffusion with reset transistor forms a vertical diffusion shield 600 located between the depleted photodiode 200 and the diffusion region 208. This is shown in FIG. 2B.

[0018] The buried photodiode allows two PN junctions for photocarrier conversion. Assuming that the buried photodiode 200 is of N-type, there is a first PN junction between the P-type substrate material 212 above the photodiode and the N-type photodiode itself. A second PN junction exists between the N-type photodiode 200 and the underlying P-type material 214. By using two PN junctions, the photosensitivity in specific spectral ranges can be enhanced. For example, the upper PN junction near 212 may increase the photosensitivity to blue and green. The lower PN junction may increase the photosensitivity to green and red. Surface components can constitute one of the largest sources of leakage current for PN junction technologies. In addition, the dark current can be reduced by eliminating certain surface components.

[0019] The two different embodiments are optimized for different applications. The first embodiment is shown in FIG. 2A. A silicon substrate 199 has a buried, fully depleted photodiode 200 formed therein. For purposes of this illustration, the photodiode will be assumed to be of N-type, in a P-type substrate. A layer of P material 212 overlies the top surface 216 of the photodiode, and the P-type material 199 surrounds all sides of the fully depleted photodiode.

[0020] The upper surface of the silicon includes an active oxide region 220, and a field oxide region 222. A space 224 is left between the edges of the photodiode 200 and the field oxide 222. This space 224 has been found to avoid mechanical stresses from the field oxide.

[0021] In the FIG. 2 embodiment, the floating diffusion region 205 is connected directly to the photodiode 200. This floating diffusion region 205 can have the same impurity as the buried photodiode but at a higher concentration. The floating diffusion 205 is also connected to the output transistor 210. In addition, the floating diffusion is connected through a surface gate 206 to a diffusion region 208 that is biased at VDD.

[0022] Operation is shown in FIGS. 2B and 2C. Actuating the reset gate 206 brings the floating diffusion 205 to VDD, thereby lowering the vertical diffusion shield 600, and allowing any charge in the photodiode (shown as 602) to dump into the diffusion region 604. Turning off the-reset transistor 206 again raises the vertical diffusion bridge 600, and thereby again causes the charge to accumulate.

[0023] The charge accumulation occurs in two different stages which produces effectively a knee-shaped response slope. The slope of Voltage out as a function of incoming light is shown in FIG. 2D. The first slope 610 occurs during the first part of the signal accumulation. During the part, the charge can accumulate in a relatively small “bucket”, shown as portion 606. This small bucket represents the floating diffusion. This relatively small bucket has low capacitance, and hence can accumulate the charge particles quickly. This charge accumulates in the small bucket, according to a first response slope shown as the first slope portion 610.

[0024] Once the small bucket portion is filled (effectively the floating diffusion 205 is filled with charge), then charge begins accumulating in the higher-potential buried diode portion 200. This charge accumulation is held in a larger bucket. The accumulation in the larger bucket is shown as 614. The operation produces a voltage-to-light transfer characteristics of a second slope 612.

[0025] The knee-shaped accumulation can be used for certain advantageous operations. A reason for obtaining the knee-shaped accumulation in this embodiment, however, is to compress the higher light portion, and accentuate the lower light portion. This enables the system to therefore obtain a larger dynamic range.

[0026] A second embodiment is shown in FIG. 3. In this embodiment, a separate floating diffusion 305 is in contact with the buried fully depleted photodiode 200. A separate input transistor 308 separates between the floating diffusion 305 and the output floating diffusion 205 connected to output transistor 210. The output floating diffusion 205 is also connected to the diffusion region in a similar way to that described above in the FIG. 2 embodiment. The input transistor 308 can be used to separate the two processes of photocharge integration and signal charge readout to facilitate correlated double sampling in order to reduce the KTC noise and parallel shutter. Like in the first embodiment, this system uses a controllable vertical diffusion bridge 305 to control the charge from the fully depleted photodiode. This system also leaves a space 224 between the top surface of the photodiode and the silicon substrate, thereby providing the same material as the silicon substrate above the photodiode as below the photodiode.

[0027] Implementation is shown in FIGS. 4 and 5, which show the wells that are used and the masks used to form those wells. FIG. 4 shows a deep buried photodiode using an N-well. In this embodiment, the photodiode is buried more deeply. FIG. 5 shows a shallow buried photodiode using a P-well. As discussed above, the shallow and deep burying at the wells can be used for different purposes.

[0028] Correlated double sampling occurs as follows. First, the whole system is reset by turning on the reset transistor gate 206 at the same time that the input transistor gate 310 is activated. This has the effect of resetting the floating diffusion 205, the second floating diffusion 305, and the buried fully depleted photodiode 200. After that, the gate 206 is turned off to raise the vertical diffusion bridge. At that time, the output transistor 210 is used to sample the value on floating diffusion 205. This represents the reset level. The output transistor 308 is then turned off, and charge is allowed to accumulate. At the end of the charge accumulation, the output transistor 308 is turned back on, allowing the output transistor 210 to sample the value of charge stored in the photodiode.

[0029] This system enables increasing the quantum efficiency or spatial resolution. Since the spatial resolution is proportional to the pixel size, this system could obtain an increased internal gain.

[0030] Although only a few embodiments have been described in detail above, other embodiments are contemplated by the inventor and are intended to be encompasses within the following claims. In addition, other modifications are contemplated and are also intended to be covered.