US 6,326,792 B1Grant
Method and apparatus for lifetime prediction of dielectric breakdown
Issue Date:2001-12-04
•14 Claims
•17 Drawing Sheets
Abstract
A stressing voltage is applied to a dielectric film (step S23). An A-SILC is monitored with stressing time and is plotted on a log-log scale (step S24). A straight line is applied to the plotting, a stressing time at which the line crosses a predetermined value of the A-SILC (a breakdown threshold) is obtained, and the obtained stressing time is predicted as the lifetime of the dielectric film (step S26).
Metadata
Assignee
- Matsushita Electronics Corporation
Inventor
- Kenji Okada
Application Information
Application Number:US 09/154,026
Filing Date:1998-09-16
Priority Date:1997-12-25
Art Unit:7
Classifications
IPC:
G01N 2760
Field of Search:
324719324754324765324768324769324456324452324522324537324551
Patent Drawings (17 sheets)
Description
Background of the Invention
[0002] The present invention relates to a method and an apparatus for evaluating a dielectric film. In particular, the present invention relates to lifetime prediction of dielectric breakdown.
[0003] In accordance with recent improvement in the packing density of semiconductor integrated circuit devices, the feature sizes of device elements have kept on being shrunk. In the field of VLSIs, the thickness of a silicon dioxide (SiO2) film used as a gate oxide has become smaller than 10 nm, and lifetime prediction of such a thin oxide film has become more and more important. As an evaluating method for gate oxides, a constant voltage stressing method or a constant current stressing method is widely used.
[0004] With reference to FIG. 18, a conventional constant voltage stressing method will be first described.
[0005] First, a stressing voltage V0, a judgement current level I0and the number N of samples subjected to measurement are set in step S50.
[0006] Next, in step S51, a measurement probe is moved to a first sample selected among the plural samples. Then, in step S52, the stressing voltage V0is applied across a dielectric film of the sample. Subsequently in step S53, the application of the stressing voltage V0across the dielectric film is retained for a time period of t1 seconds. A leakage current (I) across the dielectric film is measured in step S54. In step S55, whether dielectric breakdown has occurred is determined on the basis of the measured current level I. For example, it is determined that the dielectric breakdown has occurred when the absolute value of the current level I is larger than the judgement current level I0. In the case where it is determined that the dielectric breakdown has not occurred, the measurement procedure returns to step S53, so that the steps S53, S54 and S55 are repeated until the dielectric breakdown is observed. In the case where the breakdown was detected in step S55, a time to breakdown is recorded in step S56.
[0007] When the measurement for all the samples is completed in step S57, all of the total stressing times(t1to tN) for the N samples are used to calculate a time tBDin step 58. Weibull plotting can be adopted for such calculation. The Weibull plotting will be described below.
[0008] First, values W are calculated on the basis of a cumulative distribution function F and are plotted with regard to each of the stressing times (t1to tN) on a log scale. In general, the value W represents a cumulative percent of failure, and the cumulative distribution function F represents the probability that the device will fail at or before time t. The value W is given by the following expression (1):
[0009] W=ln [ln {1/(1−F)}] (1)
[0010] It is empirically known that a linear relationship can be obtained between the value W and the stressing time t. More specifically, the measurement data plotted in a Weibull plotting paper shows a linear relationship between broken-down oxides and the time t to the breakdown. Fore example, the stressing time t corresponding to W=50% is easily obtained by Weibull plotting. The obtained stressing time t, or t50, means a time when 50% of the oxides has broken down. The Weibull plotting is widely used to estimate the lifetime of dielectric films.
[0011] When the measurement of all the N samples is not completed in step S57, the measurement probe is moved to a subsequent sample (step S59), and the measurement procedure returns to step S52. The steps S52 through S59 are then repeated until the measurement of all the N samples is completed.
[0012] The sample number N is generally 20 through 100. This is because the measured time t varies among samples, and hence, the time tBDcannot be accurately determined if the sample number N is small.
[0013] The time tBDobtained in this manner corresponds to the lifetime of oxide breakdown. Therefore, the time tBDis used for evaluating the quality and reliability of gate oxides.
[0014] Next, with reference to FIG. 19, the conventional constant current stressing method will be described.
[0015] First, in step S60, a current level I0for stressing, a critical voltage V0and the sample numbers N are set and input a measurement apparatus. In step S61, a measurement probe is moved to a first sample.
[0016] Next, in step S62, the current I0is applied to a dielectric film of the first sample. After t1 seconds from the start of the application of the stressing current I0(step S63), a gate voltage V is measured in step S64. In step S65, it is determined whether or not the oxide breakdown has been caused. For example, when the absolute value of the voltage V is smaller than the absolute value of the critical voltage V0, it is determined that the oxide breakdown has occurred. When it is determined in step S65 that the breakdown has not occurred, the measurement procedure returns to step S62. Then, the steps S63 through S65 are repeated until the oxide breakdown is observed on the first sample.
[0017] When the breakdown is detected in step S65, a time t from the start of the current stressing to the oxide breakdown is recorded. When the measurement of all the samples is completed (step S67), the stressing times t with regard to all the samples are used for calculating a lifetime tBDof these samples and a total injected charge QBD(step S68). The time tBDis determined by using the aforementioned Weibull plotting. Herein, the total injected charge QBDis defined as a value obtained by dividing a product of the time tBDand the stressing current I0by an gate electrode area S.
[0018] When the measurement of all the samples is not completed in step S67, the measurement probe is moved to a subsequent sample in step S69, so that the procedures in steps S62 through S69 can be repeated until the measurement of all the samples is completed. Also in this case, the sample numbers N is approximately 20 through 100.
[0019] In these methods for predicting the lifetime of oxide breakdown, it is disadvantageously necessary to prepare a large number of samples and it takes a disadvantageously long time for the measurement. It is generally known that the measurement error is generally in proportion to (N½)/N. Therefore, when the sample number N is small, the lifetime prediction cannot be reliable. In order to improve the reliability of the lifetime prediction, it is necessary to increase the sample number, which results in an increases in the measurement time.
[0020] The object of the present invention is providing a method and an apparatus for evaluating a dielectric film in which the time and the sample number required for measurement can be reduced without degrading the measurement reliability.
Summary of the Invention
[0021] The dielectric film evaluating method of this invention comprises a stressing step of applying electrical stressing to a dielectric film; and a step of monitoring an A mode stress induced leakage current and measuring a value of the A mode stress induced leakage current flowing when breakdown occurs in the dielectric film.
[0022] Alternatively, the dielectric film evaluating method of this invention comprises a stressing step of applying electrical stress to a dielectric film in each of plural samples; a step of monitoring an A mode stress induced leakage current and measuring a value of the A mode stress induced leakage current flowing when breakdown occurs in the dielectric film in each of the plural samples; and a threshold determining step of determining a breakdown threshold of the A mode stress induced leakage current by statistically processing the values of the A mode stress induced leakage current measured in the plural samples.
[0023] In one aspect, the dielectric film evaluating method of this invention comprises a stressing step of applying electrical stressing to a dielectric film; a step of measuring an A mode stress induced leakage current; and a lifetime predicting step of predicting a lifetime of the dielectric film on the basis of a relationship between the measured value of the A mode stress induced leakage current and a judgement value determined based on a breakdown threshold of the A mode stress induced leakage current.
[0024] In another aspect, the dielectric film evaluating method of this invention comprises a stressing step of applying electrical stressing to a dielectric film in each of plural samples; a step of applying a voltage to the dielectric film in each of the plural samples so as to allow a current with a predetermined value to flow in the dielectric film; a step of monitoring a value of the voltage and measuring a threshold of the voltage obtained when breakdown occurs in the dielectric film; and a step of determining a breakdown threshold of the voltage by statistically processing plural thresholds of the voltage measured in the plural samples.
[0025] In still another aspect, the dielectric film evaluating method of this invention comprises a stressing step of applying electrical stressing to a dielectric film; a step of measuring a voltage applied to the dielectric film when an A mode stress induced leakage current has a predetermined value; and a lifetime predicting step of predicting a lifetime of the dielectric film on the basis of a relationship between the measured value of the voltage and a threshold of the voltage.
[0026] In still another aspect, the dielectric film evaluating method of this invention comprises a stressing step of applying electrical stressing to a dielectric film; a step of monitoring quality change of the dielectric film resulting from application of the electrical stressing by measuring an A mode stress induced leakage current; and a step of predicting a lifetime of the dielectric film on the basis of the monitored quality change of the dielectric film.
[0027] In still another aspect, the dielectric film evaluating method of this invention comprises a stressing step of applying a first voltage V0to a dielectric film; and a step of monitoring a value of a leakage current flowing in the dielectric film when a second voltage Vmhaving an absolute value smaller than an absolute value of the first voltage V0is applied to the dielectric film, wherein the dielectric film is tested on the basis of a value of the leakage current.
[0028] Alternatively, the process estimating method of this invention comprises a step of measuring a level of an A mode stress induced leakage current flowing in a dielectric film in each of plural samples obtained under different process conditions; and a step of selecting a process condition for optimizing a lifetime of a dielectric film on the basis of the measured levels of the A mode stress induced leakage current in the plural samples.
[0029] Further alternatively, the dielectric film evaluating apparatus for practicing any of the dielectric film evaluating methods of this invention comprises a holder for holding a sample in which a dielectric film to be tested is formed; a probe to be brought in electrical contact with the sample placed on the holder; and a measurement unit for applying electrical stressing to the sample through the probe and measuring a current/voltage.
Brief Description of the Drawings
[0030] FIG. 1 is a sectional view for showing an exemplified structure of a sample used in a dielectric film evaluating method according to the invention;
[0031] FIG. 2 is a graph for showing current-voltage characteristics of stress induced leakage currents in two modes in an ultra thin silicon dioxide;
[0032] FIG. 3 is a graph for showing gate current flowing through a silicon dioxide film with a thickness of 4.3 nm, in which the constant gate voltage of −6 V is applied;
[0033] FIG. 4 is a graph for showing a current-voltage characteristic of a 4.3 nm-thick oxide under constant voltage stressing of −6 V;
[0034] FIG. 5 is a graph for showing an A mode SILC at a gate voltage of −4 V as a function of stressing time;
[0035] FIG. 6 is a graph for showing an A mode SILC at a gate voltage of −4 V as a function of stressing time for various electric fields;
[0036] FIG. 7 is a graph for showing an A mode SILC at a gate voltage of −4 V as a function of stressing time for various electric fields for three samples having various oxide integity;
[0037] FIG. 8 is a flowchart for showing procedures in a dielectric film evaluating method according to a first embodiment of the invention;
[0038] FIG. 9 is a graph of Weibull plotting;
[0039] FIG. 10 is a flowchart for showing procedures in a dielectric film evaluating method according to a second embodiment of the invention;
[0040] FIG. 11 is a flowchart for showing procedures in a dielectric film evaluating method according to a third embodiment of the invention;
[0041] FIG. 12 is a flowchart for showing exemplified procedures of a stressing test conducted in the dielectric film evaluating method of the invention;
[0042] FIG. 13 is a flowchart for showing modified procedures in the dielectric film evaluating method according to the third embodiment;
[0043] FIG. 14 is a flowchart for showing modified procedures of the stressing test conducted in the dielectric film evaluating method of the invention;
[0044] FIG. 15 is a graph for showing an A mode SILC at a gate voltage of −4 V obtained by applying comparatively small electrical stressing to a silicon dioxide;
[0045] FIG. 16 is a flowchart for showing procedures in a dielectric film evaluating method according to a fourth embodiment of the invention;
[0046] FIG. 17 is a schematic block diagram for showing an exemplified structure of a dielectric film evaluating apparatus according to the invention;
[0047] FIG. 18 is a flowchart for showing procedures in a conventional evaluating method for the reliability of a dielectric film; and
[0048] FIG. 19 is a flowchart for showing procedures in another conventional evaluating method for the reliability of a dielectric film.
Detailed Description of the Invention
[0049] It is known that a stress induced leakage current (hereinafter referred to as the “SILC”) can be observed in two modes in ultra thin oxides, namely, in gate oxides with a thickness of approximately 6 nm or less (K. Okada, S. Kawasaki and Y. Hirofuji; Extended Abstracts of the 1994 International Conference on SOLID STATE DEVICES AND MATERIALS (1994) p.565). The currents in these two modes are distinguishably designated as an “A mode stress induced leakage current” and a “B mode stress induced leakage current”, respectively. Herein, the A mode stress induced leakage current is referred to as the “A-SILC” and the B mode stress induced leakage current is referred to as the “B-SILC”.
[0050] FIG. 1 illustrates an exemplified sectional structure of a MOS capacitor used in a dielectric film evaluating method according to the invention. The MOS capacitor includes a gate oxide 2 having a thickness of 4.3 nm formed on a p-type single-crystalline silicon substrate 1, and a gate electrode 3 formed on the gate oxide 2. The gate electrode 3 having an area of 0.01 mm2is provided with dielectric sidewalls 4. The gate oxide 2 is formed by thermally oxidizing the surface of the silicon substrate 1, and the gate electrode 3 is formed by, for example, patterning a polysilicon film deposited by the CVD.
[0051] The silicon substrate 1 and the gate electrode 3 are electrically connected with a measurement unit of a dielectric film evaluating apparatus 5. Electrical stress can be given to the gate oxide 2 by repeatedly applying a negative voltage to the gate electrode 3.
[0052] FIG. 2 shows current-voltage characteristics of the gate oxide 2 in the MOS capacitor of FIG. 1. The current-voltage characteristic can be obtained by measuring leakage current (hereinafter sometimes referred to as the gate current) flowing from the silicon substrate 1 through the gate oxide 2 to the gate electrode 3 while variably applying a negative voltage to the gate electrode 3.
[0053] In FIG. 2, the typical A-SILC and B-SILC are observed. In an initial characteristic prior to the stressing, a Fowler-Nordheim (FN) tunnel current and a direct tunnel current are dominant. The A-SILC monotonously increases with the passage of the stressing time, followed by the abrupt appearance of the B-SILC. When the stressing is further continued, complete oxide breakdown occurs. This complete oxide breakdown is equivalent to dielectric breakdown observed in a comparatively thick dielectric film with a thickness of approximately 10 nm or more.
[0054] The A-SILC is a current flowing in the entire area of the oxide film. In contrast, the B-SILC is a current flowing through a local spot with a dimension of approximately several nm through several tens nm. The B-SILC is observed in a breakdown process in a ultra thin silicon dioxide(K. Okada and S. Kawasaki; Extended Abstracts of the 1995 International Conference on SOLID STATE DEVICES AND MATERIALS (1995) p. 473 and K. Okada; Extended Abstracts of the 1996 International Conference on SOLID STATE DEVICES AND MATERIALS (1996) p. 782). Accordingly, this phenomenon is designated as partial-breakdown (hereinafter referred to as the p-BD), and a reaction from the appearance of the B-SILC to the complete dielectric breakdown is designated as complete-breakdown (hereinafter referred to as the c-BD).
[0055] Also, there are some cases where the complete dielectric breakdown occurs without the appearance of the B-SILC. The p-BD is sometimes called as quasi-breakdown or soft-breakdown and the B-SILC is sometimes called as a quasi-breakdown current, but the words “A-SILC”, “B-SILC”, “p-BD” and “c-BD” are herein adopted.
[0056] The occurrence of the p-BD increases the leakage current but does not immediately stop the operation of the device. Therefore, a time up to the occurrence of the complete dielectric breakdown should be regarded as the lifetime of a gate oxide. However, the B-SILC can cause malfunction depending upon a device structure, and a time up to the p-BD should be regarded as the lifetime in a device strictly regulated in the leakage current level. Accordingly, it is significant for device evaluation to measure or predict the time up to the p-BD. Therefore, herein, the phenomenon of the occurrence of the p-BD and the phenomenon of the complete dielectric breakdown caused without the p-BD are both designated as the dielectric breakdown, and a time up to the thus defined dielectric breakdown is defined as the lifetime of a gate oxide.
[0057] FIG. 3 shows a time dependence of a gate current under a constant voltage (−6 V) to the gate electrode 3 of the MOS capacitor of FIG. 1. In this sample, the p-BD occurs and the B-SILC is observed 410 seconds after the start of the application of the stressing voltage (−6 V). Under the stressing voltage, the gate current continuously increases with the passage of the stressing time, but the change is as small as approximately 8% increase from 0.823 μA to 0.889 μA for 410 seconds . It is known that this change is smaller as the oxide thickness is smaller. Accordingly, it is very difficult to predict the occurrence of the dielectric breakdown merely by monitoring the gate current. In the conventional evaluating method, such a gate current is monitored as described above, and hence, it is necessary to continuously apply the stressing voltage until the dielectric breakdown actually occurs. As a result, the measurement takes a long period of time.
[0058] In order to shorten the measurement time, the stressing condition is made more strict, namely, the absolute value of the stressing voltage is increased, or the temperature during the measurement is increased. This is designated as an electric field or temperature accelerated test. In this test, in order to predict the lifetime of a gate oxide under an actual usage condition for the device, it is necessary to find how the lifetime of the gate oxide is varied depending upon the electric field or the temperature. There are some models for the variation, but it has not been found out which model is correct. Furthermore, the lifetime of a gate oxide under the actual usage condition is obtained by extrapolating the lifetime obtained by the electric field or temperature accelerated test to the actual usage condition (the electric field or the temperature) of the device. Therefore, in order to accurately predict the lifetime, it is necessary to carry out the test in a lower electric field at a lower temperature.
[0059] As described above, a shorter measurement time can degrade the accuracy in the lifetime prediction, and therefore, the measurement time is inevitably very long in order to improve the accuracy.
[0060] FIG. 4 shows current-voltage characteristics obtained through the constant voltage stressing in a MOS capacitor including a silicon dioxide with a thickness of 4.3 nm. The stressing is performed by applying a constant voltage (−6 V) to the gate electrode of the MOS capacitor. Before the stressing, the MOS capacitor exhibits a characteristic shown with a curve 1. With the passage of the stressing time, a gate current in a region of a gate voltage between approximately −2 V and −5V, namely, the A-SILC, continuously increases, and a characteristic shown with a curve 2 is exhibited immediately before the p-BD. The gate current (A-SILC) is varied at the gate voltage of −4 V by two or more orders.
[0061] FIG. 5 shows the gate current (A-SILC) at a gate voltage of −4 V as a function of time. In FIG. 5, the ordinate indicates the A-SILC obtained by applying the voltage of −4 V to the gate electrode of the above-described MOS capacitor, and the abscissa indicates the stressing time. As is obvious from FIG. 5, there is a linear relationship on a log-log scale between the gate current (A-SILC) and the stressing time.
[0062] FIG. 6 shows the A-SILC (at a gate voltage of −4 V) as a function of time under various stressing conditions. In the graph of FIG. 6, breakdown points are indicated with reverse black triangular marks (▾). The positions of lines are varied depending upon the applied electric field, but the slopes of the lines are constant. The time to the dielectric breakdown is varied depending upon the electric field strength, but the A-SILC flowing at the occurrence of the dielectric breakdown is substantially constant.
[0063] FIG. 7 shows the A-SILC (at a gate voltage of −4 V) as a function of time for three kinds of silicon dioxides (samples 1 through 3) having a thickness of 3.8 nm respectively. The samples are prepared through different fabrication processes. The stressing is performed by applying a constant voltage of −6 V to the gate electrode. The process conditions of fabricating the samples 1 through 3 are as follows. In the sample 1, the gate oxide is formed by dry oxidation at a loading temperature of 800° C., in the sample 2, the gate oxide is formed by pyrogenic at a loading temperature of 700° C., and in the sample 3, the gate oxide is formed by pyrogenic at a loading temperature of 500° C. The oxidation temperature is 800° C. in all the samples. Also in the graph of FIG. 7, the breakdown points are indicated with the reverse black triangular marks (▾). The positions of lines are varied depending upon the different fabrication processes, but the slopes of the lines are constant. Moreover, the time to the breakdown is different in the respective samples, but the A-SILC at the breakdown is substantially constant.
[0064] Since the lifetimes of the respective samples are slightly scattered, the A-SILCs obtained at the time of the dielectric breakdown are also scattered in the respective samples.
[0065] The present inventor has found a phenomenon that the A-SILC at the dielectric breakdown scarcely depends upon the stressing condition (such as the stressing voltage and the stressing current) and the fabrication process condition, and has found out a method of predicting the lifetime of a dielectric film by utilizing this phenomenon. Specifically, the A-SILC at the oxide breakdown are actually measured in plural samples and the measured values are used to determine a “threshold A-SILC for dielectric breakdown”. This “threshold A-SILC” is optimally used for the lifetime prediction of oxide breakdown. This threshold is determined in consideration of scattering or spread of the measured values, so that a statistically reliable value for the lifetime prediction can be obtained. The use of “threshold A-SILC for dielectric breakdown” makes it possible to predict a lifetime of a thin oxide film without actually measuring the lifetimes of a large number of samples as in the conventional method.
[0066] On the basis of the study of the aforementioned breakdown mechanism of ultra thin films, the present invention provides dielectric film evaluating method and apparatus in which a time and the sample number required for measurement can be suppressed without degrading the reliability of the lifetime prediction.
[0067] Now, preferred embodiments of the dielectric film evaluating method of the invention will be described with reference to the accompanying drawings.
Embodiment 1
[0068] A first embodiment will now be described with reference to a flowchart of FIG. 8.
[0069] In a method for evaluating dielectric films of this embodiment, a measurement voltage Vmand a judgement A-SILC Imare first set in step S1. In step S2, a stressing voltage V0is set. The order of steps S1 and S2 can be reversed.
[0070] The measurement voltage Vmis to be applied across a gate oxide when measuring an A-SILC. In this embodiment, the measurement voltage Vmis set at −4 V . As the judgement value of A-SILC, one can use the A-SILC measured at the time when dielectric breakdown occurred in oxide films of the same kind and with the same thickness as those of the tested sample. The value of the judgement A-SILC Imcorresponds to an expected value of A-SILC which will flow through the sample dielectric film at the time of the dielectric breakdown. The words “an A-SILC at the time of the dielectric breakdown” used herein means an A-SILC observed immediately before an abrupt increase of A-SILC. Alternatively, a value of an A-SILC which is determined by extrapolation of a straight line (or a curve) showing the A-SILC up to the time of the abrupt increase of A-SILC can be defined as “an A-SILC at the time of the dielectric breakdown”.
[0071] Thus, the “A-SILC at the time of the dielectric breakdown” can be used as a “threshold A-SILC for dielectric breakdown”. This “threshold” is predetermined in a manner described below before carrying out the dielectric film evaluating method of this embodiment. As the judgement value of A-SILC (Im), a value comparatively approximate to the “threshold A-SILC for dielectric breakdown” can be used instead of the “threshold A-SILC for dielectric breakdown”. For example, a value corresponding to 90% through 110% of the “threshold A-SILC for dielectric breakdown” can be used as the judgement value of A-SILC Im. The stressing voltage V0is to be applied across the gate oxide film during the electrical stressing. In this embodiment, the stressing voltage V0is set at −6 V.
[0072] A gate current (IG) might includes a direct tunnel current component and an FN current component. In the case where the gate current (IG) includes such a current component (IG0) other than an A-SILC component, a current level obtained by subtracting the current (IG0) from the gate current (IG) can be used as the A-SILC.
[0073] After steps S1 and S2, the stressing voltage V0is applied to the gate oxide in step S3 for electrical stressing. After the application of the stressing voltage V0to the gate oxide for a time duration of t1 seconds (step S4), an A-SILC IAis measured at the gate voltage Vmin step S5. In step S6, it is determined whether or not the absolute value of the measured current IAexceeds the judgement value of the A-SILC Im. The time duration for the application of the stressing voltage V0is not necessarily constant but can be increased on a log scale.
[0074] When it is determined in step S6 that the absolute value of the current IAdoes not exceed Im, the measurement procedure returns to step S4 so that the steps S4 through S6 can be repeated.
[0075] When it is determined in step S6 that the absolute value of IAexceeds Im, a total stressing time is recorded as a time tBD. The time tBDcorresponds to the lifetime of the tested oxide film because the oxide breakdown occurs at a high probability when the absolute value of IAexceeds Im.
[0076] By performing such measurement merely once on one sample (a gate oxide in one MOS capacitor), it is possible to obtain the time tBDavailable for all of plural samples each including a dielectric film of the same kind and the same thickness as the tested oxide film. The “plural samples” herein includes another oxide film formed in another position in the silicon wafer which includes the tested oxide film. “Another oxide film” can be included in a different chip from that including the tested oxide film. Also, the “plural samples” can include a oxide film included in another silicon wafer obtained through substantially the same fabrication process as that for the silicon wafer including the tested oxide film.
[0077] In the aforementioned measurement, the stressing is continued until the dielectric breakdown, or p-BD, actually occurs in a given sample or until the A-SILC IAat which the dielectric breakdown can occur is observed.
[0078] Next, a method of determining the “judgement value of A-SILC Im” or the “threshold of A-SILC for dielectric breakdown” will be described.
[0079] A behavior or time dependence of gate current is monitored in substantially the same manner as in the above measurement. The stressing is continued until the oxide breakdown actually occurs. When an abrupt increase in the gate current is detected, a gate current level measured immediately before the abrupt increase (namely, last in the monotonous and continuous increase of the gate current) is recorded as the “A-SILC at the time of the breakdown”. Alternatively, a gate current level determined by extrapolating a straight line (or a curve) showing the gate current up to the time of the abrupt increase can be recorded as the “A-SILC at the time of the breakdown”. This measurement procedure is performed on plural samples, for example, 20 through 100 samples.
[0080] In this manner, the data of the “A-SILC at the time of the breakdown” can be obtained with regard to the plural samples (plural dielectric films). These data are statistically processed to determine the “threshold A-SILC for dielectric breakdown”.
[0081] FIG. 9 shows a relationship between the “A-SILC at the time of the dielectric breakdown” measured in plural samples and the cumulative percent failure, or cumulative percent of broken-down oxides. The graph of FIG. 9 is obtained through the Weibull plotting of values measured on seventeen MOS capacitors which are simultaneously formed in one silicon wafer. The measurement is performed by applying plural different stressing electric fields to the dielectric films.
[0082] In FIG. 9, a value referred to as a “50% threshold” corresponds to an A-SILC at which the dielectric breakdown occurs in 50% of all the samples (dielectric films). This “50% threshold” can be used as the judgement value of A-SILC Im. A 50% breakdown lifetime tBD(or t50) can be obtained by performing the measurement procedure steps as shown in FIG. 8 merely once.
[0083] In FIG. 9, values referred to as a “1% threshold” and a “99% threshold” correspond to an A-SILC at which the dielectric breakdown occurs in 1% of all the samples (dielectric films) and an A-SILC at which the dielectric breakdown occurs in 99% of all the samples (dielectric films), respectively.
[0084] When the relationship in FIG. 9 is obtained, an A-SILC corresponding to a desired cumulative percent breakdown can be used as the “threshold of A-SILC for dielectric breakdown”.
[0085] It has been found that the “threshold A-SILC for dielectric breakdown” varies depending upon the area of a dielectric film and the temperature during the stressing. When the relationship between the threshold and the area of a dielectric film or the relationship between the threshold A-SILC and the temperature during the stressing is obtained, the threshold A-SILC can be corrected in accordance with the area of a dielectric film or the measurement.
[0086] As described the above, the A-SILC IAunder stressing is monitored so that the lifetime of a dielectric film can be accurately measured in a shorter period of time. In this embodiment, the detection of the dielectric breakdown is made on the basis of whether or not the absolute value of the A-SILC IAexceeds the judgement value of A-SILC Im. Instead of this, the breakdown detection can be made by monitoring a gate voltage necessary for allowing a given constant A-SILC to flow. This is because, when a given A-SILC flows across a gate oxide, a gate voltage applied to the gate oxide monotonously and continuously decreases with the passage of the stressing time and abruptly and discontinuously decreases when the dielectric breakdown (p-BD) occurs. The gate voltage also has a “threshold” correspondingly to the time of the dielectric breakdown. This threshold is also substantially constant regardless of the stressing condition and the manufacture process condition.
Embodiment 2
[0087] A second embodiment will now be described with reference to a flowchart of FIG. 10.
[0088] In a method for evaluating dielectric films of this embodiment, a measurement voltage Vmand a judgement value of A-SILC Imare first set in step S11, and a stressing current level I0is set in step S12. The “measurement voltage Vm” and the “judgment value of A-SILC Im” are the same as those described in the first embodiment. The “stressing current level I0” is to be applied to a dielectric film under a constant current stressing.
[0089] Next, in step S13, the stressing current (I0) is applied to the dielectric film. After retaining the application of the stressing current (I0) for a time duration of t1 seconds in step S14, an A-SILC IAat the voltage Vmis measured in step S15. In step S16, it is determined whether or not the absolute value of IAexceeds Im. When it is determined that the absolute value of IAdoes not exceed Im, the measurement procedure returns to step S14, so that the steps S14 through S16 can be repeated.
[0090] When it is determined in step S16 that the absolute value of IAexceeds Im, a total stressing time from the start of the application of the stressing current I0is recorded as a time tBDin step S17. A total injected charge QBDis then calculated on the basis of the time tBDin step S18.
[0091] This embodiment is different from the first embodiment in applying the constant stressing current in stead of the constant stressing voltage to the dielectric film. In spite of this difference, the lifetime tBDof the dielectric film can be obtained basically in the same manner according to this embodiment. Accordingly, for the same reason as described in the first embodiment, the time tBDof all the samples including the tested sample can be obtained by performing the aforementioned measurement merely once. Also, in this embodiment, the total injected charge QBDcan be calculated with ease.
[0092] In this manner, according to this embodiment, the oxide lifetime can be accurately predicted in a shorter period of time by monitoring the A-SILC.
[0093] Although A-SILC at a constant gate voltage is monitored in this embodiment, a gate voltage required for a given A-SILC to flow can be monitored.
Embodiment 3
[0094] A third embodiment will be described with reference to a flowchart of FIG. 11.
[0095] First, a measurement voltage Vmand a judgement value of A-SILC Imare set in step S21, and a stressing condition and a stressing time ttotalare set in step S22. The “stressing condition” is, for example, the constant voltage stressing adopted in the first embodiment or the constant current stressing adopted in the second embodiment. The stressing can be performed at a high temperature which is elevated from room temperature so as to accelerate the measurement.
[0096] A stressing test is performed on a dielectric film in step S23 under the stressing condition set in step S22. When the stressing time ttotalelapses after the start of the application of the stressing to the dielectric film, the stressing test is completed. After completing the stressing test, A-SILCs IArecorded at respective stressing times t during the stressing test are plotted with regard to the stressing time t on a log-log scale in step S24. In step S25, a straight line is applied to the plotting on the log-log scale. In step S26, when the absolute value of the A-SILC IAexceeds the A-SILC Im, a stressing time to the A-SILC Imis defined as a time tBD. When the absolute value of the A-SILC IAdoes not exceed the A-SILC Im, the straight line is extrapolated toward a longer time, so as to obtain a time to the A-SILC Im.
[0097] Next, specific procedures of the stressing test performed in step S23 will be described with reference to FIG. 12.
[0098] First, in step S31, the stressing is applied to the dielectric film under the predetermined stressing condition. After retaining the application of the stressing for a time duration of t1 seconds (step S32), an A-SILC IAat the predetermined voltage Vm(for example, −4 V) is measured in step S34, and the obtained current IAand time t are recorded in step S35. When the passage time from the start of the stressing test exceeds the predtermined stressing time ttotal(step S36), the stressing is completed and the stressing test is completed. When the passage time from the start of the stressing test does not exceed the predtermined stressing time ttotalin step S36, the process returns to step S32, so that the procedures in steps S32, S34, S35 and S36 can be repeated. The time t1 is, for example, 0.1 through 10 seconds, and the stressing time ttotalis, for example, 10 through 10000 seconds.
[0099] In this embodiment, there is no need to apply the stressing to the sample until the breakdown of the dielectric film is actually caused. As the stressing time ttotal, a time sufficiently shorter than the aforementioned lifetime tBDof the dielectric film can be set. In this embodiment, considering that there is a linear relationship on the log-log scale as is shown in FIGS. 6 and 7 between the A-SILC IAand the stressing time t, the lifetime of the dielectric film is predicted. This prediction is on the basis of the fact that the dielectric breakdown occurs when the A-SILC IAexceeds the dielectric breakdown threshold.
[0100] For the same reason as described in the first embodiment, the time tBDof all samples can be obtained by performing the aforementioned measurement merely once.
[0101] In this embodiment, in stead of plotting the A-SILC IA, a gate voltage value required for a given A-SILC to flow can be used.
[0102] In this manner, according to this embodiment, the lifetime of a gate oxide can be accurately predicted in a shorter period of time. Since there is no need to continue the stressing test until the breakdown is actually caused in the dielectric film in this embodiment, the time required for the test can be shortened. Thus this embodiment is superior to the first embodiment.
[0103] In this embodiment, the stressing test is completed when the passage time from the start of the stressing test exceeds the predetermined stressing time ttotal. Instead, the stressing test can be completed when the A-SILC IAexceeds a previously set current level IAA. FIGS. 13 and 14 show procedures adopted in this case, wherein steps S22 and S36 of FIGS. 11 and 12 are replaced with steps S22′ and S36′, respectively. The process shown in FIGS. 13 and 14 is particularly effective when there is a relationship as is shown in FIG. 15 between the A-SILC IAand the stressing time. This is because, when the set time ttotalis too short, there is a possibility that the stressing test is completed before observing substantial increase of the A-SILC IAdue to degradation of the dielectric film. When the electrical stressing applied to the dielectric film is comparatively small, the A-SILC IAcan vary as is shown in FIG. 15.
Embodiment 4
[0104] A fourth embodiment will now be described with reference to a flowchart of FIG. 16.
[0105] First, a measurement voltage Vmand a judgement value of A-SILC Imare set in step S41, and a stressing condition and a stressing time ttotalare set in step S42. A stressing test is performed on a dielectric film under the stress condition set in step S42 (step S43). After completing the stressing test, in step S44, an A-SILC IArecorded at each stressing time t during the stressing test is substituted in the following expression (2) or (3), thereby executing fitting:
[0106] IA=a×tb (2)
[0107] log(IA)=log(a)+b·log(t) (3)
[0108] wherein IAindicates the A-SILC, t indicates the stressing time, and a and b indicate fitting parameters.
[0109] Through the fitting, the values of the parameters a and b can be determined. Next, the values of the parameters a and b obtained in step S44 are substituted in the expression (2), so as to calculate a stressing time t required for the current level IAto reach a previously set value (i.e., the A-SILC Im). Thus, a time tBDto breakdown can be obtained (step S45).
[0110] The specific procedures of the stressing test performed in step S43 can be the same as those of the stressing test of FIG. 11 (shown in the flowchart of FIG. 12 or 14).
[0111] Also in this embodiment, for the same reason as described in the first embodiment, the time tBDof all samples can be obtained by conducting the aforementioned measurement merely once. In stead of using the A-SILC IA, a gate voltage value required for a given A-SILC to flow can be used.
[0112] Also, as described in the third embodiment, in stead of completing the stressing test when the passage time from the start of the stressing test exceeds the predetermined time ttotal, the stressing test can be completed when the A-SILC IAexceeds a previously predetermined current level IAA.
[0113] According to this embodiment, the oxide lifetime can be accurately predicted in a shorter period of time. This embodiment is superior to the first embodiment because the time required for the test can be shortened since there is no need to continue the stressing test until the breakdown is actually caused in the dielectric film in this embodiment. Furthermore, the value of the fitting parameters a and b can be obtained by using the expressions, and it is possible to judge the appropriateness of the measured or predicted lifetime by checking the values of the parameters a and b. In view of this, this embodiment is superior to the third embodiment.
[0114] In the case where the relationship between the stressing time t and the A-SILC IAcan be more preferably fit by using another expression different from the aforementioned expressions, the expression (2) or (3) is appropriately replaced with another expression or compensated. In the graph of FIG. 6 or 7, there is a linear relationship between the stressing time t and the A-SILC IA, but in some cases, the line has different slopes between a region where the A-SILC IAis comparatively small and a region where it is comparatively large. Accordingly, the relationship between the stressing time t and the A-SILC IAis not limited to those shown in FIGS. 6 and 7.
Embodiment 5
[0115] (Dielectric Film Evaluating Apparatus)
[0116] Now, a dielectric film evaluating apparatus used for carrying out the dielectric film evaluation method of the present invention will be described with reference to FIG. 17.
[0117] The dielectric film evaluating apparatus of FIG. 17 includes a sample holder 20 for holding a sample 10, a probe 21 to be brought in an electrical contact with the sample 10 placed on the sample holder 20, a measurement unit 22 for applying electrical stressing to the sample 10 through the probe 21 and measuring a current/voltage, and an analysis unit 26 for analyzing obtained data.
[0118] The sample 10 includes a silicon substrate 11, a gate oxide 12 formed on the substrate 11 and a gate electrode 13 formed on the gate oxide 12. The holder 20 for holding the sample 10 is provided with a heater for heating the sample 10 during the stressing process. The holder 20 is electrically connected with the silicon substrate 11 of the sample 10 and is also grounded.
[0119] The measurement unit 22 includes a voltage application part 23, a current measurement part 24 and a recording part 25. The voltage application part 23 applies a stressing voltage V0(of, for example, −6 V) to the sample 10 in the stressing process and applies a measurement voltage Vm(of, for example, −4 V) to the sample 10 in a process for measuring an A-SILC IA. The current measurement part 24 measures a current flowing in the dielectric film 12 under application of the measurement voltage Vmto the sample 10 in the process for measuring the A-SILC IA. The measured A-SILC IAis recorded in reference to a measurement time (stressing time t) in the recording part 25. In the case of the constant current stressing, a constant current is supplied to the sample from a constant current supply unit not shown.
[0120] In carrying out the method of the fourth embodiment, the aforementioned fitting is performed on the data recorded in the recording part 25 by a microprocessor in the analysis unit 26. When the fitting parameters a and b are obtained and a previously set value (the A-SILC Im) is given, the time tBDcan be calculated.
[0121] In each of the aforementioned embodiments, the lifetime of a dielectric film is predicted on the assumption that the A-SILC Imor the threshold A-SILC for dielectric breakdown is constant regardless of the stressing condition and the process condition. However, it is known that the threshold A-SILC for dielectric breakdown varies in accordance with the temperature during the measurement. Therefore, the threshold A-SILC for dielectric breakdown can be expressed as a function of the temperature.
[0122] Furthermore, the present invention is applicable to a method of selecting an optimal fabrication process condition in view of the lifetime and reliability of a dielectric film. As is shown in FIG. 7, the relationship between the stressing time and the A-SILC is largely varied even in the same dielectric film depending upon different fabrication process conditions adopted for forming the dielectric film. The graph of FIG. 7 reveals that the fabrication process condition adopted for the sample 3 is most preferable as compared with the fabrication process conditions for the other samples. The process condition for the sample 3 can elongate the oxide lifetime. By measuring an A-SILC at a fixed time of, for example, txseconds in each of samples obtained under different fabrication process conditions and comparing the measured values, it is possible to select a fabrication process condition optimal for improving the reliability of the dielectric film.
[0123] As described so far, a dielectric film evaluating method of this invention includes a stressing step of applying stressing to a dielectric film; and a step of monitoring an A mode stress induced leakage current and measuring a value of the A mode stress induced leakage current flowing when the breakdown occurs in the dielectric film. As a result, the A mode stress induced leakage current at the time of the dielectric breakdown can be obtained.
[0124] Alternatively, another dielectric film evaluating method of this invention includes a step of measuring a value of an A mode stress induced leakage current flowing when the breakdown occurs in a dielectric film in each of plural samples; and a threshold determining step of determining a dielectric breakdown threshold of the A mode stress induced leakage current by statistically processing the measured plural values. As a result, a useful threshold or judgement value usable for predicting the lifetime of the dielectric film can be obtained.
[0125] Furthermore, still another dielectric film evaluating method of this invention includes a step of measuring an A mode stress induced leakage current; and a lifetime predicting step of predicting the lifetime of a dielectric film on the basis of a relationship between the measured value of the A mode stress induced leakage current and a dielectric breakdown threshold of the A mode stress induced leakage current. As a result, the lifetime of the dielectric film can be predicted without continuing the stressing until the dielectric breakdown is actually caused.
[0126] In this manner, according to the present invention, the time and the sample number required for the measurement can be suppressed without degrading the reliability of the measurement result. As a result, the lifetime of an oxide can be highly accurately predicted in a shorter period of time.
Claims
What is claimed is:
1. A dielectric film evaluating method comprising the steps of:
repeatedly applying electrical stress of a first voltage or a first current to each of a plurality of sample dielectric films formed similarly to a target dielectric film, which is to be evaluated, for a first period of time, and repeatedly measuring an A mode stress induced leakage current (A-SILC) flowing through each of the sample dielectric films, thereby obtaining a respective specific A-SILC value for each of the plurality of sample dielectric films, each of the specific A-SILC values being a value which the A-SILC has when breakdown occurs in each of the plurality of sample dielectric films;
and determining a breakdown threshold A-SILC of the target dielectric film by conducting a statistical analysis on the specific A-SILC value of the sample dielectric films.
2. The dielectric film evaluating method of claim 1, wherein the step of determining the breakdown threshold A-SILC of the target dielectric film includes a step of defining a relationship between the specific A-SILC values of the sample dielectric films and a cumulative failure, to assign, as the breakdown threshold A-SILC of the target dielectric film, an A-SILC value which is obtained when the cumulative failure is equal to a predetermined value in accordance with the defined relationship.
3. The dielectric film evaluating method of claim 1, wherein the breakdown threshold A-SILC of the target dielectric film is indicated using a function of temperature at which the electrical stress is applied to the plurality of sample dielectric films.
4. The dielectric film evaluating method of claim 1, further comprising, after the step of determining the breakdown threshold A-SILC of the target dielectric film;
a step of repeatedly applying electric stress of the first voltage, a second voltage, the first current or a second current to the target dielectric film for the first period of time or a second period of time and repeatedly measuring an A-SILC flowing through the target dielectric film, until an A-SILC value which is equal to, or larger than, the breakdown threshold A-SILC of the target dielectric film or a judgement value determined based thereon, is measured; and
a step of calculating a total time for the electrical stress application which is repeatedly performed on the target dielectric film, as a lifetime of the target dielectric film.
5. The dielectric film evaluating method of claim 4, wherein the electrical stress applied to the target dielectric film is the first or second current;
the method further comprising, after the step of calculating the total time for the electrical stress application to the target dielectric film, a step of calculating a total amount of electric charges which are supplied to the target dielectric film until breakdown occurs in the target dielectric film, based on the first or second current and the lifetime of the target dielectric film.
6. The dielectric film evaluating method of claim 1, further comprising, after the step of determining the breakdown threshold A-SILC of the target dielectric film:
a step of repeatedly applying electrical stress of the first voltage, a second voltage, the first current or a second current to the target dielectric film for the first period of time or a second period of time and repeatedly measuring an A-SILC flowing through the target dielectric film, a step of defining a relationship between the measured A-SILC flowing through the target dielectric film and a total time for the electrical stress application which is repeatedly performed on the target dielectric film; and
a step of calculating, as a lifetime of the target dielectric film, an amount of time from the beginning of the electrical stress application to the target dielectric film to a time when an A-SILC of the target dielectric film has a value which is equal to, or larger than, the breakdown threshold A-SILC of the target dielectric film or a judgment value determined based thereon in accordance with the defined relationship.
7. The dielectric film evaluating method of claim 6, wherein the measurement of A-SILC flowing though the target dielectric film is repeatedly performed until the total time for the electrical stress application to the target dielectric film is equal to, or larger than, a predetermined time.
8. The dielectric film evaluating method of claim 6, wherein the measurement of A-SILC flowing through the target dielectric film is repeatedly performed until an A-SILC value of the target dielectric film which is equal to, or larger than, a predetermined value is measured.
9. The dielectric film evaluating method of claim 6, wherein:
the relationship between the measured A-SILC flowing through the target dielectric film and the total time for the electrical stress application to the target dielectric film is defined by plotting the measured A-SILC values and the total time on a log-log scale and applying a straight line to a result from the plotting.
10. The dielectric film evaluating method of claim 6 wherein:
the relationship between the measured A-SILC values flowing through the target dielectric film and the total time for the electrical stress application to the target dielectric film is represented as IA=a×tb, where IAis any of the measured A-SILC values flowing through the target dielectric film, t is the total time for the electrical stress application to the target dielectric film, and each of a and b is a constant.
11. A dielectric film evaluating apparatus for practicing the dielectric film evaluating method of claim 1, comprising:
a holder for holding a sample in which a dielectric film to be evaluated is formed;
a probe to be brought in electrical contact with the sample placed on the holder; and
a measurement unit for applying an electrical stress to the sample through the probe and measuring a current or voltage.
12. A dielectric film evaluating apparatus for practicing the dielectric film evaluating method of claim 6, comprising:
a holder for holding a sample in which a dielectric film to be evaluated is formed;
a probe to be brought in electrical contact with the sample placed on the holder; and
a measurement unit for applying an electrical stress to the sample through the probe and measuring a current or voltage.
13. The dielectric film evaluating apparatus of claim 11, further comprising an analysis unit for analyzing data obtained by the measurement unit.
14. The dielectric film evaluating apparatus of claim 12, further comprising an analysis unit for analyzing data obtained by the measurement unit.
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