Semiconductor integrated circuit device

[0002] 1. Field of the Invention

[0003] The present invention relates to a semiconductor integrated circuit device, and particularly to a semiconductor integrated circuit device in which the input/output pads of a semiconductor chip and the inner leads of the frame on which the semiconductor chip is mounted are connected electrically by bonding wires.

[0004] 2. Description of the Prior Art

[0005] Usually, a plurality of input/output pads are formed around a semiconductor chip. In a semiconductor integrated circuit device, such input/output pads and the inner leads of the frame on which the semiconductor chip is mounted are connected electrically, for example, by wire bonding so that the semiconductor chip can electrically communicate with circuits or devices formed or placed outside its package.

[0006] Conventionally, in a semiconductor integrated circuit device, input/output pads are arranged as shown in FIG. 5A; that is, input/output pads 11a, 11b, 11c, . . . are arranged in a line along each side of a semiconductor chip 1, at intervals that increase toward a corner (d₁>d₂> . . . ). Alternatively, as shown in FIG. 6, input/output pads 11a, 11b, 11c, . . . are arranged in two lines along each side of a semiconductor chip 1, at regular intervals (d is constant).

[0007] On the other hand, as shown in FIG. 7, a typical frame has, with respect to each side of the semiconductor chip 1, inner leads 23 arranged in an area wider than the area in which the input/output pads are arranged (this will hereafter be referred to as “radial arrangement of the inner leads”).

[0008] This causes the input/output pads that are arranged closer to a corner to form smaller wire angles θ (i.e. the angles that the wires 3a, 3b, . . . , 3m, 3n, . . . form with respect to the corresponding side of the semiconductor chip 1). As a result, if, as shown in FIG. 5B, the input/output pads are arranged at regular intervals (d₁=d₂= . . . ), the distances between the wires, as measured near the semiconductor chip 1, become shorter and shorter toward a corner (W₁<W₂), increasing the risk of a short circuit occurring between wires. To avoid this, in the arrangement shown in FIG. 5A, the input/output pads are arranged at intervals that increase toward a corner. This, however, inevitably increases the chip size.

[0009] On the other hand, in the arrangement shown in FIG. 6, the input/output pads are arranged in two lines and at regular intervals, and therefore, as long as the same number of input/output pads are arranged, the arrangement of FIG. 6 requires a smaller chip size than those of FIGS. 5A and 5B. However, the use of a typical frame, in which the inner leads are arranged radially, causes the wire angles to become smaller and smaller toward a corner until, as indicated by arrow Y in FIG. 6, two adjacent wires 3aand 3b, which are connected to an outer pad 11aand an inner pad 11brespectively, cross each other.

[0010] This can be avoided by varying the wiring heights of adjacent wires. This, however, increases the thickness of the semiconductor integrated circuit device as a whole. It should be noted that an increase in thickness is as undesirable as an increase in area. Incidentally, the arrangement shown in FIG. 6 is very effective in cases where sufficiently large wire angles θ can be secured for all pads, though a special arrangement of the inner leads 23 is required on the part of the frame to secure sufficiently large wire angles θ for all pads.

[0011] An object of the present invention is to provide a semiconductor integrated circuit device in which a semiconductor chip of a minimal size can be used and in which, nevertheless, a typical frame having inner leads arranged radially can be used without increasing the thickness of the semiconductor integrated circuit device as a whole.

[0012] To achieve the above object, according to the present invention, in a semiconductor integrated circuit device in which a plurality of input/output pads formed on a semiconductor chip and a plurality of inner leads formed on a frame on which the semiconductor chip is mounted are connected electrically by wire bonding, the plurality of input/output pads are arranged in such a way that the normal from any input/output pad to at least one of the wires, or imaginary extension lines thereof, adjacent to the wire connecting that input/output pad to the corresponding inner lead has a predetermined length.

[0013] In this arrangement, for example by arranging the input/output pads in such a way that the length of the above normal is kept minimal as long as wire bonding can be performed without interference, it is possible to realize a semiconductor integrated circuit device in which a semiconductor chip of a minimal size can be used and in which, nevertheless, a typical frame having inner leads arranged radially can be used without increasing the thickness of the semiconductor integrated circuit device as a whole.

[0014] This and other objects and features of the present invention will become clear from the following description, taken in conjunction with the preferred embodiments with reference to the accompanied drawings in which:

[0015] FIG. 1 is an enlarged view of a part of a semiconductor integrated circuit device embodying the invention;

[0016] FIG. 2 is an enlarged view around the middle point of a side of the semiconductor chip shown in FIG. 1;

[0017] FIG. 3 is an enlarged view of a part of another semiconductor integrated circuit device embodying the invention;

[0018] FIG. 4 is a diagram showing the results of comparison of the semiconductor chip size between conventional semiconductor integrated circuit devices and those according to the present invention;

[0019] FIG. 5A is a diagram illustrating how input/output pads are arranged on a semiconductor chip in a conventional semiconductor integrated circuit device;

[0020] FIG. 5B is another diagram illustrating how input/output pads are arranged on a semiconductor chip in a conventional semiconductor integrated circuit device;

[0021] FIG. 6 is still another diagram illustrating how input/output pads are arranged on a semiconductor chip in a conventional semiconductor integrated circuit device; and

[0022] FIG. 7 is a diagram illustrating inner leads arranged radially on a frame.

[0023] Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is an enlarged view of a part of a semiconductor integrated circuit device embodying the present invention. As shown in FIG. 1, along each side of a semiconductor chip 1, input/output pads 11 are arranged in two lines. Although, in FIG. 1, the pads arranged in the outer lines look as if making contact with the pads arranged in the inner lines, actually there exist gaps between them that keep them out of contact with each other.

[0024] The semiconductor chip 1 is mounted, by die bonding or the like, on a stage 21 formed on the frame 2. The stage 21 is formed as an island that is, at corners, supported by support bars 22. In each of the areas created by the support bars 22 dividing the surface of the frame 2, a number of inner leads 23 are arranged radially. The pads 11 and the inner leads 23 are connected by way of wires 3.

[0025] FIG. 2 is an enlarged view around the middle point of a side of the semiconductor chip 1 shown in FIG. 1. Now, with reference to this figure, how the positions of the input/output pads are determined will be described. For each side of the semiconductor chip, first, the position of the input/output pad 11athat is connected to the inner leads 23alocated approximately at the middle of the area between two support bars 22 is so determined that its center falls on point A in the outer line X1 where a wire angle θ of approximately 90° is obtained.

[0026] Next, the position of the input/output pad 11bthat is connected to the inner lead 23badjacent to, and located closer to a corner than, the inner lead 23ais so determined that its center falls on point B in the inner line X2 where the normal h1 therefrom to the imaginary extension line 4aof the wire 3aconnecting the pad 11aand the inner lead 23ahas a predetermined length; in other words, point B is where an imaginary line 5aparallel to and a predetermined distance a apart from the wire 3aintersects with the inner line X2.

[0027] Next, the position of the input/output pad 11cthat is connected to the inner lead 23cadjacent to, and located closer to a corner than, the inner lead 23bis so determined that its center falls on point C in the outer line X1 where the normal h2 therefrom to the wire 3bconnecting the pad 11band the inner lead 23bhas a predetermined length; in other words, point C is where an imaginary line 5bparallel to and a predetermined distance b apart from the wire 3bintersects with the outer line X1.

[0028] In this way, when the position of the input/output pad connected to one particular inner lead is determined, the position of the input/output pad connected to the inner lead adjacent to, and located closer to a corner than, that inner lead is determined automatically. This is repeated until eventually the position of the input/output pad connected to the inner lead located closest to the support bar 22 at the corner is determined. In the same manner, the positions of the input/output pads are determined for the remaining half of this side, and further for the other sides. Note that, in the embodiment under discussion, any two input/output pads that are connected to adjacent inner leads are arranged in different lines.

[0029] The positions of the input/output pads are determined in the manner as described above. Meanwhile, the lengths of the normals h1, h2, h3, . . . to the wires connecting the pads and the inner leads, i.e. the predetermined distances a, b, c, . . . , are kept minimal as long as wire bonding can be performed without interference; that is, it is necessary to keep those distances as short as possible but sufficiently long, for example, to prevent the wire catching mechanism of the wire bonder from making contact with already-connected wires (such distances will hereafter be referred to simply as “minimal distances”).

[0030] The above-described arrangement makes it possible to arrange the pads as densely as possible without causing interference in wire bonding. In addition, in this arrangement, the use of a typical frame in which the inner leads are arranged radially does not result in wires crossing each other. Thus, this arrangement makes it possible to realize a semiconductor integrated circuit device in which a semiconductor chip of a minimal size can be used and in which, nevertheless, a typical frame having inner leads arranged radially can be used without increasing the thickness of the semiconductor integrated circuit device as a whole.

[0031] FIG. 3 is an enlarged view of a part of another semiconductor integrated circuit device embodying the present invention. Also in this embodiment, the length of the normal from the center of a pad to the wire connected to the inner lead adjacent to the inner lead to which that pad is connected is kept minimal. In addition, in this embodiment, the pads are arranged in three lines along each side of the semiconductor chip 1. This helps achieve a smaller chip size than in the previous embodiment, provided that the same number of pads are arranged.

[0032] In the embodiments described above, the pads are arranged in two or three lines along each side of the semiconductor chip. However, it is also possible to arrange the pads in four or more lines as long as the length of the normal from the center of a pad to the wire connected to the inner lead adjacent to the inner lead to which that pad is connected is kept minimal.

[0033] Moreover, the input/output pads do not necessarily have to be arranged in lines along the sides of the semiconductor chip, but may be arranged in any way as long as the length of the normal from the center of a pad to the wire connected to the inner lead adjacent to the inner lead to which that pad is connected is kept minimal, and as long as the pads do not make contact with each other.

[0034] Moreover, although the determination of the positions of the input/output pads is started with the input/output pad located at the middle of each side of the semiconductor chip in the examples described above, it is also possible to start the determination with, for example, the input/output pad located at a corner, or any other input/output pad.

[0035] Moreover, in arrangements according to the present invention, the use of a typical frame in which the inner leads are arranged radially inevitably requires the semiconductor chip to have input/output pads arranged at intervals that increase toward a corner. This helps prevent a short circuit between adjacent wires.

[0036] Furthermore, in arrangements according to the present invention, the relation between the number of pads and the chip size is as indicated by the dashed line L2 in FIG. 4, whereas the same relation in conventional arrangements is as indicated by the solid line L1. Thus, according to the present invention, it is possible to reduce the chip size down to 60 to 70%, and it is also known that the greater the number of input/output pads, the more the chip size can be reduced.

[0037] As described heretofore, according to the present invention, it is possible to realize a semiconductor integrated circuit device in which a semiconductor chip of a minimal size can be used and in which, nevertheless, a typical frame having inner leads arranged radially can be used without increasing the thickness of the semiconductor integrated circuit device as a whole.