Laser driving circuit capable of stably controlling laser output

[0002] This invention relates to a driving circuit for a semiconductor laser which is applied to an optical disk recording/reproducing apparatus using a recordable compact disk (CD-R), digital versatile disk (DVD-RAM), magneto-optic disk (MO), for example.

[0003] As the laser driving circuit applied to the above type of apparatus, an automatic power control (APC) system and automatic current control (ACC) system are provided.

[0004] FIG. 12 shows a conventional apparatus of APC system used for an MO, for example. The apparatus includes a laser driving circuit 101, a laser diode (LD) 102 constructed by a semiconductor laser, lenses 103, 105, 106, 108 constructing an optical system, a beam splitter 104, a 4-segment sensor 107, for example, for detecting reflected light from an optical disk 110 at the data readout time, and a photodiode 109 for detecting an output signal from the laser diode 102 and feeding the same back to the laser driving circuit 101. The laser driving circuit 101 controls the amount of emission light of the laser diode 102 according to a signal supplied from the photodiode 109.

[0005] FIG. 13 shows a conventional apparatus of ACC system used for CD-R or DVD-RAM, for example. The apparatus includes a laser driving circuit 111, a laser diode (LD) 112, lenses 113, 115, 116 constructing an optical system, a beam splitter 114, a 4-segment sensor 117, for example, for detecting reflected light from an optical disk 119 at the data readout time, a photodiode 118 used as a photodetector for detecting an output light amount of the laser diode 112, an amplifier 120 for amplifying an output signal of the photodiode 118 and a digital signal processing circuit 121 for processing an output signal of the amplifier 120 and supplying the processed signal to the laser driving circuit 111. The digital signal processing circuit 121 includes an analog/digital converter (A/D) 121afor converting an output signal of the amplifier 120 into a digital signal, a microprocessor unit (MPU) 121bfor processing an output signal of the analog/digital converter 121a,and a digital/analog converter (D/A) 121cfor converting an output signal of the microprocessor unit 121binto an analog signal. The laser driving circuit 111 controls the amount of emission light of the laser diode 112 according to a signal supplied from the digital signal processing circuit 121 by use of a current value thereof.

[0006] In the case of APC system shown in FIG. 12, a plurality of pulse signals are generated for each pit in order to form pits of good shape in the optical disk. The laser diode is driven by the pulse signals. Therefore, the laser diode 102 is driven by a high-frequency pulse signal. As a result, it is required for the photodiode 109 which monitors the light emission output of the laser diode 102 to have a wide-band characteristic of 500 MHz, for example. Further, a high-precision lens is used as the lens 108 for guiding the laser light to the photodiode 109. On the other hand, in the case of ACC system, the high-speed response in comparison with the APC system is not required. Therefore, the photodetector and optical system can be made simple in construction.

[0007] However, in the conventional ACC system shown in FIG. 13, in the laser driving circuit 111 constructed by a semiconductor integrated circuit, variations occur in resistances of resistors constructing the circuit. Further, the resistance fluctuates depending on the temperature. In addition, the transistor characteristic also fluctuates depending on the temperature. Therefore, it is difficult to stabilize the laser output with high precision.

[0008] This invention has been made in order to solve the above problem and an object of this invention is to provide a laser driving circuit capable of stabilizing the laser output with high precision.

[0009] The above object can be attained by a laser driving circuit comprising: a first amplifier for comparing an input signal which controls a light emission intensity of a semiconductor laser with a monitor signal obtained by monitoring a driving current of the semiconductor laser and effecting the control operation to make the input signal and the monitor signal substantially equal to each other; a second amplifier connected to an output terminal of the first amplifier; an adder circuit for adding together output signals of the first and second amplifiers; a driving current generating circuit having an input terminal supplied with an output signal of the adder circuit and an output terminal configured to be connected to the semiconductor laser, for generating a driving current of the semiconductor laser according to the output signal of the adder circuit; and a terminal to which a resistor for detecting the driving current output from the driving current generating circuit and generating the monitor signal is connected.

[0010] Further, a laser driving circuit comprising: a first amplifier for comparing an input signal which controls a light emission intensity of a semiconductor laser with a feedback signal obtained by feeding back a driving current of the semiconductor laser and effecting the control operation to make the input signal and the feedback signal substantially equal to each other; a second amplifier connected to an output terminal of the first amplifier; an adder circuit for adding together output signals of the first and second amplifiers; a driving current generating circuit supplied with an output signal of the adder circuit, for generating the driving current of the semiconductor laser, at least part of the driving current being fed back to the first amplifier as the feedback signal; and a resistor connected to an input terminal of the first amplifier, for detecting the feedback signal fed back from the driving current generating circuit.

[0011] In addition, a laser driving circuit comprising: at least two converting circuits for converting at least two input signals which control a light emission intensity of a semiconductor laser to currents for generating a driving current used for driving the semiconductor laser; a current mirror circuit having an input terminal supplied with output signals of the at least two converting circuits; a current switch circuit connected to an output terminal of the current mirror circuit, for eliminating a current which is unnecessary for an operation mode of the semiconductor laser from an output signal of the current mirror circuit according to the operation mode of the semiconductor laser to generate a control current; and a driving current generating circuit having an input terminal supplied with the control current and an output terminal configured to be connected to the semiconductor laser, for generating the driving current of the semiconductor laser according to the control current.

[0012] Further, a laser driving circuit comprising: at least two converting circuits for converting at least two input signals which control a light emission intensity of a semiconductor laser to currents for generating a driving current used for driving the semiconductor laser; a current switch circuit connected to each output terminal of the at least two converting circuits, for eliminating a current which is unnecessary for an operation mode of the semiconductor laser from sum of output signals of the at least two converting circuits according to the operation mode of the semiconductor laser to generate a control current; and a driving current generating circuit having an input terminal supplied with the control current and an output terminal configured to be connected to the semiconductor laser, for generating the driving current of the semiconductor laser according to the control current.

[0013] According to the laser driving circuit of this invention, the laser output can be stabilized with high precision without being influenced by fluctuations in the resistances of the internal circuit and variations in the resistances due to a temperature change.

[0014] Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.

[0015] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate presently preferred embodiments of the invention, and together with the general description given above and the detailed description of the preferred embodiments given below, serve to explain the principles of the invention.

[0016] FIG. 1 is a circuit diagram showing a first embodiment of this invention;

[0017] FIG. 2 is an equivalent circuit diagram schematically showing the circuit of FIG. 1;

[0018] FIG. 3 is a circuit diagram showing a second embodiment of this invention;

[0019] FIG. 4 is a circuit diagram showing a third embodiment of this invention;

[0020] FIG. 5 is an equivalent circuit diagram schematically showing the circuit of FIG. 4;

[0021] FIG. 6 is a circuit diagram showing a fourth embodiment of this invention;

[0022] FIG. 7A is a construction diagram schematically showing a current switch circuit;

[0023] FIG. 7B is a waveform diagram showing one example of a control current Icnt;

[0024] FIG. 8 is an equivalent circuit diagram showing the driving circuit of FIG. 6;

[0025] FIG. 9 is a circuit diagram showing the main portion of a modification of FIG. 6;

[0026] FIG. 10 is a circuit diagram showing a fifth embodiment of this invention;

[0027] FIG. 11 is a circuit diagram showing the main portion of a modification of FIG. 10;

[0028] FIG. 12 is a construction diagram showing one example of a conventional laser driving circuit; and

[0029] FIG. 13 is a construction diagram showing another example of a conventional laser driving circuit.

[0030] There will now be described embodiments of this invention with reference to the accompanying drawings.

[0031] (First Embodiment)

[0032] FIG. 1 shows a first embodiment of a laser driving circuit according to this invention. The circuit is applied to the ACC system shown in FIG. 13. In FIG. 1, a laser driving circuit 11 has pads 11ato 11g.Write data WD is supplied to the pad 11a.A control signal from the digital signal processing circuit 121 shown in FIG. 13 is supplied to the pad 11b.A laser diode LD constructed by a semiconductor laser is connected between the pad 11cand the ground node. A resistor Rm is connected between the pad 11dand a power supply Vcc. The resistor Rm is an externally attached monitoring resistor for monitoring a current flowing in the laser diode LD. The pad 11eis connected to the power supply Vcc and the pad 11fis grounded. To the pad 11g,a variable resistor VR for controlling the gain of a gain control amplifier which will be described later is connected.

[0033] The input terminal of a logic circuit (LGC) 12 is connected to the pad 11a.The logic circuit 12 includes a level converting circuit, for example, and converts the write data WD of TTL level into a signal of ECL level. The output terminal of the logic circuit 12 controls a switch circuit 13. A voltage/current converting circuit (V/I) 14 is connected to the pad 11b.The voltage/current converting circuit 14 converts a control signal of voltage level supplied from the digital signal processing circuit 121 to a current. An output current of the voltage/current converting circuit 14 is supplied to a current source 15 to control the current of the current source 15. The switch circuit 13 and current source 15 are serially connected between the power supply Vcc and the ground node together with a resistor 16.

[0034] A connection node n1 of the switch circuit 13 and the resistor 16 is connected to the non-inverting input terminal of a gain control amplifier 17. A monitor voltage is supplied from a transistor 29 which will be described later to the inverting input terminal of the gain control amplifier 17 via a resistor 18. An output signal of the gain control amplifier 17 is supplied to the input terminal of an integrating amplifier 19 constructed by an operational amplifier. The output terminal of the integrating amplifier 19 is connected to the base of an NPN transistor 20. The collector of the transistor 20 is connected to the power supply Vcc and the emitter thereof is grounded via a constant current source 22 together with the emitter of a transistor 21. The base of the transistor 21 is connected to the inverting output terminal of the gain control amplifier 17 and the collector thereof is connected to the power supply Vcc via a resistor 23. The transistors 20, 21, constant current source 22 and resistor 23 constitute an adder circuit ADD for adding together a current output from the inverting output terminal of the gain control amplifier 17 and a current output from the integrating amplifier 19.

[0035] A connection node of the collector of the transistor 21 and the resistor 23 is connected to the base of a transistor 24. The collector of the transistor 24 is connected to the power supply Vcc and the emitter thereof is grounded via a constant current source 25. Further, the emitter of the transistor 24 is connected to the base of a transistor 26. The collector of the transistor 26 is connected to the power supply Vcc and the emitter thereof is connected to the pad 11cvia a resistor 27 and to the bases of transistors 28, 29. The collector of the transistor 28 is connected to the power supply Vcc and the emitter thereof is connected to the pad 11c.The collector of the transistor 29 is connected to the pad 11dand to the inverting input terminal of the gain control amplifier 17 via the resistor 18 and the emitter thereof is connected to the pad 11c.The sizes of the transistors 28 and 29 are made equal to each other. The transistor 29 causes half of the driving current to flow through the resistor Rm to derive a monitor signal. The transistors 24, 26, constant current source 25 and resistor 27 constitute a buffer circuit BUF and the transistors 28, 29 constitute a driving circuit DRV.

[0036] The gain control amplifier 17, integrating amplifier 19 and adder circuit ADD constitute a wide-band amplifier. The wide band amplifier advances the phase in the high-frequency range to compensate for the phase delay caused by the resistor Rm connected to the pad 11dand a parasitic capacitor (not shown) connected to the pad 11d.

[0037] Further, a photodiode (not shown) used as a photodetector is arranged near the laser diode LD. The light emission intensity of the laser diode LD is detected by use of the photodiode. The light emission intensity detected is processed by a digital signal processing circuit (not shown) and then supplied to the pad 11b.The photodiode and digital signal processing circuit have substantially the same constructions as those in the conventional case.

[0038] With the above construction, write data WD input to the pad 11ais supplied to the switch circuit 13 via the logic circuit 12 in the data writing mode, for example. Further, a voltage corresponding to the light emission intensity of the laser diode LD is supplied to the pad 11b.The voltage is supplied to the constant current source 15 via the voltage/current converting circuit 14. The potential of the connection node n1 is determined by the current flowing in the constant current source 15. The gain control amplifier 17 compares the potential of the connection node n1 with the voltage converted from the driving current of the laser diode LD which is detected by the monitoring resistor Rm so as to effect the control operation to make them equal to each other. The output voltage of the gain control amplifier 17 is supplied to the driving circuit DRV via the integrating amplifier 19, adder circuit ADD and buffer circuit BUF. The buffer circuit BUF and driving circuit DRV constitute a driving current generating circuit and the driving circuit DRV drives the laser diode LD according to an output signal of the buffer circuit BUF.

[0039] FIG. 2 shows an equivalent circuit of the circuit shown in FIG. 1 and portions which are the same as those of FIG. 1 are denoted by the same reference numerals. An amplifier 30 is equivalent to a combination of the gain control amplifier 17, integrating amplifier 19, transistors 20, 21, 24, and 26 and resistor R23, all shown in FIG. 1. If an input voltage supplied to the amplifier 30 is Vi, an input current is Ii and the resistance of the resistor 16 is Ri, then the input voltage Vi can be expressed by the following equation (1). In addition, the voltage in the following equations (1) to (12) dose not show an absolute value.

[0040] Vi=Ri(1+ΔR)×Ii  (1)

[0041] If an input voltage to the integrating circuit is V, the internal resistance is R and the variation component thereof is ΔR, then the current Ii can be expressed by the following equation.

[0042] Ii=V/R(1+ΔR)  (2)

[0043] Further, if the driving current flowing in the laser diode LD is I_LDand the terminal voltage of the resistor Rm is set to an output voltage Vo, then the output voltage Vo can be expressed by the following equation (3).

[0044] Vo=Rm×I_LD  (3)

[0045] As described before, the amplifier 30 is operated to make the input voltage Vi and output voltage Vo equal to each other. Therefore, the relation of Vi=Vo can be attained. As a result, the driving current I_LDcan be rewritten into the following equation (4) based on the equations (1), (2), (3).

[0046] I_LD=V·Ri/Rm·R  (4)

[0047] Thus, the error component ΔR of the resistance can be eliminated, and the variations of the internal resistance can be compensated. The resistance of the resistor Rm provided outside the integrated circuit can be set with high precision. Therefore, a laser output having no variations of the internal resistance can be obtained by use of the resistor Rm.

[0048] According to the first embodiment, the sizes of the transistors 28, 29 constituting the driving circuit DRV are set equal to each other and half of the driving current I_LDwhich flows into the collector of the transistor 29 is monitored by use of the resistor Rm and fad back to the gain control amplifier 17. Therefore, the current control can be attained with high precision by use of a driving current which is 2Ri/Rm times the set current.

[0049] Since the output signals of the gain control amplifier 17 and integrating amplifier 19 are added together by the adder circuit ADD, the phase can be advanced in the high-frequency region. Therefore, the phase delay caused by the resistor Rm and parasitic capacitor can be suppressed and the wide-band control of 300 MHz or higher can be attained.

[0050] The current flowing in the laser diode LD is monitored by use of the externally attached resistor Rm and a variation in the resistance of the internal resistor in the manufacturing process and a variation thereof due to the temperature change can be compensated for. Therefore, the laser output can be stabilized with high precision.

[0051] In addition, a current flows in the externally attached resistor Rm only when the laser diode LD is driven and does not normally flow therein. Therefore, the power consumption can be suppressed.

[0052] (Second Embodiment)

[0053] FIG. 3 shows a second embodiment of this invention. In FIG. 3, portions which are the same as those of FIG. 1 are denoted by the same reference numerals and only different portions are explained.

[0054] The characteristics of the transistors 28, 29 (the size ratio is set to 1:M constituting the driving circuit DRV are changed according to variations in the power supply voltage Vcc and the temperature and the driving current generated therefrom varies. In the second embodiment, a variation in the driving current generated from the buffer circuit BUF and driving circuit DRV is compensated for.

[0055] In the laser driving circuit 11 shown in FIG. 3, the cathode of the laser diode LD is connected to the pad 11cand the anode thereof is connected to the power supply Vcc. That is, in this embodiment, for example, an anode common type laser diode in which the anode of the laser diode LD is connected to the cathode of a photodiode (not shown) is used. The pad 11cis connected to the collector of a transistor 29 whose emitter is connected to a pad 11h.The pad 11his grounded via a load resistor R_L. The pad 11dto which an externally attached monitoring resistor Rm is connected is connected to the collector of a transistor 28. The collector of the transistor 28 is connected to the inverting input terminal of the gain control amplifier 17. The inverting input terminal is grounded via a capacitor Cc.

[0056] The size of the transistor 29 is set to M times the size of the transistor 28. Therefore, in this embodiment, the resistor Rm monitors a current which is 1/M times the current flowing in the laser diode LD.

[0057] A compensation circuit COMP is connected to the adder circuit ADD. The compensation circuit COMP includes an operational amplifier 31, constant current source 32, a plurality of diodes 33, resistor 34 and transistor 35. The diode group 33 generates a voltage corresponding to the total sum of base-emitter voltages of the three transistors 24, 26, 29. The constant current source 32, plurality of diodes 33 and resistor 34 are serially connected between the power supply Vcc and the ground node. The connection node of the constant current source 32 and the diode group 33 is connected to the non-inverting input terminal of the operational amplifier 31. The output terminal of the operational amplifier 31 is connected to the base of the transistor 35. The collector of the transistor 35 is connected to the power supply Vcc and the emitter thereof is connected to the collector of the transistor 20 and the inverting input terminal of the operational amplifier 31.

[0058] With the above construction, the constant current source 32, plurality of diodes 33 and resistor 34 create a temperature-compensated reference voltage Vref for the transistors 24, 26, 29. The reference voltage vref can be expressed by the following equation if a current flowing in the constant current source 32 is I₃₂, a voltage generated from the diode group 33 is 3V_Fand the resistance of the resistor 34 is R₃₄.

[0059] Vref=I₃₂·R₃₄+3V_F  (5)

[0060] The operational amplifier 31 is operated to make the emitter voltage of the transistor 35 or the power supply voltage of the adder circuit ADD and the reference voltage Vref equal to each other. Therefore, the adder circuit ADD outputs a temperature-compensated signal. Since the buffer circuit BUF and driving circuit DRV are operated by the temperature-compensated signal, a variation in the driving current due to the temperature change can be prevented.

[0061] According to the second embodiment, the same effect as that of the first embodiment can be attained. Further, according to the second embodiment, a variation in the driving current of the buffer circuit BUF and driving circuit DRV due to the temperature change can be prevented by temperature-compensating for the output signal of the adder circuit ADD by use of the compensation circuit COMP. Therefore, the laser diode LD can be controlled with high precision irrespective of the temperature change.

[0062] The compensation circuit COMP is provided in a portion other than the feedback loop connecting the driving circuit DRV and the gain control circuit 17. If the compensation circuit COMP is provided in the feedback loop, it becomes necessary to increase currents flowing in the transistors 20, 21 constituting the adder circuit ADD. However, currents flowing in the transistors 20, 21 can be reduced by providing the compensation circuit COMP in a portion other than the feedback loop as in this embodiment.

[0063] (Third Embodiment)

[0064] FIG. 4 shows a third embodiment of this invention. In FIG. 4, portions which are the same as those of FIG. 3 are denoted by the same reference numerals and only different portions are explained. In the second embodiment, the driving current is set by use of the voltage value and the externally attached monitoring resistor Rm is connected to the exterior of the laser driving circuit 11. However, in this embodiment, since the driving current is set by use of the current value, the monitoring resistor Rm is provided inside the laser driving circuit 11. That is, one end of the resistor Rm is connected to the power supply Vcc and the other end thereof is connected to the inverting input terminal of the gain control amplifier 17. Further, a current/current converter 14′ constructed by one transistor, for example, for converting a current value is connected between the pad 11band a constant current source 15. The reason why the monitoring resistor Rm is arranged inside the IC is explained below in detail.

[0065] FIG. 5 shows the schematic equivalent circuit of the circuit shown in FIG. 4. If a driving current fed back by a transistor 28 is I_LD/N and an error component of the resistor in the semiconductor integrated circuit is ΔR, then a voltage V_FBsupplied to the inverting input terminal of the gain control amplifier 17 can be expressed by the following equation.

[0066] V_FB=I_LD×Rm(1+ΔR)/N  (6)

[0067] Further, if an input current supplied to the non-inverting input terminal of the gain control amplifier 17 is Iin and the resistance of the resistor 16 is Ri, a voltage Vin of the non-inverting input terminal of the gain control amplifier 17 can be expressed by the following equation.

[0068] Vin=Iin×Ri(1+ΔR)  (7)

[0069] Since the gain control amplifier 17 is operated to make the voltage Vi and the voltage V_FBequal to each other, the following equation (8) can be attained based on the equations (6), (7).

[0070] V_FB=Vin Iin×Ri(1+ΔR)=I_LD×Rm(1+ΔR)/N I_LD=Iin×Ri(1+ΔR)×N/Rm(1+ΔR) I_LD=Iin·N·Ri/Rm  (8)

[0071] As is understood from the equation (8), the error component ΔR of the resistor can be eliminated by containing the resistor Rm. Therefore, a variation in the internal resistance can be compensated for by use of the circuit shown in FIG. 4 and the output of the laser diode LD can be stabilized with high precision.

[0072] (Fourth Embodiment)

[0073] FIG. 6 shows a fourth embodiment of this invention. A laser driving circuit 51 includes pads 51ato 51j.The pad 51ais supplied with a voltage Vr at the data readout time. The pad 51bis supplied with a peak voltage (maximum voltage) Vwp at the data write time and the pad 51cis supplied with a bottom voltage (minimum voltage) Vwb at the data write time. The voltages Vr, Vwp, Vwb are generated from the digital signal processing circuit (DSP) and used as signals for controlling the DSP according to the light emission intensity of the laser diode LD. Further, the pad 51dis supplied with a read/write signal R/W and the pad 51eis supplied with write data WD. The pad 51fis supplied with a signal HFM for controlling the operation of an oscillation circuit (OSC) 58 which will be described later.

[0074] Further, the laser diode LD is connected between the pad 51gand the power supply Vcc. The laser diode LD is an anode common type diode whose anode is connected to the cathode of a photodiode (not shown). An externally attached resistor R_Lis connected between the pad 51hand the ground node, the pad 51iis connected to the power supply Vcc and the pad 51jis grounded.

[0075] The pads 51a,51b,51care respectively connected to the input terminals of voltage/current converting circuits (V/I) 52, 53, 54. The voltage/current converting circuit 52 converts the voltage Vr in the readout mode into a current Ir. The voltage/current converting circuit 53 converts the peak voltage Vwp in the write mode into a current Iwp. The voltage/current converting circuit 54 converts the bottom voltage Vwb in the write mode into a current Iwb. One-side output terminals of the voltage/current converting circuits 52 to 54 are connected to the input terminal of a current mirror circuit (CM) 55 and the other output terminals thereof are connected to a current switch circuit (CSW) 56. The current switch circuit 56 is also connected to the output terminal of the current mirror circuit 55 and the output terminals of a logic circuit 57. The current switch circuit 56 extracts a preset current from the output current Io of the current mirror circuit 55 according to an output signal of the logic circuit 57 to generate a control current Icnt.

[0076] The logic circuit (LGC) 57 is connected to the pads 51d,51e,51f.The logic circuit 57 generates signals for controlling the oscillation circuit (OSC) 58 and the current switch circuit 56 according to the read/write signal R/W, write data WD, signal HFM. Output signals of the logic circuit 57 are supplied to the current switch circuit 56 and oscillation circuit 58. The oscillating operation and interruption thereof in the oscillation circuit 58 are controlled by an output signal of the logic circuit 57. The oscillation circuit 58 outputs a high-frequency signal having a frequency of 300 MHz, for example. The high-frequency signal is supplied to a connection node n2 to which the base of an NPN transistor 59 and the collector of an NPN transistor 60 are connected via a resistor R1 and capacitor C2 and superposed on a control signal Icnt from the current mirror circuit 55.

[0077] The control signal Icnt from the current mirror circuit 55 is supplied to the connection node n2 to which the base of the NPN transistor 59 and the collector of the NPN transistor 60 are connected. The collector of the NPN transistor 60 is grounded via a capacitor C1 and the emitter thereof is grounded via a resistor R2. The output terminal of the oscillation circuit 58 is connected to the base of the NPN transistor 59 via the resistor R1 and capacitor C2. The collector of the transistor 59 is connected to the power supply Vcc together with the collector of a transistor 61. The emitter of the transistor 59 is grounded via a resistor R3 and connected to the base of the NPN transistor 61. The emitter of the transistor 61 is grounded via a resistor R4 and connected to the base of the transistor 60 and the base of a transistor 62. The collector of the transistor 62 is connected to the pad 51gand the emitter thereof is connected to the pad 51h.

[0078] The transistor 62 constitutes a driving circuit DRV. The transistors 59, 60 and 61 constitute a loop LP. Further, the loop LP and the driving circuit DRV constitute a driving current generating circuit. The loop LP effects the control operation to make the collector current of the transistor 60 and the current Icnt equal to each other. The capacitors C1, C2, resistor R1 construct a compensation circuit for preventing oscillation of the loop.

[0079] FIG. 7A schematically shows the construction of the current switch circuit 56. The current switch circuit 56 includes a plurality of switches SW1, SW2, SW3 for extracting preset currents from the output current Io of the current mirror circuit 55. One end of each of the switches SW1, SW2, SW3 is connected to one of the output terminals of a corresponding one of the voltage/current converting circuits 52, 53, 54 and the other end thereof is commonly connected to the output terminal of the current mirror circuit 55. The switching states of the switches SW1, SW2, SW3 are changed by the output signals of the logic circuit 57 to selectively extract selected amounts of currents from the output signal Io of the current mirror circuit 55. FIG. 7A shows a case wherein the current Iwp is extracted from the output signal Io of the current mirror circuit 55. Therefore, in this case, the control current Icnt is equal to Ir+Iwb.

[0080] FIG. 7B shows one example of the control current Icnt. The control current Icnt has a level corresponding to the voltages Vr, Vwp, Vwb.

[0081] With the above construction, the voltage/current converting circuits 52, 53, 54 output currents Ir, Iwp, Iwb corresponding to the voltages Vr, Vwp, Vwb. The currents Ir, Iwp, Iwb are supplied to the input terminal of the current mirror circuit 55 and Io (=Ir+Iwp+Iwb) is output from the output terminal of the current mirror circuit 55. The current switch circuit 56 is operated according to the output signal of the logic circuit 57 so as to extract an unnecessary current from the output current of the current mirror circuit 55 at data write time or data readout time and generate a control current Icnt. The control current Icnt is supplied to the connection node n2 of the base of the transistor 59 and the collector of the transistor 60. Further, a high-frequency signal supplied from the oscillation circuit 58 is superposed in the connection node n2. A signal having the high-frequency signal superposed thereon is amplified by the transistors 59, 60, 61 and supplied to the base of the transistor 62. The laser diode LD is driven by the transistor 62.

[0082] If a current flows in the resistor, electrons are drifted by the resistance thereof to cause noise called thermal noise. In order to reduce the noise, it is important to reduce the resistance of the resistor. For example, when a current flows in the laser diode LD, the noise occurring in the laser diode LD can be suppressed by reducing the input impedance of the transistor 62. That is, the noise contained in the driving current of the laser diode LD can be suppressed by reducing the resistance of the resistor R4 connected to the base of the transistor 62.

[0083] FIG. 8 shows the equivalent circuit of the driving circuit DRV of FIG. 6. That is, the input voltage of the transistor 62 contains thermal noise Vn which is expressed as follows.

[0084] Vn=4kTR^1/2  (9)

[0085] where k is a Bolzmann's constant, T is a thermodynamic temperature and R is the resistance of the resistor R4.

[0086] The current I_LDflowing in the laser diode LD can be roughly expressed by the following equation if the current amplification factor of the transistor is neglected and the voltage of the pad 51his Ve.

[0087] I_LD=Ve/R_L+Vn/R_L  (10)

[0088] Therefore, in order to reduce the noise, it is important to reduce Vn, and in the fourth embodiment, the resistance of the resistor R4 is set to 200 Ω or less, for example, 100 Ω. With this construction, the noise current density for 1 Hz can be suppressed to 1 nA/Hz^1/2or less and if the driving current is 50 mA with 1 nA, RIN (relative noise field intensity ratio) can be set to −154 dB/Hz. The value satisfies enough RIN ≦−40 dB/Hz usually demanded.

[0089] The relation between the control current Icnt and the current I_LDflowing in the laser diode LD can be expressed by the following equation (11).

[0090] Icnt·R2(1+ΔR)/R_L=I_LD  (11)

[0091] Therefore, the control current Icnt can be expressed by the following equation (12).

[0092] Icnt=Vin/R(1+ΔR)  (12)

[0093] where Vin is an input voltage to the laser driving circuit 51 and R(1+ΔR) is an internal resistance and an error component thereof.

[0094] The following equation (13) can be obtained by substituting the equation (12) into the equation (11).

[0095] I_LD=Vin/R(1+ΔR)·R2(1+ΔR)/R_L=Vin·R2/R_L·R(R2/R_Lis a mirror ratio)  (13)

[0096] According to the present embodiment, the current I_LDof the laser diode LD with respect to the input voltage Vin can be easily set by changing the resistance of the resister R_Lthat is externally connected. Further, the resistance of the R_Lcan be set at a desired value with high precision, regardless of the error component ΔR in the integrated circuit. Hence, a laser output can be obtained, not influenced by the variation of the internal resistance.

[0097] Further, in the circuit shown in FIG. 6, the transistors 59, 60 and 61 constitute a loop to feedback a current of the transistor 60 to the base of the transistor 59 in the current mode. If the loop is thus constituted by the transistors 59, 60, 61, there occurs a possibility that phase shift occurs to cause oscillation. Therefore, in this embodiment, the oscillation is prevented by use of the capacitor C1 connected to the connection node n2 and the capacitor C2 used as the coupling capacitor. The resultant capacitance C0 of the capacitors C1 and C2 becomes equal to (C1+C2).

[0098] If an attempt is made to prevent the oscillation only by use of the capacitor C1, the area of the capacitor C1 becomes large and the occupancy ratio thereof in the integrated circuit becomes high. However, by causing the capacitor C2 used as the coupling capacitor to have the oscillation preventing function as in this embodiment, an increase in the area of the capacitor C1 can be suppressed and the integrated circuit can be prevented from being made large.

[0099] The circuit shown in FIG. 6 is a voltage input type circuit. On the other hand, in the case of a current input type circuit, the resistor R_Lmay be provided inside the integrated circuit as shown in FIG. 9. In this case, an input current is subjected to the current/current conversion according to the ratio of the internal resistances.

[0100] (Fifth Embodiment)

[0101] FIG. 10 shows a fifth embodiment of this invention. In this embodiment, the circuit shown in FIG. 6 is constructed by use of PNP transistors and the embodiment indicates a voltage input/current output type laser driving circuit. In FIG. 10, portions which are the same as those of FIG. 6 are denoted by the same reference numerals and only different portions are explained.

[0102] A high-frequency signal output from an oscillation circuit 58 is supplied to a connection node n2 to which the base of a PNP transistor 71 and the collector of a PNP transistor 72 are connected via a resistor R1, capacitor C2. The connection node n2 is connected to the output terminals of voltage/current converting circuits 52, 53, 54 and the input terminal of a current switch 56. In a laser driving circuit 70, the current mirror circuit becomes unnecessary.

[0103] The collector of the transistor 72 is connected to the power supply Vcc via a capacitor C1 and the emitter thereof is connected to the power supply Vcc. The collector of the transistor 71 is grounded together with the collector of a PNP transistor 73. The emitter of the transistor 71 is connected to the power supply Vcc via a resistor R5 and connected to the base of the transistor 73. The emitter of the transistor 73 is connected to the power supply Vcc via a resistor R6 and connected to the base of the transistor 72 and the base of a transistor 74. The emitter of the transistor 74 is connected to a pad 51gand the collector thereof is connected to a pad 51h.An externally attached resistor R_Lis connected between the pad 51gand the power supply and a laser diode LD is connected between the pad 51hand the ground node. The laser diode LD is a cathode common type diode whose cathode is connected to the anode of a photodiode (not shown).

[0104] The transistor 74 constructs a driving circuit, the transistors 71, 72, 73 construct a loop and the loop effects the control operation to make the current Icnt and the collector current of the transistor 72 equal to each other. The capacitors C1, C2 and resistor R1 constitute a compensation circuit for preventing oscillation of the loop.

[0105] With the above construction, the voltage/current converting circuits 52, 53, 54 generate currents Ir, Iwp, Iwb corresponding to input voltages Vr, Vwp, Vwb. The current switch 56 extracts an unnecessary current from the currents Ir, Iwp, Iwb according to an output signal of a logic circuit 57 to generate a control current Icnt. The control current Icnt is supplied to the connection node n2 of the base of the transistor 71 and the collector of the transistor 72. Further, a high-frequency signal supplied from the oscillation circuit 58 is superposed in the connection node n2. A signal having the high-frequency signal superposed thereon is amplified by the transistors 71, 72, 73 and supplied to the base of a transistor 74 which in turn drives the laser diode LD.

[0106] In the above fifth embodiment, the same effect as that of the fourth embodiment can be attained. In addition, in the case of this embodiment, since the current mirror circuit is unnecessary unlike the fourth embodiment, the circuit construction can be made simple and the cost can be lowered.

[0107] Further, in the case of the fifth embodiment, the high-speed operation can be attained by forming the transistors 71 to 74 by use of vertical PNP transistors.

[0108] The circuit shown in FIG. 10 is a voltage input type circuit. In the case of a current input type circuit, the resistor R_Lmay be provided inside the integrated circuit as shown in FIG. 11. In this case, the input current is subjected to the current/current conversion according to the ratio of the internal resistances.

[0109] Additional advantages and modifications will readily occur to those skilled in the art. Therefore, the invention in its broader aspects is not limited to the specific details and representative embodiments shown and described herein. Accordingly, various modifications may be made without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents.