Cardiac rhythm management system with painless defribillation lead impedance measurement

[0002] This invention relates generally to cardiac rhythm management systems and particularly, but not by way of limitation, to a cardiac rhythm management system with a painless shocking lead impedance measurement circuit.

[0003] When functioning properly, the human heart maintains its own intrinsic rhythm, and is capable of pumping adequate blood throughout the body's circulatory system. However, some people have irregular cardiac rhythms, referred to as cardiac arrhythmias. Such arrhythmias result in diminished blood circulation. One mode of treating cardiac arrhythmias is via drug therapy. Drugs are often effective at restoring normal heart rhythms. However, drug therapy is not always effective for treating arrhythmias of certain patients. For such patients, an alternative mode of treatment is needed. One such alternative mode of treatment includes the use of a cardiac rhythm management system. Such systems are often implanted in the patient and deliver therapy to the heart.

[0004] Cardiac rhythm management systems include, among other things, pacemakers, or pacers. Pacers deliver timed sequences of low energy electrical stimuli, called pace pulses, to the heart, such as via a transvenous leadwire having one or more electrodes disposed in the heart. Heart contractions are initiated in response to such pace pulses. By properly timing the delivery of pace pulses, the heart can be induced to contract in proper rhythm, greatly improving its efficiency as a pump. Pacers are often used to treat patients with bradyarrhythmias, that is, hearts that beat too slowly, or irregularly.

[0005] Cardiac rhythm management systems also include cardioverters or defibrillators that are capable of delivering higher energy electrical stimuli to the heart. Defibrillators are often used to treat patients with tachyarrhythmias, that is, hearts that beat too quickly. Such too-fast heart rhythms also cause diminished blood circulation because the heart isn't allowed sufficient time to fill with blood before contracting to expel the blood. Such pumping by the heart is inefficient. A defibrillator is capable of delivering an high energy electrical stimulus that is sometimes referred to as a countershock. The countershock interrupts the tachyarrhythmia, allowing the heart to reestablish a normal rhythm for the efficient pumping of blood. In addition to pacers, cardiac rhythm management systems also include, among other things, pacer/defibrillators that combine the functions of pacers and defibrillators, drug delivery devices, and any other systems or devices for diagnosing or treating cardiac arrhythmias.

[0006] One problem that arises in cardiac rhythm management devices is in determining defibrillation or “shocking” lead impedance. The defibrillation lead impedance includes the effective resistance of the leadwire that couples the cardiac rhythm management device to the heart for delivering the electrical defibrillation countershock at defibrillation electrodes located at or near the heart. The defibrillation lead impedance also includes the effective resistance of the body tissue (e.g., the heart) and body fluids located between the defibrillation electrodes. The defibrillation lead impedance due to the leadwire and heart resistance is generally around 50 Ω, but can range from 15 Ω to 100 Ω.

[0007] The value of the defibrillation lead impedance provides useful information. For example, an extremely low lead impedance value may indicate a short circuit between the defibrillation electrodes. An extremely large lead impedance value may indicate an open circuit such as, for example, resulting from a leadwire that has become disconnected from the cardiac rhythm management device. Both defective leadwire conditions must be detected and remedied if the cardiac rhythm management device is to provide effective defibrillation countershock therapy to the heart.

[0008] It is possible to calculate defibrillation lead impedance, for example, by delivering an electrical defibrillation countershock to the heart. By measuring a voltage droop of the defibrillation countershock voltage pulse, the effective resistance of the defibrillation lead can be estimated. However, delivering a defibrillation countershock is painful to the patient. As a result, such techniques cannot be performed routinely, periodically, or even occasionally, because measuring defibrillation lead impedance because significant patient discomfort would likely result. Moreover, measuring defibrillation lead impedance is particularly difficult because of the high voltages (e.g., 750 Volts) being delivered to the heart during the defibrillation countershock. Typical measurement integrated circuits are not capable of withstanding such high voltages. In summary, there exists a need for a technique of measuring defibrillation lead impedance without inflicting pain on the patient from delivering a defibrillation countershock to measure defibrillation lead impedance.

[0009] The present cardiac rhythm management system provides, among other things, a defibrillation lead impedance measurement system. Instead of measuring defibrillation lead impedance by delivering a high energy or low energy defibrillation countershock and measuring a resulting voltage, defibrillation lead impedance is measured using a test current source that is different from the defibrillation output supply. A voltage resulting from the test current flowing through the defibrillation lead and heart resistance is measured. The defibrillation lead impedance is determined from the measured voltage.

[0010] Because low amplitude test current pulses are used (e.g., 10-20 milliamperes), the defibrillation lead impedance measurement would not cause significant pain or discomfort to the patient. As a result, the defibrillation lead impedance can be measured routinely for diagnostic or other purposes.

[0011] In one embodiment, the test currents are charge-balanced, i.e., a first test current pulse waveform sourced at a particular defibrillation electrode is offset by a substantially equal amount of charge sunk at that defibrillation electrode by a second test current pulse waveform, because the first and second test currents flow in opposite directions. This avoids charge build-up in the heart that may increase the difficulty of sensing intrinsic electrical heart activity signals. It also avoids degeneration of the defibrillation electrodes by electroplating or corrosion.

[0012] One embodiment provides test current pulses of at least two different steady-state amplitude steps. Defibrillation lead impedance is determined differentially by measuring a voltage associated with each test current amplitude step, and dividing a difference of the measured voltage by a corresponding difference in the test current amplitudes. This technique allows cancellation of a component of the measured voltage that is not associated with the desired defibrillation lead impedance measurement.

[0013] Another embodiment provides bidirectional test currents to account for polarity effects on the defibrillation lead impedance measurement. A further embodiment provides a calibration/correction technique in which measurements of known resistances are used to correct a measurement of an unknown defibrillation lead impedance measurement. Other aspects of the invention will be apparent on reading the following detailed description of the invention and viewing the drawings that form a part thereof.

[0014] In the drawings, like numerals describe substantially similar components throughout the several views.

[0015] FIG. 1 is a generalized schematic diagram illustrating one embodiment of a portion of a cardiac rhythm management system.

[0016] FIG. 2 is a generalized schematic/block diagram illustrating a first example of portions of the cardiac rhythm management system for measuring defibrillation lead impedance.

[0017] FIG. 3 is a generalized illustration of signal waveforms for a first example of operating a cardiac rhythm management system for performing a defibrillation lead impedance measurement.

[0018] FIG. 4A is a generalized illustration of signal waveforms for a second example of operating a cardiac rhythm management system for performing a defibrillation lead impedance measurement.

[0019] FIG. 4B is a generalized illustration of signal waveforms for a second example of operating a cardiac rhythm management system for performing a defibrillation lead impedance measurement.

[0020] FIG. 5 is a generalized schematic/block diagram illustrating a second example of portions of the cardiac rhythm management system for measuring lead impedance, the second example including additional diodes protecting switching devices and measurement circuits.

[0021] FIG. 6 is a generalized schematic/block diagram illustrating a third example of portions of the cardiac rhythm management system for measuring lead impedance, the third example including a voltage measurement circuit that is multiplexed to more than one defibrillation electrode.

[0022] FIG. 7 is a generalized schematic/block diagram illustrating a fourth example of portions of the cardiac rhythm management system for measuring lead impedance, the fourth example including a shared multiplexer for multiplexing a current source/sink circuit and a voltage measurement circuit to more than one defibrillation electrode.

[0023] FIG. 8 is a generalized schematic/block diagram illustrating a fifth example of portions of the cardiac rhythm management system for measuring lead impedance, the fifth example including separate multiplexers for multiplexing a current source/sink circuit and a voltage measurement circuit to more than one defibrillation electrode.

[0024] FIG. 9 is a generalized schematic/block diagram illustrating one embodiment of current source/sink circuit and associated circuits.

[0025] FIG. 10 is a generalized schematic diagram illustrating generally one embodiment of a voltage measurement circuit.

[0026] FIG. 11 is a generalized schematic diagram illustrating generally another embodiment of a voltage measurement circuit.

[0027] In the following detailed description, reference is made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration specific embodiments in which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention, and it is to be understood that the embodiments may be combined, or that other embodiments may be utilized and that structural, logical and electrical changes may be made without departing from the spirit and scope of the present invention. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the present invention is defined by the appended claims and their equivalents. In the drawings, like numerals describe substantially similar components throughout the several views.

[0028] The present system provides, among other things, a cardiac rhythm management system that provides a painless technique of measuring defibrillation lead impedances without delivering a painful high voltage defibrillation countershock. As a result, the defibrillation lead impedance measurement can be performed occasionally, periodically, or even routinely because performing the measurement does not cause discomfort to the patient. Moreover, the present technique allows a defibrillation countershock therapy to be dynamically adjusted, based at least partially on the measured values of defibrillation lead impedance. Furthermore, the present system uses test stimuli energies (e.g., amplitude and pulsewidth) that are less than the energy required to “capture” the heart (i.e., less than the “pacing threshold” energy that causes a resulting depolarization and heart contraction), ensuring that the present system is both painless and nondisruptive to the underlying paced or intrinsic heart rhythm.

[0029] In this document, defibrillation lead impedance is understood to refer to resistance, and not to associated reactive components. Also, defibrillation lead impedance is understood to refer only to a lead impedance that is associated with electrodes that deliver a defibrillation countershock to the heart, and not to the lead impedance associated with pacing electrodes that deliver only pacing pulses to the heart.

[0030] FIG. 1 is a generalized schematic diagram illustrating generally, by way of example, but not by way of limitation, one embodiment of a portion of a cardiac rhythm management system 100. Various embodiments of system 100 include external or implantable pacer/defibrillators, cardioverters, defibrillators, any combination of the foregoing, or any other system using or maintaining cardiac rhythms.

[0031] In the embodiment of FIG. 1, cardiac rhythm management system 100 includes a cardiac rhythm management device 105 coupled to heart 110 via one or more endocardial or epicardial leadwires, such a pacing leadwire or a defibrillation leadwire 115. Defibrillation leadwire 115 includes one or more defibrillation electrodes, such as for delivering defibrillation countershock (“shock”) therapy via first defibrillation electrode 120A and/or second defibrillation electrode 120B. Defibrillation leadwire 115 may also include additional electrodes, such as for delivering pacing therapy via first pacing electrode 125A (e.g., a “tip” electrode) and/or second pacing electrode 125B (e.g., a “ring” electrode). Defibrillation electrodes 120A-B and pacing electrodes 125A-B are typically disposed in or near one or more chambers of heart 110.

[0032] In the embodiment of FIG. 1, defibrillation leadwire 115 includes multiple conductors that are insulated from each other for providing independent connections between each electrode and cardiac rhythm management device 105. In one embodiment, the defibrillation leadwire is secured to heart 110, such as by a corkscrew, a barb, or similar mechanism at or near first pacing electrode 125A. In another embodiment, cardiac rhythm management device 105 includes a hermetically sealed casing, a portion of which provides a conductive electrode that operates in conjunction with at least one of the electrodes disposed in heart 110 for delivering pacing pulses and/or defibrillation countershocks and/or sensing electrical heart activity signals.

[0033] FIG. 2 is a generalized schematic/block diagram illustrating generally, by way of example, but not by way of limitation one embodiment of portions of system 100. First defibrillation electrode 120A and second defibrillation electrode 120B are illustrated as being coupled to heart 110. Heart resistance 200 is interposed between first and second defibrillation electrodes 120A-B. System 100 includes a defibrillation output supply 205 which generates a defibrillation countershock energy. The defibrillation countershock energy is stored as a high positive voltage (e.g., approximately between 700 Volts and 750 Volts) on a storage capacitor 210 that is coupled between high voltage node 215 and ground node 220.

[0034] First switch 225 and second switch 230 are, in one example, insulated gate bipolar transistors (IGBTs) or other switching devices that couple the respective first and second defibrillation electrodes 120A-B to ground node 220. In one embodiment, first switch 225 includes a collector coupled to first defibrillation electrode 120A, a gate coupled to receive a control signal S1, such as from controller 235, and an emitter coupled to ground node 220. Second switch 230 includes a collector coupled to second defibrillation electrode 120B, a gate coupled to receive a control signal S2, such as from controller 235, and an emitter coupled to ground node 220.

[0035] Third switch 240 and fourth switch 245 are, in one example, triacs, thyristors, semiconductor-controlled rectifiers (SCRs), four-layer diodes or other switching devices that couple high voltage node 215 to first and second defibrillation electrodes 120A-B, respectively. In one embodiment, control signals S3 and S4 are received from controller 235 to control operation of third switch 240 and fourth switch 245, respectively.

[0036] First diode 250 includes a cathode coupled to first defibrillation electrode 120A and an anode coupled at node 252 to lead impedance stimulation and measurement circuits, such as first current source and/or sink circuit 255 and first voltage measurement circuit 260. Second diode 270 includes a cathode coupled to second defibrillation electrode 120B and an anode coupled at node 272 to lead impedance stimulation and measurement circuits, such as second current source and/or sink circuit 275 and second voltage measurement circuit 280. In one embodiment, first and second current source/sink circuits 255 and 275, respectively, are combined into a single circuit that is coupled (e.g., multiplexed) to each of the anode of first diode 250, at node 252, and the anode of second diode 270, at node 272. In another embodiment, first and second voltage measurement circuits 260 and 280, respectively, are coupled (e.g., multiplexed) to each of the anode of first diode 250 and the anode of second diode 270.

[0037] FIG. 3 is a generalized signal waveform diagram illustrating generally, by way of example, but not by way of limitation, one embodiment of a technique of operating system 100, such as illustrated in part in FIG. 2, for performing a defibrillation lead impedance measurement. At time, t₀, first switch 225, second switch 230, third switch 240, and fourth switch 245 are all turned off, such as by control signals from controller 235.

[0038] At approximately time t₁, second switch 230 is turned on, and first current source/sink circuit 255 is activated to source a test current I₂₅₀of predetermined approximately constant magnitude I^1250A(e.g., approximately between 10 to 20 milliamperes) through first diode 250, first defibrillation electrode 120A, and heart resistance 200. The current I₂₅₀is received by second defibrillation electrode 120B, second switch 230, and returned through ground node 220. At approximately time t₂, first current source/sink circuit 255 and second switch 230 are turned off.

[0039] During the time period between t₁, and t2, a voltage V₂₅₂is generated at node 252 in response to the test current I₂₅₀flowing through an effective series resistance that includes the “on” resistance of first diode 250, the defibrillation leadwire resistance, the first defibrillation electrode 120A resistance, the heart resistance 200, the second defibrillation electrode 120B resistance, and the “on” resistance of second switch 230. In one embodiment, during this time, node 272 is coupled to the ground voltage at node 220 by second current source/sink circuit 275 such that second diode 270 is turned off.

[0040] At some time during the time period between t₁, and t₂, the voltage V₂₅₂stabilizes and is then sampled by voltage measurement circuit 260, obtaining the measured voltage V_252A. A first indication of the defibrillation lead impedance, Z₁, is obtained by dividing the measured voltage V₂₅₂by the known current magnitude I_250A. In this embodiment, Z₁, includes the “on” resistances of first diode 250 and second switch 230, as discussed above.

[0041] At approximately time t₃, first switch 225 is turned on, and second current source/sink circuit 275 is activated to source a test current I₂₇₀of predetermined magnitude I_270Athrough second diode 270, second defibrillation electrode 120B, and heart resistance 200. The current I₂₇₀is received by first defibrillation electrode 120A, first switch 225, and returned through ground node 220. At approximately time t₄, second current source/sink circuit 275 and first switch 225 are turned off.

[0042] During the time period between t₃and t₄, a voltage V₂₇₂is generated at node 272 in response to the test current I₂₇₀flowing through an effective series resistance that includes the “on” resistance of second diode 270, the defibrillation leadwire resistance, the second defibrillation electrode 120B resistance, the heart resistance 200, the first defibrillation electrode 120A resistance, and the “on” resistance of first switch 225. In one embodiment, during this time, node 252 is coupled to the ground voltage at node 220 by first current source/sink circuit 255 such that first diode 250 is turned off.

[0043] According to one aspect of the present technique, the defibrillation lead impedance measurement test currents are approximately “charge-balanced,” such that the charge sourced at first electrode 120A during the time period between t₁and t₂is approximately equal to the charge sunk at first electrode 120A during the time period between t₃and t₄. Similarly, the charge sunk at second electrode 120B during the time period between t₁and t₂is approximately equal to the charge sourced at second electrode 120B during the time period between t₃and t₄. In one embodiment, by way of example, but not by way of limitation, the time period t₄−t₃is approximately equal to the time period t₂−t₁, and the test current magnitude I_270Ais approximately equal to the test current magnitude I_250A. In a further embodiment, by way of example, but not by way of limitation, t₄−t₃≈t₂−t₁≈10 to 100 microseconds (e.g., 32 microseconds), I_270A≈I_250A≈10 to 20 milliamperes, and t₃−t₂≈1.5 milliseconds. However, it is understood that other time periods or test current levels could also be used.

[0044] In a further embodiment, a second defibrillation lead impedance measurement is optionally obtained. In one such example, at some time during the time period between t₃and t₄, the voltage V₂₇₂stabilizes and is then sampled by voltage measurement circuit 280, obtaining the measured voltage V_272A. A second indication of the defibrillation lead impedance, Z₂, is obtained by dividing the measured voltage V_272Aby the known current magnitude I_270A. In this embodiment, Z₂includes the “on” resistances of second diode 270 and first switch 225, as discussed above. In one embodiment, the defibrillation lead impedance is determined by averaging Z₁and Z₂. However, it is understood that system 100 does not require the use of more than one defibrillation lead impedance measurement.

[0045] FIG. 4A is a generalized signal waveform diagram illustrating generally, by way of example, but not by way of limitation, another embodiment of a technique of operating system 100, such as illustrated in FIG. 2, for performing a defibrillation lead impedance measurement. At time, t₀, first switch 225, second switch 230, third switch 240, and fourth switch 245 are all turned off, such as by control signals from controller 235.

[0046] At approximately time t₁, second switch 230 is turned on, and first current source/sink circuit 255 is activated to source a test current I₂₅₀of predetermined magnitude I_250Athrough first diode 250, first defibrillation electrode 120A, and heart resistance 200. The current I₂₅₀is received by second defibrillation electrode 120B, second switch 230, and returned through ground node 220. At approximately time t₂, the test current I₂₅₀sourced by first current source/sink circuit 255 is changed from I_250Ato a second predetermined magnitude, I_250B. At approximately time t₃, second switch 230 is turned off and first current source/sink circuit 255 is deactivated.

[0047] At some time during the time period between t₁and t₂, the voltage V₂₅₂stabilizes and is then sampled by first voltage measurement circuit 260, obtaining first measured voltage V_252A. Similarly, at some time during the time period between t₂and t₃, the voltage V₂₅₂stabilizes and is then sampled by first voltage measurement circuit 260, obtaining second measured voltage V_252B. A differential first indication of the defibrillation lead impedance, Z_1D, is obtained according to Equation 1. In one example, the operations described by Equation 1 are carried out in controller 235 which, in one embodiment, includes a peripheral analog-to-digital (A/D) converter for converting the measured voltage differences into digital values before performing the calculation illustrated by Equation 1. $\begin{array}{cc}{Z}_{1D}=\frac{V_{252A}-V_{252B}}{I_{250A}-I_{250B}}& \left(1\right)\end{array}$

[0048] In Equation 1, first voltage measurement circuit 260 performs a differential voltage measurement using the two sampled voltages V_252Aand V₂₅₂. The difference between these two sampled voltages is digitized by the A/D converter. In one embodiment, the difference I_250A−I_250Bis a known difference between predetermined current magnitudes, such that it need undergo measurement and A/D conversion. Instead, the known digital value corresponding to the difference I_250A−I250Bis stored digitally in device 105, or alternatively in an external programmer, for carrying out the calculation of Equation 1. In another embodiment, the values of I_250Aand I_250Bare measured during manufacture of device 105, and these measured values (or the difference between them) are stored digitally in device 105, or alternatively in an external programmer, for use in the calculation of Equation 1. This provides a more accurate measurement because it accounts for variability in the test current amplitudes between particular ones of devices 105.

[0049] The current magnitudes I_250Aand I_250Bare selected to be sufficiently small as to avoid significant discomfort to the patient (e.g., I_250A≈20 milliamperes and I_250B≈10 milliamperes, or vice-versa). The selected current magnitudes I_250Aand I_250Bare sufficiently large so that the series combination of the “on” resistances of first diode 250 and second switch 230 are suitably small (e.g., 5 Ω total series “on” resistance) compared to the smallest expected actual lead impedance (e.g., 15 Ω) of the leadwire and heart. By using the differential lead impedance measurement of Equation 1, the effect of first diode 250 and second switch 230 is canceled or substantially reduced.

[0050] At approximately time t₄, first switch 225 is turned on, and second current source/sink circuit 275 is activated to source a test current I₂₇₀of predetermined magnitude I₂₇₀A through second diode 270, second defibrillation electrode 120B, and heart resistance 200. The current I₂₇₀is received by second defibrillation electrode 120A, first switch 225, and returned through ground node 220. At approximately time t₅, the test current I₂₇₀sourced by second current source/sink circuit 275 is changed from I_270Ato a second predetermined magnitude I_270B. At approximately time t₆, first switch 225 is turned off and second current source/sink circuit 275 is deactivated.

[0051] According to one aspect of the present technique, the defibrillation lead impedance measurement test currents are approximately “charge-balanced,” such that the charge sourced at first electrode 120A during the time period between t₁and t₃is approximately equal to the charge sunk at first electrode 120A (sourced by electrode 120B) during the time period between t₄and t₆. In one embodiment, by way of example, but not by way of limitation, t₆−t₅≈t₃−t₂, and t₅−t₄≈t₂−t₁, and I_270A≈I_250A, and I_270B≈I_250B. In a further embodiment, by way of example, but not by way of limitation, t₆−t₅≈t₃−t₂≈32 microseconds, and t₅−t₄≈t₂−t₁≈32 microseconds, and I_270A≈I_250A≈20 milliamperes, and I_270B≈I_250B≈10 milliamperes, and t₄−t₃≈1.5 milliseconds. However, it is understood that other time periods or test current levels could also be used.

[0052] In one further embodiment, a second differential defibrillation lead impedance measurement is optionally obtained. At some time during the time period between t₄and t₅, the voltage V₂₇₂stabilizes and is then sampled by second voltage measurement circuit 280, obtaining third measured voltage V_272A. Similarly, at some time during the time period between t₅and t₆, the voltage V₂₇₂stabilizes and is then sampled by second voltage measurement circuit 280, obtaining fourth measured voltage V_252B. A differential second indication of the defibrillation lead impedance, Z_2D, is obtained according to Equation 2. In one example, the operations described by Equation 2 are carried out in controller 235 which, in one embodiment, includes a peripheral analog-to-digital (A/D) converter for converting the measured voltage differences into digital values before performing the calculation illustrated by Equation 2. $\begin{array}{cc}{Z}_{2D}=\frac{V_{272A}-V_{272B}}{I_{270A}-I_{270B}}& \left(2\right)\end{array}$

[0053] In Equation 2, second voltage measurement circuit 280 performs a differential voltage measurement using the two sampled voltages V_272Aand V_272B. The difference between these two sampled voltages is digitized by the A/D converter. In one embodiment, the difference I_270A−I_270Bis a known difference between predetermined current magnitudes, such that it need not undergo measurement and A/D conversion. Instead, the known digital value corresponding to the difference I_250A−I_250Bis stored digitally in device 105, or alternatively in an external programmer, for carrying out the calculation of Equation 2. In another embodiment, the values of I_270Aand ^I_270Bare measured during manufacture of device 105, and these measured values (or the difference between them) are stored digitally in device 105, or alternatively in an external programmer, for use in the calculation of Equation 2. This provides a more accurate measurement because it accounts for variability in the test current amplitudes between particular ones of devices 105.

[0054] The current magnitudes I_270Aand I_270Bare selected to be sufficiently small as to avoid significant discomfort to the patient (e.g., I_270A≈20 milliamperes and I_270B≈10 milliamperes, or vice-versa). The selected current magnitudes I_270Aand I_270Bare sufficiently large so that the “on” resistances of second diode 270 and first switch 225 are suitably small (e.g., 5 Ωtotal series “on” resistance) compared to the smallest expected actual lead impedance (e.g., 15 Ω) of the leadwire and heart. By using the differential defibrillation lead impedance measurement of Equation 2, the effect of second diode 270 and first switch 225 is canceled or substantially reduced. In this embodiment, the defibrillation lead impedance, Z_M, is determined by averaging Z_1Dand Z_2D. This advantageously minimizes effects on the defibrillation lead impedance measurement resulting from the different directions of the test current through R₂₀₀during the two separate defibrillation lead impedance measurements. However, it is understood that system 100 does not require the use of more than one defibrillation lead impedance measurement.

[0055] FIG. 4B is a generalized waveform diagram, similar to FIG. 4A, illustrating a reversal in the relative relationship of the test current amplitudes I_250Aand I_250B, I_270Aand I_270B, and in the amplitude relationship of the resulting measured voltages V_252Aand V_252B, and V_272Aand V_272B. Operation of system 100 as illustrated in FIG. 4B, is analogous to its operation described with respect to FIG. 4A. A first differential impedance measurement is obtained as described in Equation 1, and a second differential impedance measurement is optionally obtained, such as described in Equation 2.

[0056] FIG. 5 is a generalized schematic/block diagram illustrating generally, by way of example, but not by way of limitation another embodiment of portions of system 100. FIG. 5 is similar to FIG. 2 in many respects. FIG. 5 includes, however, a first zener diode 500 including an anode coupled to ground node 220 and a cathode coupled to the anode of first diode 250 at node 252. A second zener diode 505 includes an anode coupled to ground node 220 and a cathode coupled to the anode of second diode 270 at node 272.

[0057] First zener diode 500 protects first current source/sink circuit 255 and first voltage measurement circuit 280 from dangerously large positive and/or negative voltages at node 252, such as during a defibrillation countershock delivered to heart 110 by system 100 or by an external defibrillator. During such a defibrillation countershock delivered by system 100, for example, first zener diode 500 clamps node 252 at a safe voltage (i.e., at approximately the reverse breakdown voltage of first zener diode 500) and ensures that first diode 250 remains off. Moreover, if a sufficiently large negative voltage is present at first defibrillation electrode 120A, such as during a defibrillation countershock delivered by an external defibrillator, for example, first diode 250 and first zener diode 500 each turn on. This clamps the voltage at first defibrillation electrode 120A (i.e., at a negative voltage that is equal to the series “on” voltage of first diode 250 and first zener diode 500), thereby protecting first switch 225 against dangerously large negative voltages. This also clamps the voltage at node 252 (i.e., at a negative voltage that is equal to the “on” voltage of first zener diode 500), thereby protecting first current source/sink 255 and first voltage measurement circuit 260 against dangerously large negative voltages. Second zener diode 505 operates analogously to first zener diode 500, protecting second current source/sink circuit 275 and first voltage measurement circuit 280 from dangerously large positive and/or negative voltages at nodes 272, and protecting second switch 230 from dangerously large negative voltages at second defibrillation electrode 120B.

[0058] FIG. 5 also illustrates third diode 510 and fourth diode 515. Third diode 510 includes an anode that is coupled to third switch 240 and a cathode that is coupled to first defibrillation electrode 120A. Fourth diode 515 includes an anode that is coupled to fourth switch 245 and a cathode that is coupled to second defibrillation electrode 120B. According to one aspect of system 100, third diode 510 in series with third switch 240 provides a greater series voltage handling capability than does third switch 240 alone, i.e., without third diode 510. Similarly, fourth diode 515 in series with fourth switch 245 provides a greater series voltage handling capability than does fourth switch 245 alone, i.e., without fourth diode 515.

[0059] FIG. 5 also illustrates a lead impedance module 520 and a calibration module 525. The lead impedance module 520 and calibration module 525 are included within controller 235, or alternatively located in an external programmer that is not implanted in the patient, but is communicatively coupled to the implanted device 105. In one embodiment, the lead impedance module 520 and calibration module 525 are implemented as a sequence of operative steps carried out on a microprocessor, for respectively performing a differential lead impedance measurement, as discussed above, and a calibration of the measured lead impedance using measured values of known resistances, as discussed below.

[0060] FIG. 6 is a generalized schematic/block diagram illustrating generally, by way of example, but not by way of limitation another embodiment of portions of system 100. FIG. 6 is similar to FIG. 2 in many respects. FIG. 6 includes, however, a single voltage measurement circuit 600, providing the combined functions of first and second voltage measurement circuits 260 and 280, respectively. Nodes 252 and 272 are time-multiplexed by multiplexer 605 to voltage measurement circuit 600 for measuring the voltages at each of nodes 252 and 272, respectively.

[0061] FIG. 7 is a generalized schematic/block diagram illustrating generally, by way of example, but not by way of limitation another embodiment of portions of system 100. FIG. 7 is similar to FIG. 2 in many respects. FIG. 7 includes, however, a single voltage measurement circuit 600, providing the combined functions of first and second voltage measurement circuits 260 and 280, respectively. FIG. 7 also includes a single current source/sink circuit 700, providing the combined functions of first and second current source/sink circuits 255 and 275, respectively. Nodes 252 and 272 are time-multiplexed by multiplexer 705 to current source/sink circuit 700 and voltage measurement circuit 600 for providing a test current to and measuring the voltages at each of nodes 252 and 272, respectively.

[0062] FIG. 8 is a generalized schematic/block diagram illustrating generally, by way of example, but not by way of limitation another embodiment of portions of system 100. FIG. 8 is similar to FIG. 2 in many respects. FIG. 8 includes, however, a single voltage measurement circuit 600, providing the combined functions of first and second voltage measurement circuits 260 and 280, respectively. FIG. 8 also includes a single current source/sink circuit 700, providing the combined functions of first and second current source/sink circuits 255 and 275, respectively. Nodes 252 and 272 are time-multiplexed by multiplexer 605 to voltage measurement circuit 600 for measuring the voltages at each of nodes 252 and 272, respectively. Nodes 252 and 272 are time-multiplexed by multiplexer 805 to current source/sink circuit 700 for providing a test current to each of nodes 252 and 272, respectively.

[0063] FIG. 9 is a generalized schematic/block diagram illustrating generally, by way of example, but not by way of limitation one embodiment of first current source/sink circuit 255, second current source/sink circuit 275, and associated circuits for operating system 100 according to the signal waveforms illustrated in FIGS. 4A-B. An input reference current 900 is provided to diode-connected transistor 905, which produces a current mirror voltage at node 910 that is received by current mirror transistors 915A-D. Switching transistors 920A-D are individually interposed between each of the current mirror transistors 915A-D and the positive power supply V_CCat node 925. Transistor 930 is interposed between diode-connected transistor 905 and the positive power supply V_CCat node 925 such that diode-connected transistor 905 has a resistance at its source terminal that is similar to that at the source terminals of each of the current mirror transistors 915A-D. In this example embodiment, transistors 905, 915A-D, 920A-D, and 930 are all p-channel metal-oxide-semiconductor (PMOS) field-effect transistors (FETs) having lightly-doped drain regions for withstanding high drain voltages (e.g., at least up to the reverse breakdown voltage of zener diodes 500 and 505).

[0064] When system 100 is operated as illustrated in FIG. 4A, switches 920A-D are operated as described below. Before time t₁, switches 920A-D are all off, S₁*=S₂*=S₃*=S₁*=V_CC=(high). At time t₁, switches 920A and 920B are turned on (i.e., S₁*=S₂*=V_SS=(low)), such that current mirror transistors 915A-B together source a test current of amplitude I_250Ato first defibrillation electrode 120A. At time t₂, switch 920A is turned off (i.e., S₁*=high, and S₂*=low), such that current mirror transistor 915B alone sources a test current of amplitude I_250Bto first defibrillation electrode 120A. At time t₃, switch 920B is turned off (i.e., S₁*=S₂*=S₃*=S₁*=high); interrupting the test current to first defibrillation electrode 120A. At time t₄, switches 920C and 920D are turned on (i.e., S₃*=S₄*=low), such that current mirror transistors 915C-D together source a test current of amplitude ,270A to second defibrillation electrode 120B. At time t₅, switch 920C is turned off (i.e., S₃*=high, and S₄*=low), such that current mirror transistor 915D alone sources a test current of amplitude I_270Bto second defibrillation electrode 120B. At time t₆, switch 920D is turned off (i.e., S₁*=S₂*=S₃*=S₁*=high), interrupting the test current to second defibrillation electrode 120B.

[0065] When system 100 is operated as illustrated in FIG. 4B, switches 920A-D are operated as described below. Before time t₁, switches 920A-D are all off, S₁*=S₂*=S₃*=S₁*=V_CC=(high). At time t₁, switch 920A is turned on (i.e., S₁*=low), such that current mirror transistor 915A alone sources a test current of amplitude I_250Ato first defibrillation electrode 120A. At time t₂, switch 920B is turned on (i.e., S₁*=S₂*=low), such that current mirror transistors 915A-B together source a test current of amplitude I_250Bto first defibrillation electrode 120A. At time t₃, switches 920A-B are turned off (i.e., S₁*=S₂*=S₃*=S₁*=high); interrupting the test current to first defibrillation electrode 120A. At time t₄, switch 920C is turned on (i.e., S₃*=low), such that current mirror transistor 915C alone sources a test current of amplitude I_270Ato second defibrillation electrode 120B. At time t₅, switch 920D is turned on (i.e., S₃*=S₄*=low), such that current mirror transistors 915C-D together source a test current of amplitude I_270Bto second defibrillation electrode 120B. At time t₆, switches 920C-D are turned off (i.e., S₁*=S₂*=S₃=S₁*=high), interrupting the test current to second defibrillation electrode 120B.

[0066] FIG. 10 is a generalized schematic diagram illustrating generally, by way of example, but not by way of limitation, one embodiment of a switched-capacitor voltage measurement circuit 260, which operates in conjunction with a current source/sink circuit 255, such as illustrated in FIG. 9, to perform a defibrillation lead impedance measurement.

[0067] The voltage measurement circuit 260 includes a sampling capacitor 1000, having a capacitance value C₄. A first terminal of sampling capacitor 1000 at node 1002 is coupled via a first input switch 1005 and a second input switch 1010 to node 252. A second terminal of sampling capacitor 1000 is coupled to an inverting input node 1015 of operational amplifier 1020 via a multiplexer 605, only a portion of which is illustrated in FIG. 10. The illustrated portion of multiplexer 605 includes a series multiplexer switch 1025 and a shunt multiplexer switch 1030. An autozero switch 1035 is coupled between inverting input node 1015 and output node 1040 of operational amplifier 1020. Integration capacitor 1045, having a capacitance value C₅, includes a first terminal that is coupled to inverting input node 1015. Integration capacitor 1045 includes a second terminal that is coupled to output node 1040 via feedback switch 1050. The second terminal of integration capacitor 1045 is also coupled to ground node V_SSvia grounding switch 1055. A positive input node 1060 of operational amplifier 1020 is coupled to a stable reference voltage, such as 0.5 volts. An offset capacitor 1065 includes a first terminal that is coupled to inverting input node 1015. A second terminal of offset capacitor 1065 is coupled to ground node V_SSvia switch 1070. The second terminal of offset capacitor 1065 is also coupled to a stable reference voltage, such as 1.25 volts, via switch 1075.

[0068] Operation of system 100 according to FIGS. 2, 4A, 9 and 10 is described below. During the time period t₂−t₁(i.e., φ₁), a first voltage measurement is performed. The voltage at node 252 resulting from first test current level I_250Ais sampled onto sampling capacitor 1000. Series multiplexer switch 1025 is on and shunt multiplexer switch 1030 is off. Autozero switch 1035 is on and the input offset voltage of operational amplifier 1020 is stored on feedback capacitor 1045. Offset capacitor 1065 is coupled to the 1.25 volt reference voltage. The voltage at output node 1040 is not valid during this time period.

[0069] During the time period t₃−t₂(i.e., φ₂), a second voltage measurement is performed. The voltage at node 252 resulting from second test current level I_250Bis sampled onto sampling capacitor 1000. Because the shunt multiplexer switch 1030 is off and the series multiplexer switch 1025 is on, the resulting change in charge on sampling capacitor 1000 flows through inverting input node 1015 and is stored on integration capacitor 1045 (autozero switch 1035 is off and feedback switch 1050 is on). Because sampling capacitor 1000 already included a stored charge resulting from the first voltage measurement, the voltage at output node 1040 represents the difference between the first and second voltage measurements. Because offset capacitor 1065 is switched from 1.25 volts to ground voltage V_SS, at time t₂, a constant positive dc offset voltage is also introduced at output node 1040 of operational amplifier 1020. The introduced positive offset voltage at output node 1040 keeps operational amplifier 1020 within its dynamic operating range.

[0070] In one embodiment, a separate second voltage measurement circuit 280, similar to the circuit illustrated in FIG. 10, is used to perform a differential voltage measurement of the voltage at node 272 during time periods t₅−t₄(i.e., φ₁) and t₆−t₅(i.e., φ₂), as illustrated in FIG. 4A. In another embodiment, a combined voltage measurement circuit 600 is used to perform differential voltage measurements of each of nodes 252 and 272, as illustrated in FIG. 11.

[0071] FIG. 11 is a generalized schematic diagram illustrating generally, by way of example, but not by way of limitation, one embodiment of a switched-capacitor voltage measurement circuit 600, similar to the circuit illustrated in FIG. 10, but time multiplexed by multiplexer 605 to each of nodes 252 and 272 for performing first and second voltage measurements at node 272 and third and fourth voltage measurements at node 272. Operational amplifier 1020, integration capacitor 1045, and offset capacitor 1065 and associated circuits are shared for both voltage measurements.

[0072] For measuring the voltage at node 272, a separate sampling capacitor 1100 is provided, having a capacitance value C₆. A first terminal of sampling capacitor 1100 at node 1102 is coupled via a first input switch 1105 and a second input switch 1110 to node 272. A second terminal of sampling capacitor 1100 is coupled to an inverting input node 1015 of operational amplifier 1020 via multiplexer 605, which includes a series multiplexer switch 1125 and a shunt multiplexer switch 1130.

[0073] Voltage measurement circuit 600 operates similarly to voltage measurement circuit 260, described with respect to FIG. 10. However, voltage measurement circuit 600 performs a lead impedance measurement at node 272, in addition to the lead impedance measurement performed at node 252.

[0074] Operation of system 100 according to FIGS. 2, 4A, 9 and 11 is described below. During the time period t₂−t₁(i.e., φ₁) a first voltage measurement is performed at node 252, as described with respect to FIG. 10. During the time period t₃−t₂(i.e., φ₂), a second voltage measurement is performed at node 252, as described with respect to FIG. 10.

[0075] During the time period t₅−t₄(i.e., φ₃), a third voltage measurement is performed, at node 272, resulting from third test current level I_270A. The voltage at node 272 is sampled onto sampling capacitor 1100. Series multiplexer switch 1125 is on and shunt multiplexer switch 1130 is off. Autozero switch 1035 is on and the input offset voltage of operational amplifier 1020 is stored on feedback capacitor 1045. Offset capacitor 1065 is coupled to the 1.25 volt reference voltage. The voltage at output node 1040 is not valid during this time period.

[0076] During the time period t₆−t₅(i.e., φ₄), a fourth voltage measurement is performed. The voltage at node 272, resulting from fourth test current level I_270B, is sampled onto sampling capacitor 1100. Because the shunt multiplexer switch 1130 is off and the series multiplexer switch 1125 is on, the resulting change in charge on sampling capacitor 1100 flows through inverting input node 1015 and is stored on integration capacitor 1045 (autozero switch 1035 is off and feedback switch 1050 is on). Because sampling capacitor 1100 already included a stored charge resulting from the third voltage measurement, the voltage at output node 1040 represents the difference between the third and fourth voltage measurements.

[0077] In one embodiment, the lead impedance measurement circuitry in device 105 is calibrated during manufacturing to improve the precision of the measurement of defibrillator lead impedance. According to one such calibration technique, two different calibration resistances of known values (e.g., R₁=30 Ω and R₂=80 Ω) are measured as Z_1Mand Z_2M, respectively, using one of the above-described defibrillation lead impedance measurement circuits and methods. Controller 235 performs a calibration/correction according to Equation 3 to obtain a corrected measured value, Z_CM, of an unknown defibrillation lead impedance from its measured value, Z_M, the measured values of the known resistances, Z_1Mand Z_2M, and the known values of the calibration resistances, R₁and R₂. $\begin{array}{cc}{Z}_{CM}=R_1+\frac{Z_{2M}-Z_{1M}}{R_2-R_1}\left(Z_M-Z_{1M}\right)& \left(3\right)\end{array}$

[0078] Equation 3 represents one form of performing a point-slope calibration. There are many other possible techniques of performing point-slope calibrations, and such other particular implementations are included within the scope of the present system. In one embodiment, for example, the calibration is performed using the measured voltage differences in Equations 1 and 2 without undergoing the computational step of converting the measured voltage differences into corresponding impedances. Furthermore, it is understood that calibration/correction is performed either in the implanted device 105, or is alternatively performed in an external programmer operating on data that is communicatively coupled from the implanted device 105 to the external programmer.

[0079] The above-described cardiac rhythm management system provides, among other things, a defibrillation lead impedance measurement system. Instead of measuring defibrillation lead impedance by delivering a high energy or low energy defibrillation countershock and measuring a resulting voltage, defibrillation lead impedance is measured using a test current source that is different from the defibrillation output supply. A voltage resulting from the test current flowing through the defibrillation lead and heart resistance is measured. The defibrillation lead impedance is determined from the measured voltage.

[0080] Because low amplitude test current pulses are used (e.g., 10-20 milliamperes), the defibrillation lead impedance measurement does not cause significant pain or discomfort to the patient, nor will it result in capture of the heart and resulting cardiac depolarizations. As a result, the defibrillation lead impedance can be measured routinely for diagnostic or other purposes.

[0081] In one embodiment, the test currents are charge-balanced, i.e., a first test current pulse waveform sourced at a particular defibrillation electrode is offset by a substantially equal amount of charge sunk at that defibrillation electrode by a second test current pulse waveform, because the first and second test currents flow in opposite directions. This avoids charge build-up in the heart that may increase the difficulty of sensing intrinsic electrical heart activity signals. It also avoids degeneration of the defibrillation electrodes by electroplating or corrosion.

[0082] One embodiment provides test current pulses of at least two different steady-state amplitude steps. Defibrillation lead impedance is determined differentially by measuring a voltage associated with each test current amplitude step, and dividing a difference of the measured voltage by a corresponding difference in the test current amplitudes. This technique allows cancellation of a component of the measured voltage that is not associated with the desired defibrillation lead measurement. Another embodiment provides bidirectional test currents to account for polarity effects on the defibrillation lead impedance measurement. A further embodiment provides a calibration/correction technique in which measurements of known resistances are used to correct a measurement of an unknown defibrillation lead impedance measurement.

[0083] It is to be understood that the above description is intended to be illustrative, and not restrictive. Many other embodiments will be apparent to those of skill in the art upon reviewing the above description. The scope of the invention should, therefore, be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled.