Methods and apparatus of N-chip resistant spreading in CDMA systems

[0002] The invention relates generally to the field of wireless communication systems and more particularly, to systems and methods of creating spreading codes in a CDMA system which are substantially orthogonal in a quasi-synchronous situation and thus resistant to misalignment caused by multi-path delays and/or time jitter of the system and/or misalignment of signals received from different users.

[0003] For severely multipath dispersive environments, the downlink capacity of cellular Code Division Multiple Access (CDMA) systems, such as IS95, is limited by intra-cell interference. Downlink signals in a cell are orthogonal or substantially orthogonal at the transmitter (hereinafter the term orthogonal or substantially orthogonal includes the terms orthogonal and/or substantially orthogonal), but tend to suffer a loss of orthogonality due to multi-path propagation, time jitter (imprecise implementation errors), etc. The uplink capacity of CDMA systems, such as IS95, is also limited because the uplink signals are not orthogonal. However, orthogonal signals may be used for the uplink if different user symbols are received with timing alignment.

[0004] For nondispersive channels, time alignment of the signals results in orthogonality and rejection of the intra-cell interference. In reality, however, wireless channels are dispersive and propagation along multiple paths causes time misalignment in which case multi-path components will interfere with other multi-path components having a different delay. In this case it is generally only possible to align a single component from each signal. Therefore, orthogonality is partially lost due to the interference between non-aligned terms.

[0005] Accordingly there exists a need for a system and method of spreading which is resistant to misalignment (delay) caused by multi-path delays.

[0006] There also exists a need for a system and method of spreading which is resistant to interference caused by time jitter of the system.

[0007] A need also exists for a system and method of spreading which is resistant to interference caused by misalignment of the signals received from different users.

[0008] Accordingly it is an object of the present invention to provide systems and methods of spreading in CDMA systems which are resistant to effects of misalignment caused by multi-path propagation delays.

[0009] It is another object of the present invention to provide systems and methods of generating spreading codes which are resistant to effects of time jitter of the system.

[0010] It is a further object of the present invention to provide systems and methods of generating spreading codes which are resistant to effects of misalignment of signals from different users.

[0011] It is still another object of the invention to provide such codes which do not affect the data rate of the system.

[0012] These and other objects of the invention will become apparent to those skilled in the art from the following description thereof.

[0013] In accordance with the teachings of the present invention, these and other objects may be accomplished by the present systems and methods of generating spreading codes which are resistant to misalignment caused by multi-path delays and/or time jitter of the system and/or misalignment of signals received from different users in CDMA systems. An embodiment of the present invention includes an apparatus for generating spreading codes including means for generating a substantially orthogonal code, and means for inserting at least one zero into a code generated by the substantially orthogonal code generating means.

[0014] In an exemplary embodiment of the invention, the system includes an apparatus for generating spreading codes including means for generating a substantially orthogonal code, means for generating a pseudonoise (PN) code, means for combining a PN code generated by the PN code generating means with a code generated by the substantially orthogonal code generating means and means for inserting zeros into a code generated by the combining means.

[0015] In another embodiment of the invention, the system includes an apparatus for generating spreading codes including a pseudonoise (PN) code generator and a logic controlled multiplexor logically connected to the PN code generator. The multiplexor may be configured to alter a PN code generated by the PN code generator by replacing at least a portion of the PN code with at least one zero. The embodiment further includes a Walsh code generator and a multiplier logically connected to the Walsh code generator and to the PN code generator and configured to combine a Walsh code generated by the Walsh code generator with the altered PN code.

[0016] In an embodiment of the invention, the system includes an apparatus for generating spreading codes including a pseudonoise (PN) code generator and a logic controlled multiplier logically connected to the PN code generator and configured to alter a PN code generated by the PN code generator by multiplying at least a portion of the PN code by zero. The apparatus further includes a Walsh code generator; a multiplier connected to both the Walsh code generator and to the PN code generator and configured to combine a Walsh code generated by the Walsh code generator with the altered PN code.

[0017] In another embodiment of the invention the system includes an apparatus for generating spreading codes including a pseudonoise (PN) code generator, a microprocessor connected to the PN code generator and configured to alter a PN code generated by the PN code generator. The system further includes a Walsh code generator, a multiplier connected to both the Walsh code generator and to the PN code generator and configured to combine a Walsh code generated by the Walsh code generator with the altered PN code.

[0018] In another embodiment of the invention the system includes a method of generating spreading codes by generating a substantially orthogonal code made up of chips and generating a new substantially orthogonal code by inserting at least one zero into the substantially orthogonal code.

[0019] In yet another embodiment of the invention the system includes a method of generating time delay resistant spreading codes by generating a pseudonoise (PN) code including multiple chips, generating a new PN code from the PN code by replacing at least one of the chips by a zero, such that the new PN code includes at least one zero chip and at least one non-zero chip. The method further includes generating a substantially orthogonal code including multiple chips and combining the new PN code with the substantially orthogonal code by multiplying the non-zero PN code chips by the substantially orthogonal code chips on a chip by chip basis.

[0020] The invention will next be described in connection with certain exemplary embodiments; however, it should be clear to those skilled in the art that various modifications, additions and subtractions can be made without departing from the spirit or scope of the claims.

[0021] The invention will be more clearly understood by reference to the following detailed description of an exemplary embodiment in conjunction with the accompanying drawings, in which:

[0022] FIG. 1 depicts codes used in conventional CDMA systems for the forward link.

[0023] FIG. 2 depicts the codes of FIG. 1 showing a time delay inserted by the system into the second users signal.

[0024] FIG. 3 depicts a block diagram of the preferred embodiment of a system for generating spreading codes which are resistant to the effects of time delays caused by CDMA systems in accordance with the invention;

[0025] FIG. 4 depicts a block diagram of an alternate embodiment of the present invention, illustrating zeros being added to the orthogonal code;

[0026] FIG. 5 depicts a block diagram of the embodiment of FIG. 4, illustrating a different possible code being generated by the same apparatus;

[0027] FIG. 6 depicts a block diagram of an alternate embodiment of the present invention illustrating zeros being added to the PN code;

[0028] FIG. 7 depicts a block diagram of an alternate embodiment of the present invention, illustrating an orthogonal code being combined with a PN code prior to inserting zeros;

[0029] FIG. 8 depicts a block diagram of an alternate embodiment of the present invention illustrating the use of a multiplier to add zeros to an orthogonal code;

[0030] FIG. 9 depicts a block diagram of an alternate embodiment of the present invention illustrating the use of a multiplier to add zeros to a code;

[0031] FIG. 10 depicts a block diagram of the embodiment of FIG. 9 illustrating a different possible code being generated by the same apparatus;

[0032] FIG. 11 depicts time delay resistant codes in accordance with the invention illustrated for two users.

[0033] FIG. 12 depicts more time delay resistant codes in accordance with the invention illustrated for two users.

[0034] FIG. 13 depicts additional time delay resistant codes in accordance with the invention illustrated for two users.

[0035] FIG. 14 depicts still more time delay resistant codes in accordance with the invention illustrated for two users.

[0036] FIG. 15 depicts more time delay resistant codes in accordance with the invention illustrated for two users.

[0037] FIG. 16 depicts additional time delay resistant codes in accordance with the invention illustrated for two users.

[0038] FIG. 17 depicts time delay resistant codes in accordance with the invention illustrated for two users.

[0039] FIG. 18 depicts still more time delay resistant codes in accordance with the invention illustrated for two users.

[0040] FIG. 19 depicts possible codes resulting from the invention of FIG. 3 illustrated for two users, further illustrating the results of a possible delay inserted by the CDMA system.

[0041] In CDMA systems, each cell generally employs the same PN code for all of the users in that cell. In orthogonal CDMA systems, each cell also employs a limited number of orthogonal codes or quasi-orthogonal codes such as Walsh, Gold or some other substantially orthogonal code which it distributes to the different users. (Reference herein to orthogonal, quasi-orthogonal or substantially orthogonal codes should be understood to include any or all of these codes). The PN code is generally combined with the orthogonal code to form a spreading code which suppresses inter-cell interference; however, it is also possible to design a system which does not employ PN codes.

[0042] Communications by different users may experience different time delays due to time jitter (imprecise implementation of time alignment algorithms), propagation delay and/or multi-path dispersion, which will cause mutual interference. For ease of explanation, the present invention is being described with reference to signals originating from two different users, however, the present invention also applies to signals from a single user transmitted over various paths. N-chip resistant spreading increases the robustness of the system against such time delays. One way the present system achieves N-chip resistance is by providing to different users, spreading sequences which have a zero cross-correlation or small cross-correlation when they are aligned and zero or small cross-correlation values when they are off by one or more chips. An example of this would be a conventional orthogonal spreading code such as a Walsh code with one or more zeros inserted therein (not shown). The placement of the zero(s) will be discussed herein with reference to systems which include PN codes. The allowable placement is the same for both types of systems. For single path channels this spreading scheme could be used by a single user as a means of delay diversity to combat the effects of fading in the path. For example, a user could transmit data over a channel using one spreading code then retransmit the same data over the same channel using a different spreading code. If the zeros in one code align with the non-zero chips of the other code, then (i) the two codes will cross correlate to zero, and (ii) the likelihood that at least one of the codes is received correctly is increased.

[0043] FIG. 1 illustrates the signals for two users at points (1) or (2) in FIG. 3, in a CDMA system employing conventional spreading codes. Assuming (i) that the combined transmitter and receiver filter is an ideal Nyquist filter; (ii) perfect clock and carrier recovery; and (iii) the samples are taken at ideal sampling points, FIG. 1 also illustrates the signals at the receiver before despreading. Each orthogonal code W is made up of chips represented by W_x,ywhere x represents the user and y represents the chip number. FIG. 1 also illustrates both users employing the identical PN code P. Each PN code P is also made up of chips P_zwherein z represents the chip number. There is no need for a double subscript for P since both users are using the same PN code. In the example illustrated in FIG. 1, the channel is nondispersive and the equipment employed does not experience any jitter. Thus, since the PN code chips transmitted during each time period are identical and the W_x,ychips for those time periods are orthogonal, the chips from user 2 have a zero cross-correlation with the chips from user 1 (i.e. they do not interfere with each other).

[0044] FIG. 2 illustrates a more realistic model showing the results of a dispersive channel. FIG. 2 shows the same two users illustrated in FIG. 1, but in FIG. 2, user 2 experiences a one chip delay (i.e due to equipment jitter, multi-path delay, etc.). It will be apparent to one skilled in the art that this relative delay could be greater or less than the delay shown. Because of this delay, the PN code chips at a particular time are no longer identical and therefore the W_x,yP_zchips are no longer orthogonal. As such, the two signals will interfere with each other.

[0045] The spreading codes generated by the present invention, as illustrated in FIGS. 11-19, are less sensitive to delays, and in some instances are unaffected by delays. Those skilled in the art will recognize that the present invention may add zeros to the code instead of replacing chips or it may add some zeros and replace some chips with zeros.

[0046] FIG. 11 shows different possible spreading codes in accordance with the present invention. In the first code 10 every odd numbered PN code chip is replaced with a zero. When the altered PN code is combined with the orthogonal code W, the orthogonal code chips W_x,yare only combined with the non-zero PN code chips. As seen from the illustration of FIG. 19, if neither user experiences a delay, or if they both experience the same delay, the PN code chips match up during each time period, the W_x,ychips remain orthogonal and the two signals cross correlate to zero (i.e do not interfere). If, using the spreading code 10, (i) user 1 experiences a delay of one chip or an odd number of chips relative to user 2, or (ii) a signal from user 1 transmitted over one path experiences a 1 chip or odd number of chips delay relative to a signal transmitted over a second path, the chips from each signal will still cross correlate to zero since each of the non-zero chips will align with a zero. Thus, this code is resistant to odd numbered chip misalignments caused by delays. As seen from the progression from code 10 to code 20 etc. of FIG. 11, the number of zeros that can be added is only limited by the number of total chips in the PN code. In other words, the progression of FIG. 11 shows that the spreading code may include as few as 1 zero between each non-zero chip and as many as all zeros between only two non-zero chips. It will be apparent to one skilled in the art that the more zeros that are added, the more resistant the code is to delays, however the number of users that can simultaneously use the cell is reduced.

[0047] FIG. 12 is similar to FIG. 11, with the exception that replacement of chips with zeros begins with the first chip of the spreading code. In the codes illustrated in FIG. 11, the replacement of chips begins with the second chip of the code. The overall performance of the codes 30, 40 etc. illustrated in FIG. 12, however, should be very similar to the overall performance of the codes 10, 20 etc. in FIG. 11.

[0048] FIGS. 13-15 illustrate that one or more consecutive zeros may be substituted between groupings of consecutive non-zero chips. These codes 50, 60, 70, 80, 90, 100, 110, 120 have different levels of resistance to different delays than the codes illustrated in FIGS. 11 and 12, and in some instances are less resistant to delays than the codes illustrated in FIGS. 11 and 12. While codes 10, 60 and 90 allow for the same number of simultaneous users of the cell they are resistant to different time delays (i.e code 10 cross correlates to zero at no delay, one chip delay and odd number of chip delays while code 60 cross correlates to zero at no delay, 2 chip delay and even numbered chip delays, etc.). The remainder of these codes have the advantage over the codes of FIGS. 11 and 12 of allowing more simultaneous users of the cell while still outperforming conventional codes. Certain of these codes are not as resistant as those illustrated in FIGS. 11 and 12 because unless the number of consecutive zeros is the same as the number of consecutive non-zero chips and the chip delay is essentially the same as that number or a multiple thereof, not all of the chips will cross correlate to zero. If however, the delay is the same as (or certain multiples thereof) the number of consecutive zeros and consecutive non-zero chips, the cross-correlation is zero and there will be no interference.

[0049] FIG. 13 illustrates that groupings of two consecutive non-zero chips may be separated by as few as one zero chip 50, to a maximum number of zeros where only the first two and the last two consecutive chips are non-zero. FIG. 14 illustrates that groupings of three consecutive non-zero chips may be separated by as few as one zero chip 70, to a maximum number of zeros where only the first three and the last three consecutive chips are non-zero. FIG. 15 illustrates that the number of consecutive non-zero chips may be anywhere from 2 as seen from FIG. 13 to a maximum where only one or two zeros are substituted into the code.

[0050] FIGS. 16-18 illustrate similar codes to those of FIGS. 13-15 with the exception that in FIGS. 16-18, the replacement of chips by zeros begins with the first chip of the spreading code. In FIGS. 13-15, the replacement of chips with a zero begins with the second chip. These codes 130, 140, 150, 160, 170, 180, 190, 200, 210, are also resistant to different delays from the codes illustrated in FIGS. 11 and 12 for the same reasons as those of FIGS. 13-15, and these codes have the same advantage as those in FIGS. 13-15 over the codes of FIGS. 11 and 12 of allowing more simultaneous users of the cell. The effect of replacing the first chip with a zero is that the minimum number of zeros which may be substituted into the code is two, one at each end, and the maximum number would be two less than the total number of chips in the code.

[0051] FIG. 3 illustrates an apparatus for generating spreading codes in accordance with the present invention. The apparatus shown is a reverse link transmitter, but the invention is also applicable to a forward link transmitter. As illustrated in FIG. 3, the system includes long code generator 360 coupled to decimator 370. Decimator 370 is coupled to a multiplier 380 for combining the decimated long code generated by long code generator 360 and decimator 370. The resultant signal is then split by splitter 330 into its in-phase portion (I) and its quadriture phase portion (Q). Both outputs (I and Q) from data splitter 330 are combined with a Walsh code from Walsh code generator 320 by multipliers 380. While a Walsh code generator 320 is disclosed, any other suitable orthogonal code generator could be employed without departing from the scope of the present invention. Further, while multipliers are disclosed, exclusive OR's could also be employed. The system also includes a PN code generator 300. PN code generator 300 is coupled to a microprocessor 310 which is configured to replace certain chip(s) from the PN code generated by PN code generator 300 with a zero or pad the PN code with zero(s). It will be apparent to one skilled in the art that one or more of the generators of FIG. 3 could be the same or different microprocessors 310 and that the microprocessor 310 could be some other device such as an application-specific integrated circuit (ASIC), programmable gated logic array (PGLA), or another suitable logic device. The system further includes complex spreader 340 which could also be the microprocessor 310 or another microprocessor 310 or a multiplexor or the like. Complex spreader 340 combines the I and Q signals from the multipliers 380 with the PN code by combining the non-zero chips of the PN code with the chips of the Walsh code. The resulting signals are then filtered by baseband filters 350 and modulated onto the channel.

[0052] FIGS. 4-10 illustrate different embodiments of the present invention which are capable of producing spreading codes in accordance with the present invention. FIG. 4 illustrates an embodiment including an orthogonal code generator 320, and a logic controlled multiplexor 390 which inserts zeros into the orthogonal code. This embodiment further includes a PN code generator 300 which generates code at the same rate as the output of the multiplexor 390 (as illustrated in FIG. 5) or at a fraction of that rate as illustrated in FIG. 4. Although FIG. 4 illustrates the PN code generator 300 operating at half the speed of the multiplexor output, different fractions are also within the scope of the invention.

[0053] FIG. 6 illustrates a similar embodiment to that in FIGS. 4 and 5, with the exception that the position of the PN code generator 320 and the orthogonal code generator 320 are reversed.

[0054] FIG. 7 illustrates that the PN code and the orthogonal code may be combined before zeros are added to the code. In FIG. 7, the PN code generator 300 and the orthogonal code generator 320 are connected to a multiplier 380 whose output in input to the multiplexor 390. The multiplexor 390 then adds zeros into the combined code.

[0055] FIGS. 8-10 illustrate the multiplexor 390 of FIGS. 4-6 may be replaced by a multiplier to achieve similar results. While not illustrated, one skilled in the art will also recognize that the multiplexor 390 in FIG. 7 could also be replaced by a logic controlled multiplier to achieve similar results.

[0056] It will thus be seen that the invention efficiently attains the objects set forth above, among those made apparent from the preceding description. In particular, the invention provides apparatus and methods of generating spreading codes which are resistant to the effects of time delays encountered in CDMA systems. Those skilled in the art will appreciate that the configurations depicted in FIGS. 3-19 reduce the effects of time lag.

[0057] It will be understood that changes may be made in the above construction and in the foregoing sequences of operation without departing from the scope of the invention. It is accordingly intended that all matter contained in the above description or shown in the accompanying drawings be interpreted as illustrative rather than in a limiting sense.

[0058] It is also to be understood that the following claims are intended to cover all of the generic and specific features of the invention as described herein, and all statements of the scope of the invention which, as a matter of language, might be said to fall therebetween.