Air gap semiconductor structure and method of manufacture

[0002] This application claims the priority benefit of Taiwan application serial no. 89127061, filed Dec. 18, 2000.

[0003] 1. Field of Invention

[0004] The present invention relates to a metal-oxide-semiconductor structure and corresponding method of manufacture. More particularly, the present invention relates to an air gap semiconductor structure and corresponding method of manufacture.

[0005] 2. Description of Related Art

[0006] Following the rapid reduction of semiconductor line width, the accompanied increase in resistor-capacitor (RC) time delay has greatly reduced the operating speed of integrated circuits. To reduce RC time delay, methods that can lower resistance is frequently adopted. The most common trend now is to replace conventional aluminum wires by copper wires.

[0007] A second way of reducing RC time delay is to reduce capacitance between conductive wires in a multi-layer design. Conventional silicon dioxide is no longer versatile enough for this purpose because silicon dioxide has a relatively high dielectric constant. In general, low dielectric constant organic or inorganic material is used to form inter-metal dielectric layers. However, a medium having the lowest dielectric constant is air (a dielectric constant of 1). Therefore, air is an ideal dielectric medium for lowering the capacitance of a capacitor.

[0008] Although air is the best dielectric material for lowering capacitance, overall mechanical strength of the device is reduced correspondingly. A weakened structure can have serious effects in various aspects of subsequent integrated circuit fabrication.

[0009] FIG. 1 is a schematic cross-sectional view showing a conventional semiconductor device that uses air as a dielectric medium. As shown in FIG. 1, the structure includes a metallic line 102 over a substrate 100. A silicon dioxide layer 104 is attached to the upper surface of the metallic line 102, thereby forming air pockets 106 and 108 that also serve as a dielectric layer.

[0010] In the aforementioned implementation, the metallic lines 102 are usually separated from each other by a distance. Air pockets such as 108 may destabilize the semiconductor structure leading to ultimate deformation. Moreover, the air pockets 106 and 108 are normally distributed all over the substrate 100. Although capacitors have low capacitance when air is used as a dielectric medium layer, the poor heat conductivity of air often results in a rapid rise in temperature during operation.

[0011] Accordingly, one object of the present invention is to provide an air gap semiconductor structure and corresponding method of manufacture. The method includes providing a substrate having metallic lines thereon. A high molecular weight sacrificial film is formed over the substrate. A portion of the high molecular weight sacrificial layer is removed to form spacers. A dielectric layer is formed over the substrate, the top surface of the metallic lines and the spacers. Finally, a thermal dissociation operation is conducted to remove the spacers, thereby forming an air pocket on each sidewall of the metallic lines.

[0012] In this invention, the air gaps in this invention only form on the sidewall of the metallic lines. Conventional dielectric material fills the other portions of the substrate. With this arrangement, resistor-capacitor delay is reduced and operating speed of the integrated circuit is increased. Yet, the substrate has sufficient mechanical strength to support other structures.

[0013] In addition, because only spacer-like air gaps are formed on the sidewalls of the metallic lines, heat generated by the device can easily be conducted away to the surroundings. Hence, heat dissipation problem is minimized.

[0014] It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.

[0015] The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention. In the drawings,

[0016] FIG. 1 is a schematic cross-sectional view showing a conventional semiconductor device that uses air as a dielectric medium; and

[0017] FIGS. 2 through 5 are schematic cross-sectional views showing the progression of steps for producing an air gap semiconductor device according to one preferred embodiment of this invention.

[0018] Reference will now be made in detail to the present preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts.

[0019] FIGS. 2 through 5 are schematic cross-sectional views showing the progression of steps for producing an air gap semiconductor device according to one preferred embodiment of this invention. As shown in FIG. 2, a substrate 200 having a plurality of metallic lines 202 thereon is provided. A high molecular weight sacrificial layer 204 is formed over the metallic lines 202 and the substrate 200. The high molecular weight sacrificial layer 204 has a low dissociation temperature of between 300° C. to 400° C. The sacrificial layer 204 can be polynorbornene formed, for example, by spinning. The substrate 200 can be a semiconductor substrate that includes a plurality of metallic line layers.

[0020] As shown in FIG. 3, a portion of the high molecular weight sacrificial layer 204 is removed by back etching to form high molecular weight spacers 204aon the sidewalls of the metallic lines 202.

[0021] As shown in FIG. 4, a dielectric layer 206 is formed over the substrate 200, the metallic lines 202 and the high molecular weight spacers 204a. The dielectric layer 206 can be a silicon dioxide layer formed, for example, by plasma-enhanced chemical vapor deposition (PECVD) or spin-on-glass (SOG) method.

[0022] As shown in FIG. 5, the substrate 200 is put inside a furnace and baked so that the high molecular weight spacers 204adissociate to form small molecular weight side products (not shown). The side products diffuse into the dielectric layer 206, thereby forming air pockets 208 in the original high molecular spacers 204alocations. A temperature of around 400° C. to 450° C. is used in the furnace to dissociate the high molecular weight sacrificial layer.

[0023] In conclusion, the advantages of the invention includes:

[0024] 1. The air gaps in this invention only form on the sidewall of the metallic lines. Conventional dielectric material fills the other portions of the substrate. With this arrangement, resistor-capacitor delay is reduced and operating speed of the integrated circuit is increased. Yet, the substrate has sufficient mechanical strength to support other structures.

[0025] 2. Since only small spacer-like air gaps are formed on the sidewalls of the metal lines, heat generated by the device can easily be conducted away to the surroundings. Hence, the heat dissipation problem is minimized.

[0026] It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.