Thin film transistor and method for fabricating the same

[0002] 1. Field of the Invention

[0003] The present invention relates to a semiconductor device, and more particularly, to a thin film transistor and a method for fabricating the same, in which a channel width of the thin film transistor is made greater in a narrow area for improving an on/off performance of the thin film transistor.

[0004] 2. Background of the Related Art

[0005] In general, the thin film transistor is used in place of a CMOS load transistor or a load resistor in an SRAM of 4M or 16M class or over, and also as a switching device for switching a video data signal from each pixel region in a liquid crystal display. Especially, as a PMOS thin film transistor(TFT) is used as a load transistor in the SRAM cell, an off-current in the load transistor can be reduced and an on-current in the load transistor can be increased, to reduce a power consumption in the SRAM cell and to improve a memory characteristic, allowing to obtain a high quality SRAM cell.

[0006] A background art thin film transistor and a method for fabricating the same will be explained with reference to the attached drawings. FIG. 1 illustrates a section of the background art thin film transistor.

[0007] Referring to FIG. 1, the background art thin film transistor is provided with an insulating layer 21, a gate electrode 22aon the insulating layer 21, a gate insulating film 24 formed on the insulating layer 21 inclusive of the gate electrode 22a, a drain electrode D formed on the gate insulating film 24 spaced apart from the gate electrode 22a, a source electrode S formed on the gate insulating film 24 opposite to the drain electrode D overlapped with the gate electrode 22a, and a channel region I and an offset region II formed on the gate insulating film 24 between the source electrode S and the drain electrode D. The offset region II is a region between the drain electrode D and the gate electrode 22a.

[0008] A background art method for fabricating a thin film transistor will be explained. FIGS. 2A˜2D illustrates sections showing the process steps of the background art method for fabricating a thin film transistor.

[0009] Referring to FIG. 2A, a first polysilicon layer 22 to be used as a gate electrode of a bulk transistor is formed on an insulating layer 21. Photoresist is coated on the first polysilicon layer 22 and exposed and developed to form a mask pattern 23. The first polysilicon layer 22 is selectively etched using the mask pattern 23, to form a gate electrode 22aas shown in FIG. 2B. Then, as shown in FIG. 2C, a gate insulating film 24 is deposited on the insulating layer 21 inclusive of the gate electrode 22a. A second polysilicon layer 25 to be used as source and drain electrodes, an offset region and a channel region is formed on the gate insulating film 24. A photoresist 26 is coated on the second polysilicon layer 25 and patterned by exposure and development. As shown in FIG. 2D, the patterned photoresist 26adefines the channel region and the offset region. Then, impurity ions are injected into the exposed second polysilicon layer 25 using the patterned photoresist 26aas a mask, to form source/drain. Accordingly, the source electrode S is formed overlapped with a portion of the gate electrode 22a, and the drain electrode D is formed spaced from the gate electrode 22a. And, the channel region I and the offset region II are formed between the source electrode S and the drain electrode D.

[0010] However, the background art thin film transistor and the method for fabricating the same has a problem in that it has a lower on-current because the offset region is not influenced from a gate voltage.

[0011] Accordingly, the present invention is directed to a thin film transistor and a method for fabricating the same that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.

[0012] An object of the present invention is to provide a thin film transistor and a method for fabricating the same which has an increased on-current and a wider channel in a small area.

[0013] Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

[0014] To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, the thin film transistor including a source electrode formed on a substrate, a columnar conductive layer connected to the source electrode, a drain electrode formed on the conductive layer, a gate insulating film formed to cover the conductive layer and the drain electrode, a gate electrode formed on the gate insulating film surrounding the conductive layer, and an insulting film formed between the source electrode and the gate electrode.

[0015] In other aspect of the present invention, there is provided a method for fabricating a thin film transistor, including the steps of (1) forming a source electrode on a substrate, (2) forming a columnar conductive layer connected to the source electrode, (3) forming an insulating film to a height on the substrate inclusive of the source electrode, (4) injecting ions to form a drain electrode in an upper part of the conductive layer, (5) forming a gate insulating film on the insulating film to cover the conductive layer and the drain electrode, and (6) forming a gate electrode on the gate insulating film covering the conductive layer.

[0016] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.

[0017] The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention:

[0018] In the drawings:

[0019] FIG. 1 illustrates a section of a background art thin film transistor;

[0020] FIGS. 2A˜2D illustrate sections showing the process steps of a background art method for fabricating a thin film transistor;

[0021] FIG. 3A illustrates a lay-out of a thin film transistor in accordance with a preferred embodiment of the present invention;

[0022] FIG. 3B illustrates a perspective view of a section across line 3b-3bin FIG. 3A; and,

[0023] FIGS. 4A˜4H illustrate sections showing the process steps of a method for fabricating a thin film transistor in accordance with a preferred embodiment of the present invention.

[0024] Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings. FIG. 3A illustrates a lay-out of a thin film transistor in accordance with a preferred embodiment of the present invention, and FIG. 3B illustrates a perspective view of a section across line I-I′ in FIG. 3A.

[0025] Referring to FIG. 3B, the thin film transistor in accordance with a preferred embodiment of the present invention includes a substrate 31, a source electrode 33 formed on the substrate 31, a conductive layer 39 formed on the source electrode 33, an upper portion of which conductive layer 39 serves as a drain electrode 39a, a gate insulating layer 41 formed on the drain electrode 39 and the conductive layer 39, and a gate electrode 43aformed on the gate insulating film 41 spaced from the source electrode 33 and enclosing the conductive layer 39 and the drain electrode 39a. The conductive layer 39 has a form of cylindrical column, and there is an insulating film 35 between the source electrode 33 and the gate electrode 43a. And, an offset region is formed in a portion of the conductive layer 39 corresponding to positions between a bottom of the gate electrode 43ato a top of the source electrode 33. The channel region is formed in the conductive layer 39 corresponding to a height of the gate electrode 43a. Both the offset region and the channel region are formed vertical to the substrate 31.

[0026] A method for fabricating a thin film transistor in accordance with a preferred embodiment of the present invention will be explained. FIGS. 4A˜4H illustrate sections showing the process steps of a method for fabricating a thin film transistor in accordance with a preferred embodiment of the present invention.

[0027] Referring to FIG. 4A, a P⁺doped polysilicon layer is deposited on an insulating substrate 31 and subjected to patterning by photolithography, to form a source electrode 33. As shown in FIG. 4B, an insulating film 35 is formed on an entire surface of the substrate 31 inclusive of the source electrode 33. In this instance, the steps shown in FIGS. 4A and 4B may be replaced with steps of forming a trench in an insulating layer(a combination of the insulting substrate and the insulating film) and forming the source electrode on a bottom of the trench and stuffing the trench with an insulating material. As shown in FIG. 4C, photoresist(not shown) is coated on the insulating film 35 and subjected to patterning by exposure and development. The insulating film 35 is etched until a surface of the source electrode 33 is exposed, to form a contact hole 37. As shown in FIG. 4D, the contact hole 37 is stuffed with an undoped polysilicon layer, to form a conductive layer 39 of a cylindrical column, which will be used as a channel region and an offset region. As shown in FIG. 4E, the insulating film 35 is etched to a certain extent without using any mask, leaving the insulating film 35 enough to cover the source electrode 33. As shown in FIG. 4F, a gate insulating film 41 is formed to cover the conductive layer 39 inclusive of the insulating film 35. As shown in FIG. 4G, a polysilicon layer is formed to surround the gate insulating film 41 and etched back, to form a polysilicon pattern 43 surrounding the conductive layer 39 with the gate insulating film 41 inbetween. As shown in FIG. 4H, P³⁰ions are injected into an entire surface inclusive of the polysilicon pattern 43, to make upper portions of the polysilicon pattern 43 and the conductive layer 39 conductive. Accordingly, the polysilicon pattern 43 may be used as a gate electrode 43aof a thin film transistor, and the upper portion of the conductive layer 39 may be used as a drain electrode 39aof the thin film transistor.

[0028] The thin film transistor and the method for fabricating the same of the present invention has the following advantages.

[0029] First, the wider channel compared to area allowed by the use of a surface of a cylindrical column as a region of the channel of a thin film transistor allows an increased on-current.

[0030] Second, the formation of an offset region without using a mask allows a stable thin film transistor.

[0031] It will be apparent to those skilled in the art that various modifications and variations can be made in the thin film transistor and the method for fabricating the same of the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.