Nonlinear equalizing apparatus

[0004] 1. Field of the Invention

[0005] The present invention relates to an equalizing apparatus, and more particularly, to a non-linear equalizing apparatus used for a digital magnetic recording medium.

[0006] 2. Description of the Related Art

[0007] Nonlinearity becomes a serious problem as recording density increases in a digital magnetic recording medium such as a hard disk drive (HDD). The nonlinearity is generated due to interaction between adjacent transitions. A demagnetization field of a previously recorded transition shifts the position of a subsequently recorded transition and increases the width between transitions. The adjacent transitions operate to erase each other. As a result, the size of a reproduced signal is reduced. Such phenomenons are known as nonlinear transition shift (NLTS), a transition broadening, and a partial erasure respectively.

[0008] When data are to be recorded, some peripheral bits generate such a nonlinear distortion. However, an interference effect between signals in reproduced signals exists in many bits. Accordingly, the nonlinear distortion affects many bits. When a signal detector does not process the nonlinear distortion, data detection reliability deteriorates.

[0009] According to a conventional technology (U.S. Pat. No. 5,132,988), the nonlinear distortion is processed using a feedback RAM instead of a feedback filter. Since a RAM model for processing the nonlinear distortion models only the nonlinear distortion from past data, it is impossible to consider the interaction between current and future data.

[0010] Also, since the size of a RAM is doubled as the range of data filtered by a feedback portion increases by one bit in this equalizer, the amount of data which can be processed by the feedback portion is restricted by the size of the RAM.

[0011] The linearity and nonlinearity characteristics of a channel are shown by three pulses in a paper by W. Zeng and J. Moon [“A Practical Nonlinear Model for Magnetic Recording Channels”, IEEE Trans. Magn., vol. 30, no. 6, pp. 4233-4235, November 1994]. The three pulses are an isolated transition response which is a transition response in the case that there is no transition between adjacent data and dibit responses which are transition responses in the case that there is a transition in a one bit past and there is a transition in a two bit past. The three pulses are obtained by measuring the reproduced signals.

[0012] However, a channel characteristic is not obtained from all the data sequences which may be generated but obtained by measuring a channel signal in an extremely restricted situation, in this model. As a result, this model does not provide a method of mathematically optimizing a model in order to heighten the reliability or obtaining the channel characteristic in a more general situation. Also, logic regulations for generating logic variables such as Q_k, R_k, ERA, and CHO required for operating the model are not mathematically induced but are created depending on the experience of the writers. The nonlinear equalizer in which the model provided by W. Zeng and J. Moon is used [“Decision feedback equalizer with pattern dependent dynamic threshold,” IEEE Trans. Magn., vol. 32, no. 4, pp. 3266-3273, July 1996] includes all the restrictions and problems which the model has.

[0013] It is an object of the present invention to provide an adaptive nonlinear equalizing apparatus.

[0014] It is another object of the present invention to provide a pattern dependent filter of the above apparatus.

[0015] It is still another object of the present invention to provide an adaptive nonlinear equalizing method which can effectively process a nonlinear distortion generated by an interaction not only between adjacent past bits but also between current and future bit data.

[0016] In order to achieve the first object, there is provided a nonlinear equalizing apparatus for detecting original data a_kfrom an input value r_kobtained by reproducing data received through a transfer channel or recorded on a storing apparatus, comprising a linear filter for linear filtering the input value r_k, a pattern dependent filter including 2^τ+vtap values selected by the respective patterns (b_{k−n+v:k−n+1},b_{k−n−1:k−n−τ}) of future v and past τ bit data transition absolute values and N taps p_n(b_{k−n+v:k−n+1},b_{k−n−1:k−n−τ}) for outputting the value obtained by multiplying the selected tap value with the current transition (x_k−n), and (wherein, x_k−n=(a_k−n−a_k−n−1)/2∈{−1, 0, }, b_k−n=|x_k−n|∈{0, 1}, b_{k−n−1:k−n−τ}=(b_k−n−1b_k−n−2. . . b_k−n−τ), b_{k−n+v:k−n+1}=(b_k−n+vb_k−n+v−1. . . b_k−n+1), n=0, 1, 2, . . . , N, and N is a predetermined integer not less than 1+v) a detector for obtaining an error value e_kby a subsequent equation, with respect to all combinations of current and future data sequences $e_k=\sum _m{r}_{k-m}{f}_m-\sum _n{x}_{k-n}{p}_n\left(b_{k-n+v:k-n+1},b_{k-n-1:k-n-\tau }\right)$

[0017] (wherein, 𝑓_mis the linear filter) and detecting current data assumed in the combination by which the minimum error square value is generated as the original data a_k.

[0018] In order to achieve the second object, there is provided a pattern dependent filter, comprising the 0th through the Nth filter taps including 2^τ+1tap values selected by the pattern (b_k+1−n,b_{k−1−n:k−τ−n}) of a future and past τ bit data transition absolute values and adaptively renewed by the error value e_k−3, for multiplying the selected tap value with the current transition x_k−nand outputting the multiplication result, wherein a_kis original data detected by the nonlinear equalizing apparatus, x_k−n=(a_k−n−a_k−n−1)/2∈{−1, 0, }, b_k−n=|x_k−n|∈{0, 1}, b_{k−n−1:k−n−τ}=(b_k−n−1b_k−n−2. . . b_k−n−τ), n=0, 1, 2, . . . , N, and N is a predetermined integer not less than 2, wherein the respective filter taps comprises a buffer list for storing 2^τ+1tap values, tap value selecting means for selecting one among 2^τ+1tap values output from the buffer list by the pattern (b_k+1−n,b_{k−1−n:k−τ−n}) of future one and past τ bit data transition absolute values, a current transition multiplier for multiplying the tap value selected by the tap value selecting means with the current transition x_k−nand outputting the result, and a tap value renewing means for renewing the tap value by adding the tap value selected by the pattern (b_k−2−n,b_{k−4−n:k−3−τ−n}) of the past one and future τ bit data transition absolute values from a reference time when the reference time is k−3−n.

[0019] In order to achieve the third object, there is provided a method of detecting original data a_kfrom an input value r_kobtained by reproducing data received through a transfer channel or recorded on a storing apparatus, comprising the steps of obtaining $\sum _n{r}_{k-n}{f}_n$

[0020] by linear filtering the input value r_k, obtaining $z_k=\sum _n{r}_{k-n}{f}_n-\sum _{n=2}^N{x}_{k-n}{p}_n\left(b_{k-n+1},b_{k-n-1:k-n-\tau }\right)$

[0021] from already known data when a filter tap including 2^τ+1tap values selected by the pattern (b_k+1−n,b_{k−1−n:k−τ−n}) of the future one and past τ bit data transition absolute values from a reference time when the reference time is k−n for multiplying the selected tap value with the current transition x_k−nis p_n(b_k−n+1,b_{k−n−1:k−n−τ}), wherein x_k−n=(a_k−n−a_k−n−1)/2∈{−1, 0, 1}, b_k−n=|x_k−n|∈{0, 1}, b_{k−n−1:k−n−τ}=(b_k−n−1b_k−n−2. . . b_k−n−τ), n=0, 1, 2, . . . , N, and N is a predetermined integer not less than 2^v, obtaining an intermediate value T_kbetween the output value of the filter tap p₁and p₀when the transition is continuously generated in the current and future one bit (b_k=b_k+1=1) and the output value of the filter tap p₁and p₀when the transition is not currently generated, and detecting the original data a_kby determining a_kas +1 when z_k−T_kis equal to or greater than 0 and as −1 when a_kis less than 0. Also, there is a method of detecting original data a_kfrom an input value r_kobtained by reproducing data received through a transfer channel or recorded on a storing apparatus, comprising the steps of obtaining $\sum _n{r}_{k-n}{f}_n$

[0022] by linear filtering the input value r_k, obtaining $z_k=\sum _n{r}_{k-n}{f}_n-\sum _{n=2}^N{x}_{k-n}{p}_n\left(b_{k-n+1},c_{k-n},b_{k-n-1:k-n-\tau }\right)$

[0023] from already known data when a filter tap including 2^τ+2tap values selected by the pattern (b_k+1−n,c_k−n,b_{k−1−n:k−τ−n}) of the future one, current one, and past τ data transition absolute values from a reference time when the reference time is k−n for multiplying the selected tap value with the current transition x_k−nis p_n(b_k−n+1,c_k−n,b_{k−n−1:k−n−τ}), wherein, x_k−n=(a_k−n−a_k−n−1)/2∈{−1, 0, 1}, b_k−n=|x_k−n|∈{0, 1}, b_{k−n−1:k−n−τ=(bk−n−1}b_k−n−2. . . b_k−n−τ), c_k−nequals to 1 when a_k>0 and equals 0 in the other cases, n=0, 1, 2, . . . , N, and N is a predetermined integer not less than 2^v, obtaining an intermediate value T_kbetween the output value of the filter tap p₁and p₀when the transition is continuously generated in the current and future one bit (b_k=b_k+1=1) and the output value of the filter tap p₁and p₀when the transition is not currently generated, and detecting the original data a_kby determining a_kas +1 when z_k−T_kequals to or is larger than 0 and as −1 when a_kis less than 0.

[0024] The above objects and advantages of the present invention will become more apparent by describing in detail a preferred embodiment thereof with reference to the attached drawings in which:

[0025] FIG. 1 shows a search tree with respect to current and future data transition absolute values when v=1;

[0026] FIG. 2 is a block diagram of a nonlinear equalizer according to the present invention including a filter having a filter tap value which varies according to a data pattern containing future v data and past τdata;

[0027] FIG. 3 is a block diagram of the nonlinear equalizer according to the present invention including a filter having a filter tap value which varies according to a data pattern containing future one data and the past τ data;

[0028] FIG. 4 is a block diagram of an error value calculator for the nonlinear equalizer obtaining an error value by a pipeline method;

[0029] FIG. 5 is a block diagram showing the structure of a pattern dependent filter of a nonlinear equalizing apparatus according to the present invention;

[0030] FIG. 6 shows an embodiment (n=2, 3, . . . , and N) of a number n filter tap (P_n) of the pattern dependent filter of FIG. 5 having filter tap values which vary according to data patterns;

[0031] FIG. 7 is an embodiment of a number 1 filter tap (P₁) of the pattern dependent filter of FIG. 5 having the filter tap values which vary according to the data patterns;

[0032] FIG. 8 is an embodiment of a number 0 filter tap (P₀) of the pattern dependent filter of FIG. 5 having the filter tap values which vary according to the data patterns; and

[0033] FIG. 9 is a graph for comparing the performance of a conventional equalizer with that of an equalizer according to the present invention.

[0034] A theory on which the present invention is based will be described hereinafter.

[0035] Processes of obtaining an equalizer error e_kaccording to the present invention are as follows.

[0036] It is assumed that a binary data sequence is a_k(a_kis +1 or −1) and that a sample signal obtained by recording a_kon a disk and reproducing a_kor a sample signal received through a transfer channel is r_k. r_kis filtered by a finite impulse response filter (FIR) 𝑓_n. An target signal is generated by the overlapping the filtered r_kwith pulse p_n(•) which vary according to the data patterns. Then, the difference between r_kfiltered by 𝑓_nand the target signal is the equalizer error value e_k. $\begin{array}{cc}{e}_k=\sum _{n=-L_0}^{L_1}{r}_{k-n}{f}_n-\sum _{n=-N_0}^{N_1}{x}_{k-n}{p}_n\left(b_{k-n+v:k-n+1},b_{k-n-1:k-n-\tau }\right)& \left(1\right)\end{array}$

[0037] wherein, x_k=(a_k−a_k−1)/2=−1 represents the −ve transition of data x_k=(a_k−a_k−1)/2=0 means that there is no transition of data. x_k=(a_k−a_k−1)=+1 represents the +ve transition of data. b_k=|x_k|=1 means that there is an occurrence of a transition. b_k=|x_k|=0 means that there is no occurrence of a transition. b_k−1:k−τrepresents τbits data set (b_k−1b_k−2. . . b_kτ) and a pulse p_n(b_{k−n+v:k−n+1}, b_{k−n−1:k−n−τ}) has a value which varies according to the states of the transition of future v bits b_{k−n+v:k−n+1}and the transition of past τ bits b_{k−n−1:k−n−τ}in the respective samples n.

[0038] A method of obtaining current data a_kusing an equalizer error value obtained by Equation 1 is as follows. After obtaining the square e_k*e_kof an output error with respect to all possible combinations of current and future N₀+v data, the value of the current data assumed in the case of obtaining a minimum value is searched and is determined as the value of the current data a_k. $\begin{array}{cc}{a}_k=\{\begin{array}{cc}1& \mathrm{if}{\min }_{a_{k:k+N_0+v}}{e}_k^2={\min }_{a_{k+1:k+N_0+v}}{e}_k^2|a_k=1\\ -1& \mathrm{if}{\min }_{a_{k:k+N_0+v}}{e}^{2_k}={\min }_{a_{k+1:k+N_0+v}}{e}_k^2|a_k=-1\end{array}& \left(2\right)\end{array}$

[0039] The pulse which varies according to data patterns can be represented as follows using a pattern state value s_k. $\begin{array}{cc}\begin{array}{c}{p}_n\left(b_{k-n+v:k-n+1},b_{k-n-1:k-n-\tau }\right)=\sum _{m=0}^{M-1}\delta \left(m-s_{k-n}\right)p_n\left(m\right)\\ =i_{k-n}^t{p}_n\end{array}& \left(3\right)\end{array}$

[0040] wherein, δ(m−s_k−n) is a delta function, which has a value of 1 when m is equal to s_k−nand a value of 0 when m is not equal to s_k−n.

[0041] M=2^τ+v  (4) $\begin{array}{cc}{s}_{k-n}=\sum _{m+1}^v{b}_{k-n+m}{2}^{\tau +m-1}+\sum _{m=1}^{\tau }{b}_{k-n-m}{2}^{\tau -m}& \left(5\right)\end{array}$

[0042] i_k−n=[δ(s_k−n)δ(s_k−n−1) . . . δ(s_k−n−M+1)]^t  (6)

[0043] p_n=[p_n(0)p_n(1) . . . p_n(2^τ+v−1)]^t  (7)

[0044] Equation 3 represents the pulse p_n(b_{k−n+v:k−n+1},b_{k−n−1:k−n−τ}) as the multiplication of two vectors of size M with each other. Equation 1 is represented as follows using Equation 3. $\begin{array}{cc}{e}_k=r_k^{t}f-\sum _{n=-N_0}^{N_1}{x}_{k-n}{i}_{k-n}^t{P}_n& \left(8\right)\\ e_k=r_k^{t}f-\sum _{n=-N_0}^{N_1}{w}_{k-n}{p}_n& \left(9\right)\end{array}$  e_k=r_k^t𝑓−w_kp  (10)

[0045] w_k−n=x_k−ni_k−n^t  (11)

[0046] w_k=[w_k+Nw_k−1+N. . . w_k−N]  (12)

[0047] p=[p_−N^tp_1−N^t. . . p_N^t]^t  (13)

[0048] For example, in a state in which s_k−nis equal to 0, transitions are not generated in future v bits and past τ bits on the basis of the current data a_k−n. When an optional transition pattern m₀is selected and p₀(m₀) which is a pulse center tap (n=0) is designated to be 1, Equation 10 can be simultaneously omtimized with respect to the filter 𝑓_nand the pulse p_n(•). $\begin{array}{cc}\begin{array}{c}{e}_k=r_k^{t}f-w_k^{\prime }{p}^{\prime }-w_k\left(m_0\right)p_0\left(m_0\right)\\ =y_k^{t}f-w_k\left(m_0\right)\end{array}& \left(14\right)\end{array}$

[0049] wherein, p₀(m₀)=1.

[0050] y_k=[r_k^t−w_k′]^t  (15) $\begin{array}{cc}f=\left|\begin{array}{c}f\\ p^{\prime }\end{array}\right|& \left(16\right)\end{array}$

[0051] wherein, p′ is a vector obtained by erasing p₀(m₀) from p. w_k′ Is a vector obtained by erasing w_k(m₀) from w_k.

[0052] The optimal filter and pulse for minimizing an error square mean are obtained as follows.

[0053] 𝑓₀=E{y_ky_k^t}⁻¹E{y_kw_k(m₀)}  (17)

[0054] Processes of adaptively obtaining the optimal filter and pulse are as follows.

[0055] 𝑓=𝑓−μe_ky_k  (18)

[0056] This will be described in more detail as follows.

[0057] 𝑓_n=𝑓_n−μe_kr_k−n, n=−L₀, . . . , L₁  (19)

[0058] p_n(i)=p_n(i)+μe_kx_k−nδ(s_k−n−i),

[0059] n=−N₀, . . . , N₁, i=0, . . . , 2^τ+1−1  (20)

[0060] wherein, p₀(m₀)=1.

[0061] According to Equation 2, in order to detect data by a nonlinear equalizer, an output error square is to be obtained with respect to current and future (N₀+v) and the value of a_khaving a minimum value is to be searched. However, when the value of (N₀+v) is great, these detecting processes are very complicated. Therefore, it is necessary to find a simpler method.

[0062] In the case in which N₀=0 and v=1 so that a pulse has only current and past signal values, the filter 𝑓_nand the pulse p_n(•) operate in a similar way to the feedforward filter and the feed back filter of a decision-feedback equalizer (DFE). However, since the pattern s_kof the pulse requires the value of future data, a search for the future data is necessary. Equation 9 can be represented as follows. $\begin{array}{cc}\begin{array}{c}{e}_k=r_k^{t}f-\sum _{n=2}^{N_1}{w}_{k-n}{p}_n-\sum _{n=0}^l{w}_{k-n}{p}_n\\ =z_k-\sum _{n+0}^l{w}_{k-n}{p}_n\end{array}& \left(21\right)\\ z_k=r_k^{t}f-\sum _{n=2}^{N_1}{w}_{k-n}{p}_n& \left(22\right)\end{array}$

[0063] z_kcan be obtained since past data is already known. Therefore, the current data a_kis obtained by obtaining the error squares of Equation 21 with respect to all combinations current bit and one future bit can have and determining the a_kvalue which is required for generating the minimum error square value as the value of the current bit. FIG. 1 shows a search tree for detecting data when n=1.

[0064] When n=1, data detecting processes can be simplified as follows. When the past transition b_k−n(n>0) is already known, there are four transition patterns (b_k, b_K+1) to be considered in Equation 21, i.e., (0, 0), (0, 1), (1, 0), and (1, 1). However, since w_k−n=x_k−ni_k−n^t, when b_k=0, w_kis always 0 regardless of b_k+1. Thus, w_k(b_k=0)=0. The transitions of the adjacent future bits generate a partial erasure phenomenon, thus reducing the size of the transition pulse of the current bit.

[0065] |w_k(b_k=1,b_k+1=1)p₀|≦|w_k(b_k=1, b_k+1=0)p₀|  (23)

[0066] The value of the current bit is always determined between a case in which b_k=0 and a case in which b_k=b_k+1=1. A center point between the case in which b_k=0 and the case in which b_k=b_k+1=1 is as follows.

[0067] T_k=½{w_k−1(b_k=0)p₁+w_k−1(b_k=1)p₁+w_k(b_k=b_k+1=1)p₀}  (24)

[0068] The value of the current bit is easily detected by a threshold detector. $\begin{array}{cc}\begin{array}{c}\begin{array}{c}{a}_k=\{\begin{array}{cc}+1,& \mathrm{if}{z}_k-T_k\ge 0\\ -1,& \mathrm{otherwise}\end{array}\\ \mathrm{wherein},\end{array}\\ z_k=r_k^{t}f-\sum _{n+2}^{N_1}{w}_{k-n}{p}_n\end{array}{T}_k=\frac{1}{2}\left\{w_{k-1}\left(b_k=0\right)p_1+w_{k-1}\left(b_k=1\right)p_1+w_{k-1}\left(b_k=b_{k+1}=1\right)p_0\right\}& \left(25\right)\end{array}$

[0069] When a signal is reproduced by a magneto resistive MR head, the signal has different characteristics according to a positive direction or a negative direction. In the present invention, it is possible to consider the characteristic of the signal which varies according to the directions by adding the state of the current data to the pattern of the pulse. Namely, the pulse is defined as p_n(b_{k−n+v:k−n+1}, c_k, b_{k−n−1:k−n−τ}) and variables c_k, M, and s_kare defined as follows. $\begin{array}{cc}{c}_k\{\begin{array}{cc}1,& \mathrm{if}{a}_k>0\\ 0,& \mathrm{otherwise}\end{array}& \left(26\right)\end{array}$  M=2^τ+v+1  (27) $\begin{array}{cc}{s}_{k-n}=c_{k-n}{2}^{\tau }+\sum _{m=1}^v{b}_{k-n+m}{2}^{\tau +m}+\sum _{m+1}^{\tau }{b}_{k-n-m}{2}^{\tau -m}& \left(28\right)\end{array}$

[0070] The other equations are the same as those mentioned before. The c_kvalue is necessary in the 0th tap. However, when it is assumed that b_k=1, a circuit is constructed using a characteristic that the c_kvalue is equal to the complement of the C_k−1value.

[0071] FIG. 2 is a block diagram of a nonlinear equalizer for detecting binary data a_kby the method of Equation 2 using the error value defined in Equation 1.

[0072] After processing the received input value r_kby a linear filter 200, data previously detected by a pattern dependent filter 210 having different tap values according to past sand future v bits data pattern are filtered. An error value is obtained by a detector 220 by subtracting the output value of the pattern dependent filter 210 from the output value of the linear filter 200. The error values of Equation 1 with respect to all combinations of current and future data which are not detected yet are obtained. The detector 220 obtains a_kfor generating the minimum error square value as shown in Equation 2 among the error values of the respective combinations and determines it as final output data.

[0073] At this time, a_khas the value of +1 or −1 in Equation, however, has the value of 1 or 0 in a circuit.

[0074] Hereinafter, the case in which the pattern dependent filter has different tap values according to future one and past τ bits data pattern will be described as a preferred embodiment of the present invention.

[0075] According to FIG. 3, processes of obtaining the current data a_kaccording to Equation 25 are as follows in an embodiment of the present invention. In the present embodiment, a pattern dependent filter 310 includes a plurality of filter taps, i.e., 0th through Nth filter taps P₀through P_N320 through 320+N and a transition calculator 330. A detector 340 includes a past tap value adder 342, a future tap value adder 344, and a threshold value detector 346.

[0076] The past tap adder 342 adds the output values of the second filter tap 322 through the Nth filter tap 320+N to each other. The future tap adder 344 adds the output value of the 0th filter tap 320 to that of the first filter tap 321.

[0077] z_kof Equation 22 is obtained by subtracting the output value of the past tap value adder 332 from the input value r_kfiltered by the linear filter 300. T_kof Equation 24 is obtained by multiplying {fraction (1/2+L )} by the output value of the future tap value adder 334.

[0078] The threshold value detector 346 detects the current data a_kby detecting a threshold value on the basis of 0 with respect to the signal obtained by subtracting T_kfrom z_kas shown in FIG. 25.

[0079] At this time, b_kis defined as |(a_k−a_k−1)/2| in Equation 1. However, b_kis obtained by performing an XOR operation on a_kand a_k−1in logic circuits. Namely, the transition calculator 330 obtains a_k−1by delaying a_kby one clock cycle by the first delaying means 332, b_kby performing an XOR operation on a_kand a_k−1by an XOR gate 336, and b_k−1by delaying b_kby one clock cycle by the second delaying means 334. a_k−1and b_k−1are used by the 0th filter tap 320 through the Nth filter tap 320+N.

[0080] According to FIG. 4, processes of obtaining the error value of the equalizer are as follows in the above embodiment. The processes are realized by a pipeline method.

[0081] The two output values w_k−1(b_k=0)p₁and w_k−1(b_k=1)p₁of the first filter tap 321 are respectively delayed by one clock cycle by being stored in a buffer 401 and a buffer 402. The first filter tap value selector 410 selects w_k−1(b_k=1)p₁delayed by one clock cycle when b_k−1is 1 and w_k−l(b_k=0)p₁delayed by one clock cycle when b_k−1is 0.

[0082] The two outputs w_k(b_k=1, b_k+1=1)p₀and w_k(b_k=1, b_k−1=0)p₀the 0th filter tap 320 are respectively delayed by two clock cycles by being sequentially stored in buffers 403 and 404 and buffers 405 and 406. Then, the second filter tap value selector 420 selects w_k(b_k=1, b_k+1=1)p₀delayed by two clock cycles when b_k−1is 1 and w_k(b_k=1, b_k+1=0)p₀delayed by two clock cycles when b_k−1is 0. A third filter tap value selector 430 selects the output value of the second filter tap value selector 420 when b_k−2is 1 and 0 when b_k−2is 0.

[0083] z_kis delayed by one clock cycle by being stored in a buffer 407 and become z_k−1. A first error value adder 440 subtracts the output value of the first filter tap value selector 410 from z_k−1. The output value of a first error value adder 440 is delayed by one clock cycle by being stored in the buffer 408. A second error value adder 450 subtracts the output value of the third error value selector 430 from the output value of the buffer 408. The output value of the second error value adder 450 is delayed one clock cycle by being stored in the buffer 409 and becomes an error value e_k−3delayed by three clock cycles.

[0084] FIG. 5 shows the structure of one among the filter taps included in the pattern dependent filter of the nonlinear equalizer according to the present invention. The filter tap according to the present invention includes a buffer list 500, a tap value selecting means 510, a current transition multiplier 520, and a tap value renewing means 530.

[0085] The buffer list 500 includes 2^τ+1buffers for storing 2^τ+1tap values selected by pattern (b_k+1−n,b_{k−1−n:k−τ−n}) of future one and past τ data transition absolute values from a reference time when the reference time is k−n and adaptively renewed by the error value e_k−3.

[0086] The tap value selecting means 510 selects one among 2_τ+1tap values output from the buffer list 500 by the pattern (b_k+1−n,b_{k−1−n:k−τ−n}) of the future one and past τ data transition absolute values.

[0087] The current transition multiplier 520 multiplies the tap value selected by the tap value selecting means 510 with the current transition x_k−nand outputs the result.

[0088] The tap value renewing means 530 includes a renewed tap value selecting means 532, an increase/decrease value calculating means 534, a renewed tap value calculator 536, and a renewed tap selecting means 538. Here, the reference time is k−3−n.

[0089] The renewed tap value selecting means 532 selects one among 2^τ+1tap values output from the buffer list 500 by the pattern b_k−2−n,b_{k−4−n:k−3−τ−n}) of the future one and past τ data transition absolute values from the reference time. The increase/decrease value calculating means 534 inputs a step size μ, current data value a_k−3−n, and the error value e_k−3delayed by three clock cycles and calculates the increased and reduced value μx_k−3−ne_k−3.

[0090] The renewed tap value calculator 536 calculates the renewed tap value by adding the tap value selected by the renewed tap value selecting means 532 to the value calculated by the increase/decrease value calculating means 534 and stores the renewed tap value in the buffer of the buffer list 500 selected by the renewed tap selecting means 538.

[0091] The respective buffers included in the buffer list 500 includes a first buffer selector for selecting either the output of the buffer or the output value of the renewed tap value calculator 536 under the control of the renewed tap selecting means 538 and a second buffer selector for selecting either the output value of the first buffer selector or the initial value of the first buffer selector by a ‘LOAD’ control signal.

[0092] According to FIG. 6, the structure of an embodiment of an nth filter tap P_ninto (n=2 through N) having different tap values according to data patterns is as follows. The nth filter tap P_noutputs the value w_k−np_n. Here, the current time is set on the basis of k−n.

[0093] A buffer p_n(i) (i=0, 1, . . . , 2^τ+1−1) stores the tap values with respect to the respective patterns. This value is designated as the initial value p_n⁰(i) (i=0, 1, . . . , 2^τ+1−1) when the control signal “LOAD” is turned on. Reference numerals 600 and 605 respectively denote a 0th buffer and a 2^τ+1−1th buffer.

[0094] In the present embodiment, the tap value selecting means 510 includes a lower tap value selecting multiplexer 610, an upper tap value selecting multiplexer 615, and a tap value selector 620.

[0095] The low tap value selecting multiplexer 610 selects one among lower 2^τtap values p_n(i) (i=0, 1, , . . . , 2^τ−1)by the pattern b_{k−1−n:k−τ−n}of the past τ bit transition absolute value. The upper tap value selecting multiplexer 615 selects one among the uppers 2^τtap values p_n(i) (i=2^τ, . . . , 2^τ−1) by the pattern b_{k−1−n:k−τ−n}of the past τ bit transition absolute values.

[0096] The output value of the lower tap value selecting multiplexer 610 relates to the tap value when b_k+1−n=0. The output value of the upper tap value selecting multiplier 615 relates to the tap value when b_k+1−n=1. Therefore, the tap value selector 620 selects either the output value of the lower tap value selecting multiplexer 610 or that of the upper tap value selecting multiplexer 615. The result corresponds to the operation i_k−n^tp_nof Equation 3.

[0097] In the present embodiment, the current transition multiplier 520 of FIG. 5 includes a code selector 625 and a current transition presence selector 630.

[0098] The code selector selects the output value of the tap value selector 620 when a_k−nis 1 and the value obtained by multiplying the output value of the tap value selector 620 with −1 when a_k−nis 0. This process is the same as the process of multiplying x_k−nwith the output value of the tap value selector 620 when it is assumed that be b_k−n=1. Then, the current transition presence selector 630 selects either the output value of the code selector 625 or 0 according to b_k−nand outputs the selected value.

[0099] Therefore, the code selector 625 and the current transition presence selector 630 perform the same operation as that of multiplying the output value i_k−n^tp_nof the tap value selector 620 with x_k−n. As a result, the output value of the current transition presence selector 630 is w_k−np_n=x_k−ni_k−n^tp_n, which is the output value of the nth filter tap P_n.

[0100] The nth filter tap P_nrenews the tap value using the renewed error value e_k−3as described in FIG. 4. The renewal process is based on Equation 20. In this process, the reference time is k−3−n.

[0101] The renewed tap value selecting means 635 is realized by a multiplexer and selects one among the output values of the buffers p_n(i) (i=0, 1, . . . , 2^τ+1−1) by the future one transition b_k−2−nand the past τ bit transition b_{k−4−n:k−3−τ−n}. The increased and reduced value calculating means 640 obtains μa_k−3−ne_k−3by inputting a_k−3−n, μ, and the error value e_k−3. The renewed tap value calculator 645 which is a kind of adder, adds the output value of the renewed tap value selecting means 635 to μa_k−3−ne_k−3.

[0102] The renewed tap selecting means 650 which is realized by a demultiplexer outputs 1 only to one output terminal selected b_k−2−nand b_{k−4−n:k−3−τ−n}among 2^τ+1output terminals and outputs 0 to the remaining 2^τ+1−1 output terminals. Namely, the renewed tap selecting means 650 selects one among 2^τ+1buffers p_n(i) (i=0, 1, . . . , 2^τ+1−1) according to b_k−2−nand b_{k−4−n:k−3−τ−n}. When a control signal “UPDATE” is high and the b_k−3−nvalue is 1, the output value of the renewed tap value calculator 645 is determined as the input value of the selected buffer. When “UPDATE” is low or the b_k−3−nvalue is 0, the original tap value is maintained.

[0103] According to FIG. 7, the structure of an embodiment of the first filter tap P₁having different tap values according to the patterns of data is as follows. The operation processes of the first filter tap P₁are similar to those of the nth filter tap P_n(n=2 through N) shown in FIG. 6. However, the first filter tap P₁outputs two values, i.e., w_k−1(b_k=1)p₁and w_k−1(b_k=0)p₁. Here, the current time is based on k−1.

[0104] The buffers p₁(i) (i=0, 1, . . . , 2^τ+1−1) store the tap values with respect to the respective patterns. An initial value is designated as p₁(i) (wherein, i=0, 1, . . . , 2^τ+1−1) when a control signal “LOAD” is turned on in an initial stage of the operation. Reference numerals 700 and 705 respectively denote the 0th buffer and the 2^τ+−1th buffer.

[0105] In the present embodiment, the tap value selecting means 510 of FIG. 5 includes a lower tap value selecting multiplexer 710 and an upper tap value selecting multiplexer 715.

[0106] The lower tap selecting multiplexer 710 selects one among the lower 2^τbuffer values p₁(i) (i=0, 1, . . . , 2^τ+1−1) by the past τ bit transition patterns b_{k−2:k−τ−1}. The upper tap value selecting multiplexer 715 selects one among the upper 2^τbuffer values p₁(i) (i=2^τ, . . . , 2^τ+1−1).

[0107] The output value of the lower tap value selecting multiplexer 710 relates to the tap value when b_k=0. The output value of the upper tap value multiplexer 715 relates to the tap value when b_k=1.

[0108] In the present embodiment, the current transition multiplier 520 of FIG. 5 includes a lower tap value current transition multiplier 720 and an upper tap value current transition multiplier 725.

[0109] The lower tap value current transition multiplier 720 and the upper tap value current transition multiplier 725 include code selectors 721 and 726 and current transition presence selectors 722 and 727. The operation of the lower tap value current transition multiplier and the upper tap value current transition multiplier are the same as multiplying the output values of the lower tap value selecting multiplexer 710 and the upper tap value selecting multiplexer 715 with x_k−1. Namely, the output values of the current transition presence selectors 722 and 727 are w_k−1(b_k=1)p₁and w_k−1(b_k=0)p₁, which are the output values of the first filter tap P₁.

[0110] Processes of renewing the tap value using the error value e_k−3by the first filter tap P₁are the same as shown in FIG. 6.

[0111] According to FIG. 8, the structure of an embodiment of the 0th filter tap P₀having different tap values according the patterns of data is as follows. The operating processes of the 0th filter tap P₀are similar to those of the nth filter tap P_n(n=2 through N) shown in FIG. 6. However, the 0th filter tap P₀outputs the two values, i.e., w_k(b_k=1,b_k+1=1)p₀and w_k(b_k=1,b_k+1=0)p₀. Here, the current time is based on k.

[0112] The buffers p₀(z) (i=1, . . . , m₀−1, m₀+1, . . . , 2^τ+1−1) store the tap values with respect to the respective patterns. The 0th tap value p₀(m₀) is fixed to 1. m₀is a certain fixed value selected from the values, 0 through 2^τ+1−1. An initial value is designated as p₀(i) (wherein, i=1, . . . , m₀−1, m₀+1, . . . , 2^τ+1−1) when the control signal “LOAD” is turned on in an initial stage of the operation. FIG. 8 shows an embodiment realized by selecting m₀=0. Reference numerals 800 and 805 respectively denote a first buffer and a (2^τ+1−1)th buffer.

[0113] In the present embodiment, the tap value selecting means 510 of FIG. 5 includes a lower tap value selecting multiplexer 810 and an upper tap value selecting multiplexer 815.

[0114] The lower tap value selecting multiplexer 810 selects one among the lower 2^τtap values p₀(i) (i=0, 1, . . . , 2^τ−1) by the pattern (b_k−1:k−τ) of the past τ bit transition absolute value. The upper tap value selecting multiplexer 815 selects one among the upper 2^τtap values p₀(i) (i=2^τ, . . . , 2^τ+1−1) by the pattern (b_k−1:k−τ) of the past τ bit transition absolute values.

[0115] The output value of the lower tap value selecting multiplexer 810 relates to the tap value when b_k+1=0. The output of the upper tap value selecting multiplexer 815 relates to the tap value when b_k+1=1.

[0116] In the present invention, the current transition multiplier of FIG. 5 includes a lower tap value current transition multiplier 820 and an upper tap value current transition multiplier 825.

[0117] The lower tap value current transition multiplier 820 selects the output value of the lower tap value selecting multiplexer 810 when a_k−1=0 and the value obtained by multiplying −1 with the output value of the lower tap value selecting multiplexer 810. The upper tap value current transition multiplier 825 selects the output value of the upper tap value selecting multiplexer 815 when a_k−1=0 and the value obtained by multiplying the output value of the upper tap value selecting multiplexer 815 with −1 when a_k−1=1. Namely, the lower tap value current transition multiplier 820 and the upper tap value current transition multiplier 825 perform the same operation as that of multiplying x_kwhen it is assumed that b_k=1 with the output values of the lower tap value selecting multiplexer 810 and the upper tap value selecting multiplexer 815. Therefore, the lower tap value current transition multiplier 820 and the upper tap value current transition multiplier 825 respectively output w_k(b_k=1,b_k+1=1)p₀and w_k(b_k=1,b_k+1=0)p₀.

[0118] Processes of renewing the tap values using the error value e_k−3by the 0th filter tap P₀are the same as those of FIG. 6.

[0119] Channel data for testing the performance of the present invention is generated as follows. The channel signal r_kwith respect to the binary data a_k=(+1, −1) and x_k=(a_k−a_k−1)/2 obtained by encoding a random binary data sequence to RLL(0,4/4) has a shape in which the gain g_kand the phase ε_kof the pulse h(t) are affected by data and white gaussian noise n_kis added. $\begin{array}{cc}{r}_k=\sum _{m=-N}^N{x}_{k-m}{g}_{k-m}h\left(\mathrm{mT}+{\epsilon }_{k-m}\right)+n_k& \left(29\right)\end{array}$

[0120] wherein, the pulse h(t) is

[0121] h(t)=[1+(2t/pw₅₀)²]⁻¹  (30)

[0122] wherein, pw₅₀designates the value of 2.5×(9/8). The size of the noise is defined as follows.

[0123] SNR_m𝑓b=E{[h(kT)−h(kT−T)]²}/E{n²_k}  (31)

[0124] In FIG. 9, the performance of a bit-error-rate (BER) of a conventional linear decision-feedback equalizer and a RAM-decision-feedback equalizer when τ=1 is compared with that when τ=2. Predictive DFE (4, τ=1) means that the respective filter taps four different values and are selected by the data value of future 1 bit and past 1 bit. Predictive DFE (8, τ=2) means that the respective filter taps have eight different values and are selected by the data value of future 1 bit and past 2 bits. According to FIG. 9, the performance of the present invention is much better than that of the conventional method.

[0125] According to the present invention, it is possible to effectively display the nonlinear distortion of the digital magnetic storing channel generated by the interaction between adjacent data and to remarkably reduce the modeling error compared with a conventional model in which the influence of the future bit cannot be considered, by displaying the nonlinear channel of a high density digital magnetic storing apparatus as transition pulses selected according to the pattern of the transition absolute value of the future v bits and the past T bits.

[0126] The model on which the present invention is based is mathematically induced. Accordingly, it is possible to obtain an optimized modeling error and to trade off performance and complexity of the desired model and equalizer in a given channel by appropriately selecting the v and τ values of the model.

[0127] In the model on which the present invention is based, when the v value is larger than 1, it is possible to detect the current data only after detecting the current and the v future data. When v=1, the current data can be easily realized by the threshold value detector on the basis of 0, using the characteristics of the channel and the model.

[0128] Also, the nonlinear equalizer according to the present invention is completely adaptively realized.