US 6,289,502 B1Grant

Model-based software design and validation

Issue Date:2001-09-11

•29 Claims

•17 Drawing Sheets

Abstract

A new computer language, which is based on a formal, mathematical state-machine model, and which is used both to validate and to generate code for a distributed system, in general, enables developing a system using multiple related system specifications, for instance, using system specifications at multiple levels of abstraction or using multiple system decompositions into parallel combinations of interacting systems, and allows use of validation tools to verify properties of these systems and their relationships. The language includes constructs for specifying non-deterministic actions, and for specifying constraints on those non-deterministic choices. Several well-defined sub-languages of the full computer language are also defined. These sub-languages are used to specify the input of some tools, in particular, of some code generators. One method for developing a software implementation of a distributed system using the present invention includes accepting a design specification for the distributed system, and applying a validation procedure to the design specification to verify that the system has desired properties. This validation includes applying a theorem proving procedure to the design specification. The method also includes applying a code generating procedure to the specification to generate multiple software implementations for components of the distributed system.

Metadata

Assignee

Massachusetts Institute of Technology

Inventors

Stephen J. Garland
Nancy A. Lynch

Application Information

Application Number:US 09/052,396

Filing Date:1998-03-30

Priority Date:1997-09-26

Art Unit:7

Classifications

IPC:

G06F 945

Field of Search:

395702395701717 1717 2

Patent Drawings (17 sheets)

Description

[0002] This application is a continuation-in-part of U.S. Utility Application Ser. No. 08/938,103, filed on Sep. 26, 1997, now abandoned and also claims priority from U.S. Provisional Application Ser. No. 60/060,196, filed on Sep. 26, 1997. Utility Application 08/938,103 and Provisional Application 60/060,196 are incorporated herein by reference.

Background

[0004] The invention relates to software design and validation.

[0005] An important aspect of software development involves validating that an implementation of a design will function correctly and have desired operating properties. Over time, software systems have become increasingly complex and validation of these systems has become increasingly difficult. This is particularly true of distributed systems that are formed from multiple interacting and asynchronously operating components. Distributed systems include not only physically distributed architectures in which components execute on physically separated computers coupled by communication paths, for example, over data networks, but also include architectures in which multiple components execute on a single computer and are controlled as distinct tasks (e.g., processes or threads). In order to validate such software systems, ad hoc approaches to testing cannot in general be relied on due to the complexity of the overall system.

[0006] Formal specifications for abstracted designs of software systems have been used to validate properties of the abstracted designs. One approach to specifying such designs uses the formalism of Input/Output (I/O) Automata, as described in Chapter 8 of the textbook, Distributed Algorithms,by Nancy Lynch (Morgan Kaufmann Publishers, 1996, ISBN 1-55860-348-4), which is incorporated herein by reference. An I/O automaton is a labeled transition system model (i.e., a state machine with labeled state transitions) for one or more components of a system, and can be used to model components of an asynchronous concurrent system.

[0007] One method of validating properties of a system design, in particular of system designs specified using I/O automata, uses a theorem proving approach. In such an approach, properties of the system design that are to be validated are expressed as logical assertions (predicates), and underlying statements about the system design are expressed as logical axioms. The axioms generally relate to the detailed operation of the system, while the assertions relate to the overall aspects of its desired behavior. A user then verifies by hand that the properties are necessarily true given the axioms, or may possibly use a user-assisted program, such as a theorem proving program, to aid in this verification.

[0008] Other methods for validating system properties can also be used. One approach, known as “model checking,” is based on exhaustive checking of all states in an instance of a system design in which the size of the system (i.e., the number of states) is restricted. Another approach is based on simulation of the operation of the system, in which a typically more complex (e.g., larger number of states) instance of the system is checked by examining a sample sequence of states or of transition labels (“actions”) resulting from execution of the system.

Summary

[0009] The present invention uses a new computer language which is based on a formal, mathematical state-machine model, and which is used both to validate and to generate code for a distributed system. In general, use of this new language enables developing a system using multiple related system specifications (i.e., precise descriptions), for instance, using system specifications at multiple levels of abstraction or using multiple system decompositions into parallel combinations of interacting systems, and allows use of validation tools to verify properties of these systems and their relationships. The language includes constructs for specifying non-deterministic actions, and for specifying constraints on those non-deterministic choices. Several well-defined sub-languages of the full computer language are also defined. These sub-languages are used to specify the input of some tools, in particular, of some code generators.

[0010] In one aspect, in general, the invention is a method for developing a software implementation of a distributed system. The method includes accepting a design specification for the distributed system, including accepting specifications of multiple state machines, and accepting a specification of desired properties of the state machines. The method also includes applying a validation procedure to the design specification to verify that the state machines have the desired properties, including applying a theorem proving procedure to the design specification, and also includes applying a code generating procedure to the specifications of the state machines to generate multiple software implementations for components of the distributed system.

[0011] The invention can include one or more of the following features.

[0012] The state machines can include node state machines and channel state machines, and applying the code generating procedure to the specifications of the state machines can include, for each of the node state machines, applying a translation procedure to the specification of the node state machine to generate a software implementation of that node state machine.

[0013] The specification of each state machine can include a specification of a multiple state variables, the values of which determine the state of the state machine, and also include a specification of multiple state transitions. Each specification of a state transition includes a specification of values of the state variables in a state in which the transition can be taken, and a specification of an effect on the values of the state variables when that transition is taken. Furthermore, the specification of the effect on the values of the state variables can include an instruction to set one of the state variables to a non-deterministic choice of values, as well as a logical constraint on the values of the state variables resulting from taking the transition.

[0014] The specifications of the properties of the state machines can include a logical assertion involving states of the state machines.

[0015] The step of applying the theorem proving procedure to the design specification can include translating the design specification into a logical language of a theorem prover and providing the translated design specification to a theorem prover, such as a software based theorem proving program. The theorem prover can be an equational theorem prover.

[0016] Applying the validation procedure can include applying a simulation procedure to one of the state machines, including determining a sequence of states of the state machine, and verifying one of the desired properties in each of the sequence of states. Applying the validation procedure can further include applying a model checking procedure to one of the plurality of state machines, including enumerating the states of the state machine, and verifying one of the desired properties in each of the enumerated states. Applying the validation procedure can also include deriving a second design specification from the accepted design specification, wherein the derived design specification has a property, such as deterministic behavior or specification using a single state machine, that the accepted design specification does not have, and then applying a second validation procedure to the derived design specification.

[0017] In another aspect, in general, the invention is a method for developing a software implementation of a distributed system. The method includes accepting a first design specification including accepting specifications of a first set of state machines, and accepting a specification of a first set of desired properties of the first set of state machines. The method also includes applying a first validation procedure to the first design specification to verify that the first set of state machines has the first desired properties, including applying a theorem proving procedure to the first design specification. The method also includes accepting a second design specification, including accepting specifications of a second set of state machines, and accepting a specification of a desired relationship between the first set of state machines and the second set of state machines. The method further includes applying a second validation procedure to the second design specification to verify that the first set of state machines and the second set of state machines have the desired relationship, and for each of the second set of state machines, applying a code generating procedure to the specification of the state machine to generate a software implementation of that state machine.

[0018] This aspect of the invention can include one or more of the following features.

[0019] The method can further include the step of refining the first design specification to yield the second design specification, for example, by expressing the specification of the second set of state machines using a restricted sublanguage of the language used to express the specification of the first set of state machines. The first set of state machines can include a specification of non-deterministic behavior of the state machines, and the restricted sublanguage does not permit specification of non-deterministic behavior.

[0020] Accepting a specification of a desired relationship between the first set of state machines and the second set of state machines can include accepting a desired relationship between a first one of the first set of state machines and a second one of the second set of state machines, including accepting an association of the states of the first state machine and states of the second state machine, and accepting an association of state transitions of the first state machine and sequences of one or more state transitions of the second state machine.

[0021] In another aspect, in general, the invention is software stored on a computer readable medium including instructions for causing a computer to perform multiple procedures, each of the procedures including accepting a design specification for a distributed software system, the design specification including a specification of a plurality of state machines, and a specification of desired properties of the state machines, wherein the multiple procedures include a theorem proving procedure for verifying that the plurality of state machines has a desired plurality of properties and a code generator for translating the design specification into a plurality of software implementations for components of the distributed software system.

[0022] In yet another aspect, in general, the invention is a system for iterative development of a software implementation of a distributed system, including a means for accepting a first design specification for the distributed system, wherein the first design specification includes specifications of a first plurality of state machines, and includes a specification of desired properties of the plurality of first state machines. The system also includes a means for verifying that the first state machines have the desired properties, a means for accepting a second design specification, wherein the second design specification includes specifications of a second plurality of state machines, and includes a specification of a desired relationship between the first plurality of state machines and the second plurality of state machines, a means for verifying that the first plurality of state machines and the second plurality of state machines have the desired relationship, and a code generator for producing a plurality of software implementations of components of the distributed system from the specifications of the second plurality of state machines.

[0023] An advantage of the invention is that it allows software developers to produce implementations of distributed software designs with significantly fewer defects than typically possible with previously available techniques.

[0024] Another advantage of the invention is that errors introduced during manual translation of a system specification are reduced. In a prior approach, a specification of an abstracted system design is first developed and this abstract design is then validated. However, the implementation of that design then requires a manual phase including translation into a specification of an implementation of the design in a target computer programming language. Establishing that the final implementation exhibits the same essential properties as the abstract design is not straightforward due, at least in part, to the possibility of errors being introduced in the manual translation phase. In another prior approach, an implementation in a target computer language (e.g., C++) is first developed. This implementation does not require any further manual translation steps where errors may be introduced. The specification in this computer programming language is not well matched as an input to validation tools, and therefore, manual steps may be needed to adapt the specification in the computer programming language to a form that is well matched to validation tools. However, such a manual step puts in question the relationship of the input to validation tools and the implementation of the system, due in part to the possibility of errors being introduced. An advantage of the present invention is that if a final manual translation step is needed before automatic translation or code generation, the specification that results form the final manual translation step can be used as an input to validation tools, such as a theorem prover, model checker, or simulator, in addition to as input to translation or code generation tools which produce software in computer programming languages which can be interpreted, executed directly, or compiled to executable forms. As the same final specification is input to both the validation tool and the translation tool without any additional manual translation step that cannot be easily validated, validity of the final implementation is significantly more certain.

[0025] Another advantage of this invention is that it enables use of multiple related design specifications, for example some being refined versions of others. The software developer can validate relationships between the specifications, for example, that they exhibit the same external behavior. This allows developing a series of refined specifications, and validating the refinement steps themselves. The final specification may have characteristics that allow straightforward translation into the target language, while earlier specifications in the series may have characteristics that allow straightforward validation of particular properties. For example, a required property of a system can be established using an abstract specification, and a final detailed specification can be shown to be related to that abstract specification in a way that guarantees that the required property is still satisfied by the detailed specification. This indirect approach is, in many instances, significantly simpler than the alternative of establishing the required property based on the detailed specification alone.

[0026] Another advantage of the invention is that it enables use of multiple design specifications using various decompositions into sets of parallel interacting systems. In a similar manner as in the use of multiple refinements of a system specification, multiple decompositions can allow validation of properties using particular decompositions, and validating the relationships between decompositions. For example, one specification can be in terms of a single autonomous system while another can be in terms of several interacting systems, and, using this invention, a property can be established for the autonomous system and the interacting systems can then be shown to formally implement the single autonomous system. Furthermore, in a final decomposition, some of the parallel interacting systems can correspond to systems, such as communication systems or services, that are provided by the hosting software environment (e.g., operating systems) for the implementations of the other component system.

[0027] Another advantage of the invention is that it allows using multiple design specifications where one specification can use all the features of a specification language while a second specification uses a restricted sub-language. The full specification language is more expressive than a restricted sublanguage. However, use of a restricted sub-language has the advantage that automated code generation, simulation, and model checking can be easier, for example, due to some expressive elements of the full language that may be difficult to translate or to simulate being omitted from the restricted sublanguage. Developing two specifications and establishing an explicit relationship between them provides advantages of both an expressive language as well as an easily translated language, which would have been unachievable with a single specification in a single language.

[0028] Another advantage is that implementations using different target computer programming languages can be verified to have the same or related properties.

[0029] Other features and advantages of the invention will be apparent from the following description, and from the claims.

Description of the Drawings

[0030] FIG. 1A is a development computer used by a user to develop software for execution on multiple processing nodes;

[0031] FIG. 1B is a flow diagram including elements of a user specification and tools used to process the specification to produce a system implementation;

[0032] FIG. 2ais a structure of an I/O automaton;

[0033] FIG. 2bis a structure of a specification of a primitive I/O automaton;

[0034] FIG. 3 is an illustration of an association of an automaton transition and an sequence of automaton transitions in a simulation relationship;

[0035] FIG. 4 is a structure of a specification of a composite I/O automaton;

[0036] FIG. 5 is an input and output structure of a composer;

[0037] FIG. 6 is an input and output structure of a theorem prover;

[0038] FIG. 7 is an input and output structure of an invariant theorem prover;

[0039] FIG. 8 is an input and output structure of a paired theorem prover;

[0040] FIG. 9 is an input and output structure of a simulator;

[0041] FIG. 10 is an input and output structure of a model checker;

[0042] FIG. 11 is an input and output structure of code generators;

[0043] FIG. 12 is two processing nodes executing node and channel software;

[0044] FIG. 12A is a flowchart of a successive refinement software development procedure;

[0045] FIG. 12B illustrates a successive decomposition procedure; and

[0046] FIGS. 13(a)-(e) is a series of system specifications using abstract and real channels.

Description

[0047] Referring to FIG. 1A, a user 50, a software developer or designer, develops software using a development computer 60. Development computer 60 includes a processor 62 coupled to a user interface 63, such as a graphical display, keyboard, and mouse, through which user 50 interacts with the computer. Development computer 60 also includes a storage device 64 that includes specification storage 65, tools storage 66, and implementation storage 67. Rather than including storage device 64, development computer can alternatively use other storage systems, such as storage accessible through a network interface 69. Specification storage 65 includes storage for the specification of the system being developed by the user, for example, multiple text files in a computer file system. Tools storage 66 includes storage for procedures or tools that can be executed on processor 62. User 50 can invoke these tools through user interface 63. Tools can be stored as executable files (that is, files containing instructions that can be executed directly by processor 62), or can include instructions that can be interpreted or executed using another program such as a programming language interpreter, or a virtual machine (such as a Java Virtual Machine). Using these tools, user 50 creates a software implementation that is stored in implementation storage 67. Portions of this software implementation are transferred to typically multiple processing nodes for execution, shown in FIG. 1A as processing nodes 70 and 80. If necessary, the software implementations are compiled into machine instructions prior to or after transfer to the processing nodes. Node software 71 and 81 is executed on processors 72 and 82. In this illustration, processors 72 and 82 on processing nodes 70 and 80 are coupled through communication interfaces 73 and 83, for example, data network interfaces. Development computer 60 can also include a removable storage device 68, such as a CD-ROM, for providing development tools that are then stored in tool storage 66. These tools could equivalently be provided to development computer 60 over a data network or some other communication interface.

[0048] Referring to FIG. 1B, user 50 (shown in FIG. 1A) produces a user specification 100, written in a new computer programming language, IOA (an acronym for “Input Output Automata”). User specification 100 is stored in specification storage 66 (shown in FIG. 1A). User specification 100 describes a distributed system, its components, and logical statements about the system and its components. The same user specification 100 is processed by a set of development tools, including both code generators 110 and validation tools 120, to produce a system implementation 130, for example source code in a high-level programming language, and validation output 140, respectively. A manual “IOA: A Language for Specifying, Programming, and Validating Distributed System” is included as Appendix A of this description.

[0049] In this embodiment, user specification 100 includes a set of text files, stored on a computer file system accessible to a development computer used by the user for software development. Each text file provides a portion of user specification 100, for example, the specification of one component of the system. The user edits these text files using a standard text editing program. After creating or modifying one or more of these specification text files, the user can use a development tool to process the text files. A development tool is a program, which when executed, on the development computer, inputs specification text files and produces an output such as text messages for presentation to the user, a translation of the specification text files into an implementation using another computer language, or a new derived specification in the IOA language then becomes part of the user specification. Some development tools are interactive in that they carry out a series of exchanges with the user, each of which can include an output or message to the user and an input from the user in return. Alternative embodiments use other approaches to storing the components of a user specification, and for invoking development tools. For instance, an integrated software development environment, similar to development environments available for programming in programming languages such as C, C++, or Java, can provide a user interface that is used to manage the user specification and to invoke tools and procedures at the user's command.

[0050] In general, user specification includes multiple components, namely I/O automata specification 102, and one or both of invariants specification 104 and simulation relations specification 106. I/O automata specification 102 includes descriptions of typically multiple I/O automata that together describe the behavior of the distributed system. Invariants specification 104 include a set of desired invariant properties of the automata in I/O automata specification 102 expressed as logical statements (i.e., assertions or predicates that should be true in all states of the automata). These invariant properties relate, for example, to desired operating characteristics of the distributed system. The third component, simulation relations specification 106, includes desired relationship properties between automata in I/O automata specification 102. Relationship properties can include, for example, properties that can establish that one automaton formally implements another. Validation of such simulation relationship properties allows, for example, a user to use an iterative design approach while ensuring that each iteration of the design is appropriately related to the previous iteration.

[0051] Code generators 110 and validation tools 120 also make use of data type definitions 190 and library specifications 180 which can be provided by the system, and augmented by the user. As is described more fully below, such library specifications can be used to describe system components that are implemented within the hosting software environments (e.g., operating systems) in which the final implementation is executed.

[0052] Data type definitions 190 specify a set of data types that are used in user specification 100. Each data type is characterized by a set of allowable values and a set of operations that use or produce values of that data type. Data types are defined algebraically using equational axioms, data type axioms 194 involving data values produced using various operations. Data type axioms 194 include logical statements about properties of those operations using those data types. Data type definitions 190 also include data type implementations 192, which include procedural specifications (e.g., sequences of Java statements) of various operations using those data types. Data type definitions 190 are used by validation tools 120, which use data type implementations 192 for procedural specifications needed, for example, for simulation of an automaton, and use data type axioms 194 for logical properties needed, for example, for logical reasoning about properties of automata. Data type implementations 192 are also used by code generator 110 to supplement the built-in data types supplied by target programming languages in which the output of code generators 110 is specified. In this embodiment, data type implementations 192 are written manually, in such a was as to be consistent with data type axioms 194. In alternative embodiments, data type implementations 192 can be determined automatically from data type axioms 194.

[0053] System implementation 130 includes user software 132 produced by code generators 110 by processing I/O automata specification 102. System implementation 130 also includes library software 134. Such library software can include, for example, software services (e.g., TCP/IP) that are provided by a hosting operating system environment (e.g., one or more cooperating Unix operating systems) on which user software 132 can execute. User software 132 can include instructions in a high level programming language, such as C, C++, or Java. Such a high level programming language implementation must in general be compiled into machine instructions for the target processor before execution. In alternative embodiments, code generators 110 can produce lower-level instructions directly, for instance producing “byte compiled” instructions for execution by a Java Virtual Machine.

[0054] A library specification 180 includes I/O automata 182 that are related to library software 134. I/O automata 182 are not in general used to generate library software 134 as the library software is available in the hosting environment. However, I/O automata 182 are needed in order to validate properties of user specified I/O automata specification 102. Therefore I/O automata 182 characterize “essential” properties of library software 134, but do not necessarily specify the detailed behavior of library software 134.

[0055] Validation tools 120 can require user input 150. For instance, some tools require guidance from the user for their successful or efficient operation. A user can also provide user input 150 based on validation output 140 of validation tools 120.

[0056] Other software development tools can also be used during the software development process. For example, transformation tools 160 take input from user specification 100 and add to or modify the user specification. Other tools 170 can be used for other automated processing of user specification 100, for instance, creating formatted printed version of user specification 100.

[0057] Validation tools 120 include a variety of verification and analysis tools (i.e., programs that take system specifications as input and produce output based on the inputted specifications). Several of the tools are built around existing core tools. In these cases, the validation tools typically includes a preprocessor that accepts a specification in the IOA language and produces an equivalent specification in the language of the core tool. A post-processor may also be used to process the output of the core tool so that it is expressed in terms of the original IOA specification input by the pre-processor. A preprocessor can be a separate program that takes an IOA specification and outputs a specification in an appropriate syntax for a core tool. Based on the description of the IOA language, and the requirements of the existing core tools, a person of ordinary skill in the art can implement such pre- and post-processors. Validation tools 120 include a theorem prover 122, a simulator 126, and a model checker 124. In general, theorem prover 122 determines whether properties of user specification 100 are satisfied, based on a process of logical reasoning, simulator 126 determines whether these properties are satisfied based on sample executions of a system described in user specification 100, and model checker 124 determines whether these properties are satisfied based on exhaustive examination of possible states of a system described in user specification.

[0058] Based on the properties specified by a user in invariants specification 104 and simulation relations specification 106, and validation output 140 produced using validation tools 120, the user can create user specification 100 such that the resulting system implementation 130 has a high certainty of satisfying its desired properties.

[0059] User specification 100 is written in the new IOA computer programming language. The IOA language is based on the I/O automaton model. Referring to FIG. 2a,viewed abstractly, an I/O automaton formally includes actions 220, states 210, which can include an explicit include a set of starting states, transitions 230, and tasks 240, which are subsets of actions. Referring to FIG. 2b,the IOA language includes a syntax for a primitive automaton specification 245 which is used to specify the actions, states (and start states), transitions, and tasks of an I/O automaton in terms of a signature 260, a state definition 250 (including initial values 254), transition definitions 270, and task definitions 280.

[0060] States 210 includes a possibly infinite set of states (i.e., characterizations of past executions which determine future behavior) of the automaton. State definitions 250, a component of specification 245, provides a concise specification of states 210 and includes a specification of a set of state variables, including variable names 252, variable data types 253, and, optionally, initial values 254 for the state variable. Each state of states 210 corresponds to a particular assignment of values to all the state variables. States 210 includes a subset of one or more initial states 214 in which the automaton can begin execution. If initial states 214 includes more than one state, then any of those states can be non-deterministically chosen to start an execution. State definitions 250 includes a specification of the initial states using initial values 254 for the state variables. If initial values 254 are not specified, then any state can be chosen non-deterministically to be the initial state of an execution sequence. Initial values 254 can include initial assignment statements that set state variables to definite values. Initial assignments can also set state variables to explicitly non-deterministic values, or to values specified axiomatically. An initial assignment can use a “choose . . . where” construct of the IOA language in which the assigned value is a non-deterministic choice from a definite non-empty set of values such that the chosen value satisfies the “where” predicate. Multiple assignments using “choose” constructs (with or without “where” predicates) can also be modified by a “so that” predicate. This form of explicit non-deterministic assignment is similar to the “choose . . . where” construct except that the “so that” predicate is applied to all the assignments at once, rather than to individual assignments as with a “where” predicate.

[0061] Actions 220 is a set of named events associated with changes of state of an I/O automaton. This set is partitioned into internal and external actions, and external actions are either input or output actions. In general, when executed, an I/O automaton reacts to its input actions and, as a consequence of making transitions between states, produces output actions. Externally visible behavior of an I/O automaton can be characterized by a set of traces, each of which is a sequence of external (input and output) actions of a single execution of that automaton.

[0062] Signature 260 includes specifications of input actions 262, output actions 263, and internal actions 264. Each action is named, and can have one or more typed parameters. The parameter values can also be constrained using a “where” predicate which must be satisfied for each choice of parameter values. One action specification in signature 260 can, using parameters, therefore correspond to a subset of more than one of actions 220, one action for each allowable set of values of the parameters.

[0063] Transitions 230 includes a set of (pre-state, action, post-state) tuples which together define the set of state sequences allowed by automaton 200. Every transition from a pre-state to a post-state is associated with an action, which is either an input, an output, or an internal action. A requirement of I/O automaton 200 is that it is input enabled, that is, for every state, there is a transition from that state for every input action. A representative transition tuple 232 includes a pre-state s₁212, an action π 232, and a post-state s₂213.

[0064] Transition definitions 270 includes a set of individual transition definitions 272. A transition definition provides a shorthand notation that is used to define a possibly large set of individual transitions. A transition definition 272 is named, and can be parameterized by one or more variables, where the variables are specified to be of particular data types and can be constrained to take on particular allowable values (for example, using a “where” predicate on the entire set of parameter values). A transition definition can be specified using an operational style, an axiomatic style, or a combination of the two. Each transition definition includes a triple (precondition 274, action 275, effect 276). A precondition is a logical expression typically involving one or more state variables that defines a subset of states, the allowable pre-states, in which the expression evaluates to a true value. No explicit precondition is allowed for an input action as input actions are enabled in all states. Action 275, which can correspond to input, output, or internal actions, identifies actions defined in signature 260 that are permitted to occur (are enabled) in any of the allowable pre-states defined by precondition 270. Action 275 is named and can be parameterized by parameters of the transition definition. Effect 276 of the transition definition 272 specifies the resulting post-states. Effect 276 is a code fragment associated with the transition. This code fragment is similar to a traditional program in a simplified sequential programming language and is specified as a sequence of operational statements consisting of (possibly non-deterministic) assignments, conditionals, and simple bounded loops. Non-deterministic assignments can be used to specify a post-state of a transition in an axiomatic style, for example, using the “choose . . . so that” construct. The predicate of such a “choose” statement can involve the values of state variables both before and after the transition is take, indicated syntactically using a prime after a variable name to signify a value in a pre-state. As introduced above, a transition definition can be parameterized using parameters that also parameterizes the corresponding action. A parameter of a transition definition can also be a “choose” parameter. Such a choose parameter is not a parameter of the actions of the transition definition, but rather is used to constrain the relationships of pre-states and post-states by being used in the specification of the precondition as well as in the effect. During execution, effect 276 is intended to be executed atomically, that is with no interruption by execution of a code fragment of another transition, or another instance of the same transition.

[0065] Tasks 240 include disjoint sets of non-input actions. Tasks can be thought of an abstract description of “threads of control” within the automaton, and can be used in reasoning about fairness of execution of an automaton with respect to these tasks and used as a basis for time performance analysis. Task definitions 280 can include individual task definitions 282 each of which identifies a subset of actions defined in signature 260.

[0066] Primitive automaton specification 245 can also include parameters 248, thereby providing a shorthand for specification of multiple I/O automata 200. The parameters of the I/O automata can be used in the definitions of their constituents, such as the states or actions. One example of use of a parameter of an automaton is in determining the size of the automaton. For example, in an automaton describing a queue, an automaton parameter can be the size of the queue. Another use of automaton parameters is to identify instances of an automaton that execute of different nodes of a distributed system.

[0067] A pair of I/O automata can be formally related by an “implementation” relationship. This implementation is based on the set of sequences of external (input or output) actions, called traces, that can result from execution of each of the automata. One automaton A implements a second automaton B if each trace of A is a member of the trace set of B. I/O automata can also be related by a “simulation” relationship. A simulation relationship between A and B provides a correspondence between states of A and states of B and, in addition, provides a detailed correspondence of each possible state transition of A to a sequence of zero or more state transitions of B. Establishing a simulation relationship between two automata can be used as a sufficient condition to establish an implementation relationship between those same automata.

[0068] Referring again to FIG. 1, in order to ascertain that an automaton has a set of desired properties, a user of the system specifies invariants specification 104. Invariants specification 104 includes sets of invariant properties, or assertions, each associated with an I/O automaton in I/O automata specification 102. An invariant property of an I/O automaton is a logical statement that the user desires to be true in all reachable states of that automaton.

[0069] A user may also want to ascertain that two automata that he has specified are related, for example, that one implements the other. As will be discussed more fully later, establishing such implementation relationships is important in a process of iterative refinement of a system design. The user can provide a simulation relationship in simulation relations specification 106 that is associated with two automata, A and B, in I/O automata specification 102. A simulation relationship R can be specified in terms of either a forward or a backward simulation. In the case of a forward simulation, the user first specifies a simulation relationship R, which includes a set of pairs of reachable states, each of the pairs including one state from A and one state from B. Referring to FIG. 3, for all pairs of states, one from automaton A and one from automaton B, that belong to relationship R, (s_A, s_B)ε R, and for every transition (s_A,π,s_A′) 310, the user provides an association of that transition to a deterministic sequence of transitions of B 320a-cthe first of which starts in state s_B. For the simulation relationship to be valid, the final state s_B′ reached after the sequence of transitions of B must also satisfy (s_A′, s_B′)ε R and the sequence of external actions must be the same as π (that is, if π is an external action then there is exactly one external action, π, and any other actions are internal, otherwise if π is an internal action, the entire sequence of actions of B is made up of internal actions).

[0070] In specifying a simulation relationship, the user associates each transition defined by a transition definition of A with a sequence of transition definitions of B. The effect portion of the transition definitions of B can include non-deterministic assignments to state variables, as illustrated by transitions 321a-c.The user specifies code that resolves the non-determinism.

[0071] The case of backward simulation is similar, except that for all (s_A′, s_B′)ε R, and for every transition (s_A,π, s_A′) defined by a transition definition of A, the user provides an association of that transition to a sequence of transitions of B the last of which ends in state s_B′. For the simulation relationship to be valid, the initial state s_B′ from which the sequence of transitions of B starts must also satisfy (s_A, s_B)ε R and the sequence of external actions must be π.

[0072] I/O automata specification 102 in user specification 100 can be primitive, or can be formal parallel compositions of other automata in I/O automata specification 102 or in library I/O automata 182. Referring to FIG. 4, a composite automaton specification 400 includes references to other constituent automata 420. Actions in the constituent automata are matched by name and parameter values, and these matched actions are assumed to occur simultaneously in execution. For instance, an output action of one automaton can be matched with an input action of another automaton with the same name and parameter values. Like specifications of primitive automata, specifications of composite automata can similarly include parameters. In addition to composition of multiple automata, a hiding operator allows for the explicit hiding of output actions by reclassifying them as internal actions.

[0073] Tools, including transformation tools 160, validation tools 120, and code generators 110, are executable programs or procedures that, in general, can be invoked by the user in the course of developing an implementation. In general, the tools include a first stage that parses an input specification written in the IOA language, checks the syntax and static semantics, and creates an internal representation of the IOA specification in its working memory. The tools can be written in the Java programming language.

[0074] Referring to FIG. 5, transformation tools 160 (FIG. 1) include a composer 500. Composer 500 takes as input a specification of a composite automaton C 510, and specifications of all the other primitive automata that make up C, illustrated as automata A 512 and B 515. Composer 500 produces a specification of a primitive I/O automaton P 520 with explicit representation of its actions, states, transitions, and tasks. In the specification of the output primitive automaton P 520, the name of a state variable that arises from a particular constituent automaton is prefixed with the name of that automaton. In systems that are described using several applications of the composition operator, the technique of prefixing variable names with automaton names can lead to long prefixes. Prefixes can be abbreviated, as long as no ambiguity is introduced. The input to the composer is supposed to be a compatible collection of automata. For example, the constituent automata should have no common output actions. This compatibility is checked by other tools. For instance, in simple cases, a static semantic checker can determine that there are no common output actions. In more complicated cases, a theorem prover can be used. In addition, composer 500 accepts invariants I_A542 and I_B545 associated with the constituent automata and computes I_P560 in terms of the state variables of the newly constructed primitive automaton P 520.

[0075] Referring to FIG. 6, theorem prover 122 can operate in a variety of modes, including as an invariant theorem prover 610 and as a simulation relation theorem prover 620. As is described more fully below, these modes share a common core theorem prover, but apply different preprocessors to user specification 100 to drive the core theorem prover. Invariant theorem prover 610 takes as input a specification of an I/O automaton A 630, a specification of invariants I_A640 associated with A, and data type axioms 194. Simulation relation theorem prover 620 takes as input the specifications of two I/O automata A 630 and B 632 as well as a specification of a simulation relation S 650 between A and B. Simulation relation theorem prover 620 also takes as input data type axioms 194. Validation output 140 includes theorem prover output 660. Theorem prover output 660 can include a declaration that invariant I_A640 or simulation relation S 650 are satisfied. User input 150 can be provided to theorem prover 122, for example to provide suggestions regarding proof strategies. Theorem prover 122 can be operated in an interactive mode in which a user provides user input 150 in response to theorem prover output 660. Theorem prover output 660 can also provide information to the user if the invariant or simulation relation is not satisfied. The user can use this information to amend user specification 100, for example by amending a specification of an I/O automaton, or amending a specification of an invariant or simulation relation.

[0076] Referring to FIG. 7, invariant theorem prover 610, an operating mode of theorem prover 122, includes modules which implement several processing steps. Automaton preprocessor 710 can take a specification of I/O automaton A 630 and convert it into a form amenable to a core theorem prover, in this embodiment, a Larch Prover 730 which accepts input in the Larch Specification Language (LSL). LSL allows statements in first-order logic, that is statements can express quantification such as “for all x” and “there exists x”, over individual elements but not over sets of elements.

[0077] Automaton preprocessor 710 takes the specification of automaton A 630, which can make full use of the features of the IOA language, into a form that is usable by the theorem-prover. This form is a mathematical description of the underlying automaton, giving its actions, states (and start states), transitions, and tasks explicitly, in basic logical notation. Each transition definition is translated into a logical relation between pre- and post-states in the form of Larch equational axioms. States of automaton A 630 are defined in terms of state variables, and the data types of those state variables are defined axiomatically, thereby allowing an axiomatic statement of the result of executing the code fragment in the effect portion of a transition definition. For a transition definition whose effect part consists solely of a “so that” statement, the translated representation corresponds exactly to the predicate in the “so that” statement. That is, if the effect is already specified axiomatically, no further translation is needed. If the effect part is a more complex code fragment, for instance including conditional statements and loops, the relationship between pre- and post-states is built up incrementally. Instances of assignment statements, choose statements, conditional statements, and loops are all replaced by constraints expressed as equations. If the effect also includes a “so that” condition, this condition is conjoined with the result of the incremental procedure. The result of processing the transition definitions is output by automaton preprocessor 710 as axioms 720. In addition, data type axioms 194 are used to supplement the axioms derived from the automaton specification.

[0078] The assertions in invariant I_A640 are processed by an invariant preprocessor 740 to form a set of proof obligations 750. For each assertion in invariant I_A640, there are two proof obligations: that the assertion is true in all start states, and that the assertion is preserved by all transitions. Automaton preprocessor 710 can also generate implicit proof obligations directly from the specification of automaton A 630. For example, the requirement that a set used in a “choose” construct is always non-empty is an implicit requirement of the language that can be expressed as a proof obligation and verified using Larch Prover 730. Invariant processor 740 can also output proof strategies 760. These strategies are used by Larch Prover 730 to aid its execution. Proof strategies 760 can also be augmented directly from user input 150. The user can suggest what axioms and previously-proved consequences are likely to come in handy in which parts of the proof.

[0079] Larch Prover 730 tries to make the connection between axioms 720 and the goal statement in proof obligations 750 by showing that the proof obligations follow as a consequence of the axioms. It does this, basically, by performing algebraic substitutions. It uses the axioms and the laws of logic to expand and simplify the statements to be proved, to formulate subgoals whose proofs would be sufficient to establish the statements to be proved, and to prove additional consequences of the axioms, which may be useful in proving the statements and the subgoals. Larch prover 730 performs these operations using the aid of proof strategies 760. Theorem prover output 660 can include validation that all the proof obligations 750 are satisfied, and can provide feedback to the user if it cannot determine whether an assertion is true or not. In the latter case, the user can provide further input to proof strategies 760 in order to help Larch Prover 730 to reach a definite conclusion.

[0080] In other embodiments, other existing theorem-proving programs such as PVS, HOL, Isabelle can be used. These alternative theorem provers work similarly to Larch prover 730, but may have input languages that are more expressive or less expressive, and may use different strategies in trying to prove the consequences. They all accept user interaction.

[0081] Referring to FIG. 8, simulation relation theorem prover 620, a second operating mode of theorem prover 122, can take as input the specifications of two I/O automata A 630 and B 632 as well as a specification of a simulation relation S 650 between A and B. In this mode, automaton preprocessor 810 takes as input I/O automaton specification A 630 and I/O automaton specification B 632 and produces axioms 820. A simulation relation preprocessor 840 takes the specification of simulation relation S 650 and creates a set of proof obligations 850 and outputs proof strategies 860. Proof obligations 850 include obligations involving correspondence between initial states and obligations involving correspondence between steps. The latter obligations include assertions that the sequence of transitions of B corresponding to any transition of A are truly enabled, that the ending states of the corresponding sequence of transitions truly satisfy the simulation relation, and that the external behavior matches the external behavior of the transition of A. Axioms 820 are augmented by data type axioms 194 and proof strategies 860 are augmented from user input 150. Larch Prover 730 takes as input axioms 820, proof obligations 850, and proof strategies 860 and produces theorem prover output 660. As in the case of invariant theorem prover 610, theorem prover output 660 can be used by the user to suggest other proof strategies that the user provides through user input 150.

[0082] Theorem prover 122 can also be used in other modes to validate other inputs provided by the user in the course of using validation tools 120. For example, as is described further below, the user can provide help to simulator 126 in the form of a function that is supposed to indicate the next action to simulate. The theorem prover can be used to verify that the proposed action is enabled in the current state. In addition, theorem prover 122 can be used to prove facts about the data types defined in data type definitions 190.

[0083] Referring to FIG. 9, simulator 126 is used to establish the validity of invariants specification 104 and simulation relations specification 106. As with theorem prover 122, simulator 126 can operate in various modes, includes as an automaton simulator 910, in which invariants I_A640 associated with I/O automaton A 630 are validated, and as a paired simulator 920, which a simulation relation S 650 associated with I/O automata A 630 and B 632 is validated. In general, simulator 126 computes a sample execution of automaton A 630 and determines whether invariant I_A640 or simulation relation S 650 is satisfied at all states in that sample execution. If the specifications of automata A 630 or B 632 are parameterized, a particular set of parameter values must be chosen. Simulator 126 provides an efficient mechanism for testing an automaton with respect to the predicates that make up a set of desired invariant properties. If a predicate is found not to be true at a state in a sample execution, a counterexample to the predicate is immediately available.

[0084] Simulator 126 is not necessarily capable of simulating arbitrary I/O automata. As is described below, the system supports a user transforming the specification of an automaton into a restricted form suitable for simulation. One aspect of an automaton specification that must not be used in the specification of automaton A relates to non-determinism, including explicit non-determinism that arises from “choose” statements, “choose” parameters, and initial “choose” assignments, as well as implicit non-determinism that involves scheduling of actions when more than one action is enabled at a state. One approach to resolving the explicit nondeterminism specified by “choose” statements is for the user to provide a “chooser” function for each “choose” statement. This “chooser” function then provides a deterministic procedure for selecting from the set of choices specified by the “choose” statement, parameter, or initial assignment. Deterministic scheduling is accomplished by allowing at most one action (which must be a non-input action since the automaton is closed) to be enabled in any state. One approach to satisfying the deterministic scheduling requirement is for the user to provide an explicit “action selector” function for the automaton that identifies a transition definition and parameter values for the enabled non-input actions for each state of the automaton.

[0085] In addition to non-determinism, input I/O automaton A 630 is also assumed to be in primitive form (a single automaton, with explicit description of its actions, states, transitions and tasks), and “closed”, that is, it has no input actions. A user can use composer 500 (described previously and shown in FIG. 5) to convert a specification of automaton A into primitive form. Transformation tools 160 can also aid the user to provide explicit choices to replace non-deterministic choices in an automaton and theorem prover 122 can be used to verify that the functions used to make the deterministic choices satisfy any required constraints, such as those expressed by “where” and “so that” constructs. Also transformation tools 160 can identify states in which multiple actions are enabled. The user can then augment the state of the automaton to include new state variables containing scheduling information and use these new state variables in the precondition specifications of various actions. In order to “close” the automaton, the user can compose the automaton he wishes to simulate with an “environment automaton” that supplies inputs for the given automaton.

[0086] Data types are defined axiomatically in IOA, but in order to simulate the data type operations, simulator 126 needs actual code for those operations. Simulator 126 accepts as input data type implementations 192. The user assumes that this code implements the data type operations correctly.

[0087] With the requirements on the specification of I/O automaton A 630 satisfied, automaton simulator 910 starts at the unique initial state. Simulator 910 performs a loop where, in each iteration, it uses the user-provided function to determine the next transition definition and parameter values and then executes the effect part of that transition definition with those parameter values. Simulator 910 maintains copies of the automaton's state variables, and since the automaton is deterministic, each step in the iteration uniquely determines the next state.

[0088] Automaton simulator 910 verifies that all predicates in invariant I_A630 are true in all the states that arise in the simulated executions. This provides evidence that the predicate is in fact an invariant property of the automaton. Automaton simulator 910 can also provide some performance information, by calculating “times” at which events of interest occur. It can do this by using upper bounds, provided by the user, for the time for steps in each task of the automaton. An on-line calculation is then used to determine the greatest time at which each event can occur, subject to the task bounds.

[0089] Simulator 122 can also execute as a paired simulator 920. Paired simulator 920 is similar to automaton simulator 910, and I/O automaton A 630 must satisfy the same conditions that are needed for input to automaton simulator 910. As presented above in the discussion of simulation relation theorem prover 620, a simulation relation S 650 includes a deterministic sequence of transitions of I/O automaton B 632 for any transition of A 630. Paired simulator 920 therefore determines an execution of A in the same manner that automaton simulator 910 does. Then, for each transition in that simulated execution of A, paired simulator 920 determines the sequence of transitions of B that correspond to the simulated transition of A. If simulation relation S 650 is a forward simulation relation, then the user provides a deterministic choice for the starting state of B. Given the first simulated transition of A, simulation relation S 650 provides the deterministic sequence of transitions of B corresponding to that first transition of A. This results in B ending in a particular well-defined state. The next simulated transition of A again determines a particular sequence of transitions of B, and so forth. If S 650 is a backward simulation relation, then a finite length simulation of A is first executed. Then for the last state of A, a deterministic choice for a last state of B's execution is determined using a function provided by the user. Then, going back through the sequence of simulated transitions of A, for each transition of A corresponding deterministically chosen sequence of transitions of B is computed. In this way, the simulation relation can be verified for the simulated execution of A. While paired simulator 920 matches the steps of A and B, the simulator performs various tests, including checking that the preconditions of all the actions are satisfied (with the user-provided values replacing the “choose” parameters, checking that the user-provided values used in “choose” statements and initial assignments satisfy their “where” clauses and “so that” constraints, and checking that the execution fragment has the same external behavior as the given step. Note that once the step correspondence is established, these checks can be performed offline, rather than as the correspondence is computed. If the simulation relation is not satisfied, for example because the sequence of actions of B is not enabled at all states in the execution, simulator 126 provides information related to the simulated execution that lead up to the error.

[0090] Referring to FIG. 10, model checker 124, one of validation tools 120 shown in FIG. 1, is also used to determine whether an automaton satisfies properties specified by the user. Model checker 124 can determine whether invariants I_A1050 are satisfied for a primitive automaton A 1040. If A is parameterized, model checker 124 processes the specified automaton A for only one particular choice of parameters. For that automaton A model checker considers all reachable states in turn to determine whether all the properties specified in invariants I_A1050 are satisfied. If automaton A is parameterized, model checker 124 checks one instance of automaton A at a time. Unlike simulator 126 which considers a sample execution, model checker 124 considers all states. Therefore, the number of states must be small enough to allow this exhaustive search through the states to terminate is a reasonable computing time. Automaton A can be non-deterministic as all states are considered. In this embodiment, due to the capabilities of the core model checker described below, a restricted set of data types are allowed: integers, booleans, and arrays of integers or booleans.

[0091] Model checker 124 includes a preprocessor 1010 to process the specifications of automaton A 140 and invariants I_A1050 and to output model specification 1020. Model specification 1020 is used as input by core model checker 1030 which produces core model checker output 1035. A post-processor 137 takes this output, and model specification 1020 and produces model checker output 1060 in terms of the original specifications of automaton A 1040 and invariants I_A1050. In this embodiment, core model checker 1030 is a SPIN model checker, and model specification 1020 is specified in the Promela language. Output model specification 1020 includes an operational specification of automaton A 1040, and makes use of explicit constructs of Promela to express nondeterministic choices and atomic sequences of steps such as those implementing the effect part of a transition definition.

[0092] In order to prove that all predicates P in I_A150 are invariants of automaton A 1040, model checker 124 explores all the reachable states of A, verifying that all predicates P are true in each reachable state. Model checker 124 explores the states using a depth-first search. An allowable starting state is first chosen from the set of possibly multiple allowable starting states. Then, an allowable sequence of states is determined by model checker 124, at each state selecting an internal, input, or output action that results in reaching a previously unvisited state. At each state that is visited, model checker evaluates each of the predicates. If any of the predicates is not true, model checker 124 outputs the execution sequence leading up to that state. This execution sequence forms a counterexample to prove that the predicate does not define an invariant of the automaton. When no enabled action at a state would result in making a transition to a previously unvisited state, model checker 124 backtracks to a previous state in the execution for which an enabled transition would result in reaching a previously unvisited state. Ultimately, model checker 124 backtracks to the initial state and selects a previously unvisited starting state. Ultimately, all reachable states of the automaton are visited (for a sufficiently small finite-state automaton) and the predicates are proved to be true for all those reachable states, that is, the properties expressed by the predicates are invariant properties of the automaton.

[0093] If A has a sufficiently small number of reachable states and all predicates P express invariants of A, then this procedure terminates in relatively short amount of computing time and model checker output 1060 indicates that all predicates P are true in all reachable states. Even if A has too many states to visit within a reasonable limit on computation (or if the state space is in fact infinite), then model checker 124 can execute until a counterexample is found or a limit on execution time is reached (e.g., the user terminates the procedure). The counterexample associated with the predicate that was shown to be false can be used by the user to amend user specification 100.

[0094] Alternative searching strategies, other than depth-first search, can also be used. For example, searching techniques can make use of “symmetries” in the states of an automaton to concurrently test a predicate in multiple states of the automaton.

[0095] Referring to FIG. 11, code generators 110 (shown in FIG. 1) include one or more code generators, each for a different target programming language. In FIG. 11, two representative code generators, language #1 code generator 1110 and language #2 code generator 1112, are shown. A code generator processes a specification of an automaton and produces software in the target programming language. In FIG. 11, language #1 code generator 1110 processes automaton A 1120 and produces node A software 1130. Similarly, language #2 code generator 1112 processes automaton B 1122 and produces node B software 1132. In the illustrated example, automata A and B specify software that will execute on two distributed processing nodes, node A and node B.

[0096] Referring to FIG. 12, node A 1210 is linked to node B 1212 over a physical link 1220. Library channel software 1150 provides an interface to node A software 1130 and node B software 1132 that execute on nodes A 1210 and B 1212 respectively. Referring again to FIG. 11, system implementation 130 includes node A software 1130 and node B software 1132, as well as library software 134. Library software 134 is provided by the target software environments on nodes A and B, and includes channel software 1150. Library I/O automata 182 includes a specification of an automaton C 1140 that corresponds to channel C software 1150, however, a code generator is not used to generate channel C software 1150 from the specification of automaton C 1140.

[0097] In order to allow direct translation of an automaton specification into a target programming language (e.g., C++, Java), the input automata specifications must satisfy similar restrictions to those that are required for input to simulator 126. In this embodiment, an input automaton must be in primitive form, and be devoid of explicit and implicit nondeterminism. That is, an automaton specification must be essentially a sequential program consisting of non-input actions, and specifications of how to service input actions. Interaction with automata executing on other processing nodes is through communication channel software. This communication channel software provides interfaces to the communication channels represented by automata during the development process. A typical communication channel interface has “send” and “receive” interfaces which provide responses (return values) such as a an acknowledgment or a received message.

[0098] In this embodiment, another requirement is imposed on an input automaton to code generators 110. Stated in its strongest, simplest form, each automaton must be “input-delay-insensitive”, that is, its external behavior should not change if its input actions are delayed and reordered before processing. This restriction allows the code generators to output software that can introduce delays of input actions. If the input automaton is not input-delay-insensitive, then the actual running system may not truly implement the input automaton.

[0099] Code generator 192 uses portions of the same library of data type implementations 192 as simulator 126. For each node automaton, the code generator translates the IOA code into a C++or Java program that performs a simple loop, similar to the one performed by the simulator. Note that correct atomicity requires that the effect part of each transition be done without interruption, even if inputs arrive from the external user or from the communication service during its execution. In this embodiment, the software generated by the code generators buffers inputs, and examines these buffered inputs in between executing non-input actions.

[0100] From the above descriptions of the tools that take as input portions of user specification 100, including validation tools 120, code generators 110, and transformation tools 160, it is clear that each tool is not necessarily configured to process specifications using the full IOA language. Various restrictions on the syntax and features of the IOA computer language used in that input are imposed. In addition, various restrictions on the classes of I/O automata that can be processed are also imposed. A user is responsible for expressing the automata in parts of user specification 100 in appropriate sublanguages for the tools that will process those parts of the specification. This use of multiple expressions of a design specifications as an approach to achieving a final validated system implementation is described fully below. A summary of the characteristics of the restricted sublanguages used by various tools is as follows:

[0101] Theorem Prover 122: Inputs can make use of the full IOA language, including non-determinism, and procedural or axiomatic specifications of state transitions.

[0102] Composer 500: The inputs, which are specifications of automata that together make up the components of the composite automaton, must be “compatible.” This requirement includes the constituent automata having no common output actions. Note that as actions can be specified using parameters and “where” clauses that restrict the allowable combinations of parameter values, verifying this condition can be complicated, and may require the user to use theorem prover 122.

[0103] Simulator 126: An automaton input to simulator 126, either as input to automaton simulator 910 or as the primary input to paired simulator 920, must not have any explicit or implicit nondeterminism, including having at most one action enabled in any state. Furthermore, the automaton must be specified in primitive form, and “closed” in that it has no input actions. Also, all predicates in the input invariant must be computable, that is, that all quantifiers range over a finite set of values allowing the simulator to test values of the quantifiers. The secondary automaton input to paired simulator 920 must be primitive and closed, but may have explicit or implicit nondeterminism.

[0104] Model checker 124: An automaton provided as input to the model checker 124 must be closed and in primitive form. It can be non-deterministic, but cannot have any “so that” statements. In this implementation, the allowed data types are integers, booleans, and arrays of integers or booleans.

[0105] Code generators 110: The requirements on an automaton input to one of code generators 110 for translation into a target programming language (e.g., C++or Java) are similar to the requirements for input to simulator 126. The automaton must be in primitive form and devoid of both explicit and implicit nondeterminism. Also, as described previously, each node automaton must be “input-delay-insensitive”. Furthermore, depending on the particular code generator used, and the target environment for execution of the generated code, different data types may be supported and different services may be provided by the hosting environment. The automaton specification input to the code generator must be consistent with these restrictions.

[0106] A user who is developing an implementation of a distributed system using the above described tools typically develops (i.e., authors or creates using the aid of development tools) multiple related specifications of all or part of the system, all using the IOA language. Each specification is input to one or more tools, and therefore must satisfy the restrictions and requirements of those tools, for example, expressing the specifications in restricted sub-languages of the full-featured IOA language, as outlined above. The user is responsible for satisfying the restrictions. The tools provide support to the user for meeting these restrictions.

[0107] The last stage of development of a system within the framework of tools described above involves providing a set of lowest level specifications of automata to code generators 110. Typically, one primitive automaton is used to produce software that executes on one processing node of a distributed system. The software on each of the nodes is configured to interact through communication services provided on the target platforms, for example, using an object oriented interface standard communication service, such as TCP/IP.

[0108] A user developing software in the IOA language, and using the tools described above, can use a variety of techniques, including iterative software development. Two types of iterative development that are supported by these tools and language are successive refinement, and decomposition. Combinations of these and other iterative techniques can also be used.

[0109] Referring to the exemplary development process illustrated in FIG. 12A, a user can carry out a series of refinement steps to go from an abstract specification to a software implementation. The user first carries out an initial specification step 1239 producing an abstract specification 1240. This abstract specification can, for example, include non-deterministic behavior, and can be parameterized, that is, it can define an entire family of systems, one system for any choice of parameter values. The user carries out a validation step 1241 to verify that abstract specification 1240 truly has desired properties specified in abstract specification 1240. The user then carries out a refinement step 1242 producing an intermediate specification 1246. For example, intermediate specification 1246 may have resolved some of the nondeterminism of abstract specification 1240. The user carries out a validation step 1247 to verify that intermediate specification 1246 has its specified properties. In order to verify that intermediate specification 1246 and abstract specification 1240 are properly related, the user carries out a validation step 1244 taking as input abstract specification 1240 and intermediate specification 1246. For example, validation step 1244 can be used to verify a simulation relationship between automata in the two specifications. This procedure continues with a second refinement step 1248 and validation steps 1253 and 1250 to produce final specification 1252. Final specification uses a restricted sublanguage of IOA that can be processed by code generator 1254 to produce software implementation 1256. Note, that the validation steps themselves may each include a step of transforming a system specification into a form that can be processed by a particular validation tool, such as a simulator, as well as a step to verify that this internal transformation step itself is valid. In this way, the user can validate properties of the system at various levels of abstraction and produce a software implementation that has those properties.

[0110] A user can also iteratively specify related systems using different levels of decomposition into interacting components. Referring to the exemplary development process illustrated in FIG. 12B, a user can iteratively decompose portions of a system to yield distributed specifications. Starting with a non-distributed specification 1270 of a system, for instance using a single automaton, a user can perform a decomposition step 1272. The resulting distributed specification 1272 can specify the system using a composition of node automata and abstract channel automata. Such abstract automata can be much simpler than the automata for the real-world channels that are used in the lowest level specification. A second decomposition step 1276 can represent in distributed specification 1278 each abstract channel as a combination of a real channel, and protocol elements which make use of the real channel. Finally in a combination step 1280, the elements which will execute on a single processing node are combined, yielding a distributed specification 1282, for example, with a single automaton for each processing node, coupled to other automata through real channels. As illustrated and described previously with reference to FIG. 12A, a validation step can be applied to each specification, and to the pairs of specifications before and after a transformation (decomposition or combination) step.

[0111] Therefore, a user can work towards a lowest level specification of a distributed system in a series of iterations. Each iteration can include one or more of the following operations:

[0112] Replacing an automaton with a more detailed automaton or a composition involving two or more interacting automata.

[0113] Refining the implementation of an automaton to use a restricted form of the computer language suitable for the code generator, for example, by removing non-deterministic behavior.

[0114] Replacing (composing) a composition of two or more automata with a single automaton.

[0115] Introducing automata which are implemented by existing components, such as communication services.

[0116] Refining the specification of an automaton to improve the efficiency of the system implementation, or to achieve some other implementation restriction.

[0117] After inputting an initial abstract specification, and after each iteration in which a new specification is derived, the user can determine whether the system specification has the required invariant properties specified by the user, and, in the case of derivation of a new specification, the user can determine whether the new specification is appropriately related to the previous specification according to a simulation relation provided by the user. As different validation tools have different requirements on a system specification, at any iteration, the user may also have to create specifications of one or more automata related to those in the current system specification (for example, a primitive form of a system specification using a composition of automata) for input to the validation tools.

[0118] In addition to modifying user specification 100 in the course of an iterative design approach of the type described above, the user also amends the specifications of automata, invariants, or simulation relations, in response to the output of validation tools 120. For example, if a user specified a detailed automaton that is meant to simulate an abstract automaton, and simulator 126 demonstrates that the detailed automaton does not in fact simulate the detailed automaton, then the user would either amend the specification of the detailed automaton, or amend the specification of the simulation relation between the automata. Therefore, the user also uses the tool set in the course of debugging the system specifications.

[0119] As described above, certain tools require that an input automaton come from a restricted class of automata. Two such restrictions are that it is closed (no input actions) and that it is “input-delay-insensitive”. The tool set aids the user to derive an automaton in such a restricted class from one that is not necessarily in that class.

[0120] Closing an automaton can be accomplished by composing the automaton with an “environment” automaton. Output actions of the environment automaton correspond to the input actions of the first automaton. The environment automaton has no input actions that are not outputs of the initial automaton, and therefore, the composition has no input actions. This composite automaton is then provided as input to the tools that require their inputs to be closed automata. Such an environment automaton can also be used in specifying simulation relationships. In particular, a composition of an automaton A and an environment automaton E can formally implement a composition of an automaton B and the environment E, whereas A itself may not in fact implement B. Environment automaton E can be used to model a system user's behavior, or the interaction of a software system with the software system being designed, and not be used to generate a software implementation.

[0121] Verifying properties of an automaton for which the input actions may be reordered, as they may be in an implementation output by code generators 110, can also be addressed using composition. Rather than using the original automaton, the input actions of that automaton are renamed, and then the automaton is composed with a “buffer” automaton. The buffer automaton accepts the input actions of the original automaton, buffers those actions, and provides corresponding (renamed) output actions in a non-deterministic order.

[0122] To illustrate the software development process of abstraction, decomposition, and use of abstract channels, a series of systems A, A′, and A″ are illustrated in FIGS. 13(a), (b), and (d) respectively. Referring to FIG. 13(a), initially, the user specifies an automaton A 1310, and validates properties related to this specification.

[0123] Referring to FIG. 13(b), as an intermediate step in reaching the lowest level of IOA description (with all the restrictions required by the code generators described above), the user next specifies the system as a composition A′ 1311 made up of node automata B₁1310, B₂1322 and B₃1324 and abstract channel automata C₁₂1321, C₂₃1323 and C₁₃1325 which provide bidirectional coupling of the node automata. Abstract channel automata can be provided to the user in a library of specifications. Such abstract channels can be simpler than the automata for the real channels (see, for example, the “reliable send/receive channels” defined in Example 8.1.1 of Lynch (1995)).

[0124] Referring to FIG. 13(c), abstract channel automaton C_ij1330, one of automata C₁₂1321, C₂₃1323, or C₁₃1325, can itself be represented as a composition of automata. In this illustration, channel automata D_ij1333 and D_ij1335 are automata that characterize real unidirectional channels (communication services) and automata E_ij1332 and E_ji1334 are (protocol) automata that make use of the real channels and which provide interfaces to the abstract channel.

[0125] Referring to FIG. 13(d), a final implementation of the system, composite automaton A″ 1312, includes node automata F₁1340, F₂1343 and F₃1346 coupled by channel automata D_ij, for instance D₁₂1341 and D₂₁1342 coupling F₁1340 and F₂1343. Referring also to FIG. 13(e), each node automaton F_i1350 (one of F₁1340, F₂1343, or F₃1346) is a primitive automaton which is the composition of node automaton B_i1351 and protocol automata E_ij1352 and E_ik1352 for j,k≠I. The composed node automata F₁1340, F₂1343, and F₃1346 (in primitive form and with no nondeterminism) are translated by code generators 110 (FIG. 1) into user software expressed in C++, Java, or some other programming language. Real channel automata D_ijare not translated by code generators 110 as equivalent functionality is provided on the hosting software environments.

[0126] A detailed example of use this type of iteration of specifications is provided in Appendix B of this description. This example describes a trivial banking system having a single bank account that can be accessed from multiple locations. The operations by which the system is accessed are deposits and withdrawals (we assume that the balance can go negative), plus balance queries.

[0127] Alternative embodiments of the invention can include other types of validation tools. In addition validation tools, such as theorem prover 122 and model checker 124, can use alternative core tools with corresponding pre- and post-processors to accept IOA specifications and provide output in terms of the input IOA specification. The tools described above can also provide different capabilities as would be known to one skilled in the art. For example, simulator 126 can make random or pseudo-random choices during simulation of an automaton rather than requiring that the input to simulator 126 be deterministic, as in the current embodiment. Additional tools, for instance related to prediction of performance characteristics of a system can also be added to the tools set.

[0128] In the embodiment described above, the user is responsible for manually deriving specifications of a system in the course of iterative development or in forming specifications of the system which use a restricted sublanguage that can be processed by a particular development tool. Embodiments of this invention can include interactive tools to aid with these transformations or derivations of system specifications. These tools can be incorporated into an integrated development environment to further aid the software development process. Interactive tools can include an nondeterminism “remover” which, for example, prompts a user to provide a “chooser” function for each instance of a “choose” statement. The non-determinism remover can also prompt the user to provide an “action selector” function to resolve the implicit nondeterminism resulting from multiple non-input actions being enabled in a state, or can aid in incorporating scheduling variables, for example, to implement a round-robin scheduling of actions. In addition, the interactive development tools can make use of a theorem prover to verify that a user has truly modified a system specification to enable only a single action at a state, or to verify that a chooser function provided by a user truly selects a value in the specified choose set.

[0129] Although the above embodiments are described in the context of software development for distributed systems in which multiple processing nodes are coupled by communication channels, the tools can also be applied to development of systems with multiple modules which cooperate on a single platform, for example, executing as multiple processes or threads communicating among each other using communication services such as pipes or message mailboxes.

[0130] It is to be understood that while the invention has been described in conjunction with the detailed description thereof, the foregoing description is intended to illustrate and not limit the scope of the invention, which is defined by the scope of the appended claims. Other aspects, advantages, and modifications are within the scope of the following claims.

[0131] A portion of the disclosure of this patent document contains material which is subjected to copyright protection. The copyright owner has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure, as it appears in the Patent and Trademark Office file or records, but otherwise reserves all copyright rights whatsoever.

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Claims

Certificate of Correction present

The claims shown below may not include correction changes. Use the corrected PDF for authoritative text.

What is claimed is:

1. A method for developing a software implementation of a distributed system, comprising:

accepting a design specification for the distributed system, including

accepting specifications of a plurality of interacting asynchronous state machines, wherein at least some of the state machines exhibit non-deterministic behavior, and

accepting a specification of desired properties of the distributed system, including accepting a logical property that is desired to be satisfied in any state of the state machines that can be reached during execution of the distributed system;

applying a validation procedure to the design specification to verify that the distributed system has the desired properties, including

applying a theorem proving procedure to the design specification, including proving that the logical property is satisfied; and

applying a code generating procedure to the specifications of one or more of the state machines to generate software implementations for components of the distributed system.

2. The method of claim 1 wherein the plurality of state machines includes a plurality of node state machines and a channel state machine, and applying the code generating procedure to the specifications of the state machines includes, for each of the node state machines, applying a translation procedure to the specification of the node state machine to generate a software implementation of that node state machine.

3. The method of claim 1 wherein each of the specifications of the state machines includes:

a specification of a plurality of state variables, wherein values of the state variables determine the state of the state machine; and

a specification of a plurality of state transitions, each specification of a state transition including

a specification of values of the state variables in a state in which the transition can be taken, and

a specification of an effect on the values of the state variables when that transition is taken.

4. The method of claim 3 wherein the specification of the effect on the values of the state variables includes an instruction to set one of the state variables to a non-deterministic choice of values.

5. The method of claim 4 wherein the specification of the effect on the values of the state variables includes a logical constraint on the values of the state variables resulting from taking the transition.

6. The method of claim 1 wherein applying the theorem proving procedure to the design specification includes:

automatically translating the design specification into a logical language of a theorem prover; and

providing the translated design specification to a theorem prover.

7. The method of claim 6 wherein the theorem prover is an equational theorem prover, and each of the specifications of the state machines includes a specification of a plurality of state variables, each state variable having a data type, and values of the state variables determine the state of the state machine, wherein

applying the theorem prover includes accepting axiomatic definitions of the data types of the state variables.

8. The method of claim 1 wherein applying the validation procedure further includes applying a simulation procedure to one of the plurality of state machines, including determining a sequence of states of the state machine, and verifying that the logical property is satisfied in each of the sequence of states.

9. The method of claim 1 wherein applying the validation procedure further includes applying a model checking procedure to one of the plurality of state machines, including enumerating the states of the state machine, and verifying that the logical property is satisfied in each of the enumerated states.

10. The method of claim 1 wherein accepting specification of a plurality of interacting asynchronous state machines includes accepting a specification of an infinite-state state machine.

11. A method for developing a software implementation of a distributed system, comprising:

accepting a first design specification for the distributed system, including

accepting specifications of a first plurality of state machines, and

accepting a specification of desired properties of the first plurality of state machines;

applying a validation procedure to the first design specification to verify that the first plurality of state machines has the desired properties, including

applying a theorem proving procedure to the first design specification,

determining a second design specification from the accepted design specification, wherein the second design specification has a property that the first design specification does not have, and

applying a second validation procedure to the second design specification; and

applying a code generating procedure to the specifications of one or more of the first plurality of state machines to generate software implementations for components of the distributed system.

12. The method of claim 11 wherein the property of the second design specification is deterministic behavior.

13. The method of claim 11 wherein the property of the second design specification is specification using a single state machine.

14. The method of claim 13 wherein determining the second design specification includes deriving a composition of the plurality of state machines including matching corresponding transitions of said state machines.

15. The method of claim 11 wherein accepting specifications of a plurality of state machines includes accepting a specification of an infinite-state state machine.

16. The method of claim 11 wherein determining the second design specification includes applying an automated procedure to the specifications of the plurality of state machines to produce the second design specification.

17. The method of claim 11 wherein determining the second design specification includes accepting the second design specification from a user.

18. The method of claim 11 further comprising accepting a software implementation of one of the plurality of state machines wherein the software implementation was determined prior to accepting the design specification for the distributed system.

19. A method for developing a software implementation of a distributed system, comprising:

accepting a first design specification including

accepting specifications of a first plurality of state machines, and

accepting a specification of a first plurality of desired properties of the first plurality of state machines;

applying a first validation procedure to the first design specification to verify that the first plurality of state machines has the first desired properties, including

applying a theorem proving procedure to the first design specification; accepting a second design specification, including

accepting specifications of a second plurality of state machines, and

accepting a specification of a desired relationship between the first plurality of state machines and the second plurality of state machines;

applying a second validation procedure to the second design specification to verify that the first plurality of state machines and the second plurality of state machines have the desired relationship; and

for one or more of the second plurality of state machines, applying a code generating procedure to the specification of the state machine to generate a software implementation of that state machine.

20. The method of claim 19 further comprising:

refining the first design specification to yield the second design specification.

21. The method of claim 20 wherein refining the first design specification includes expressing the specification of the second plurality of state machines using a restricted sublanguage of the language used to express the specification of the first plurality of state machines.

22. The method of claim 21 wherein the specification of the first plurality of state machines includes a specification of non-deterministic behavior of the state machines, and the restricted sublanguage does not permit specification of non-deterministic behavior.

23. The method of claim 19 wherein accepting a specification of a desired relationship between the first plurality of state machines and the second plurality of state machines includes:

accepting a desired relationship between a first one of the first plurality of state machines and a second one of the second plurality of state machines, including

accepting an association of the states of the first state machine and states of the second state machine, and

accepting an association of state transitions of the first state machine and sequences of one or more state transitions of the second state machine.

24. The method of claim 19 further comprising accepting a software implementation of one of the second plurality of state machines wherein the software implementation was determined prior to accepting the design specification for the distributed system.

25. The method of claim 19 further comprising implementing one of the second plurality of state machines using a communication channel.

26. The method of claim 19 further comprising applying a third validation procedure to the second design specification to verify that the second plurality of state machines has second desired properties.

27. Software stored on a computer readable medium comprising instructions for causing a computer to perform the functions of:

accepting a design specification for a distributed system, including

accepting specifications of a plurality of interacting asynchronous state machines, wherein at least some of the state machines exhibit non-deterministic behavior, and

applying a validation procedure to the design specification to verify that the distributed system has the desired property, including applying a theorem proving procedure to the design specification; and

applying a code generating procedure to the specifications of the state machines to generate a plurality of software implementations for distributed components of the distributed system.

28. Software stored on a computer readable medium comprising instructions for causing a computer to perform the functions of:

accepting a first design specification for a distributed system, including

accepting specifications of a first plurality of state machines, and

accepting a specification of a first plurality of desired properties of the first plurality of state machines;

applying a first validation procedure to the first design specification to verify that the first plurality of state machines has the first desired properties, including applying a theorem proving procedure to the first design specification;

accepting a second design specification, including

accepting specifications of a second plurality of state machines, and

accepting a specification of a desired relationship between the first plurality of state machines and the second plurality of state machines;

for one or more of the second plurality of state machines, applying a code generating procedure to the specification of the state machine to generate a software implementation of that state machine.

29. A system for iterative development of a software implementation of a distributed system, comprising:

a means for accepting a first design specification for the distributed system, wherein the first design specification includes specifications of a first plurality of state machines, and includes a specification of desired properties of the plurality of first state machines;

a means for verifying that the first state machines have the desired properties;

a means for accepting a second design specification, wherein the second design specification includes specifications of a second plurality of state machines, and includes a specification of a desired relationship between the first plurality of state machines and the second plurality of state machines;

a means for verifying that the first plurality of state machines and the second plurality of state machines have the desired relationship;

a code generator for producing a plurality of software implementations of components of the distributed system from the specifications of the second plurality of state machines.

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Abstract