Resonant-boost-input three-phase power factor corrector with a low current stress on switches

[0002] This applications claims the priority of prior provisional application Ser. No. 60/123,879 filed Mar. 11, 1999, which is incorporated herein by reference.

[0003] The present invention relates generally to power converters. More particularly, the invention relates to methods and apparatus for reducing the stress on power converter switches and reducing conduction and switching losses in power converters.

[0004] Various topologies of power converting circuits are known in the art. Generally, in a power converting circuit, the input of the circuit is coupled to a power source (such as a battery or 3-phase AC source) and the output of the circuit is coupled to an electrical load to which the power provided by the power converting circuit is to be delivered.

[0005] Three phase AC-DC power converters are used to supply large amounts of power, while maintaining balanced operation of the three AC phase mains. In many of these three-phase circuits, one or more active semiconductor switching devices (“switches”), such as MOSFETS, JFETS, IGBTS, and thyristors, are coupled between the input and output of the power converting circuit. These switching devices are configured and selectively controlled (in a manner well known in the art) to switch on and off in such a way as to condition the power received from the AC power source for delivery to the electrical load—i.e., to provide power factor correction (PFC).

[0006] Several topologies and control methods for AC-DC power conversion have been developed during the past years. At least two types of topologies are available that provide low-cost, high-efficiency power conversion with simple control. The first topology may be referred to as the Single Switch Boost-type three phase PFC (“SSB converter”). A typical SSB converter uses a single switch, that is switched in zero current switching (ZCS) condition, to provide power factor correction. Such a topology is discussed in the publication entitled “An Active Power Factor Correction Technique For Three-Phase Diode Rectifiers” authored by A. R. Prasad, P. D. Ziogas, and S. Manias, IEEE PESC 1989, pp. 58-66.

[0007] The second topology is the Resonant Boost Input three-phase PFC (“RBI converter”). This topology is discussed in the publication entitled “Resonant Boost Input Three Phase Power Factor Corrector” authored by Da Feng Weng and Subbaraya Yuvarajan, IEEE APEC 1998 Record, pp. 958-62, and is hereby incorporated by reference in its entirety. A schematic diagram of this topology is shown in FIG. 1. The RBI converter works in zero voltage switching (ZVS) soft switching condition which allows the converter to work at higher switching frequencies. In this circuit, the equivalent duty-cycle of the boost inductor automatically varies with the input phase voltage. Thus, for a given value of total harmonic distortion (THD), the output DC bus 20 voltage can be relatively low and very close to the peak line voltage.

[0008] In the circuit of FIG. 1, components L_a, L_b, L_c, C_a, C_b, C_cand D₁-D₆form a three-phase input resonant network. The switches M₁and M₂, along with diodes D_aand D_b, and inductor L₁are configured such that these components comprise a high frequency current source 10. This high frequency current source 10 operates to transfer energy stored in the input capacitors C_a, C_b, and C_c(corresponding to each of the AC voltage input phases) to the output capacitor C_dc(across which the desired load is connected). The capacity of the circuit to transfer energy will have an effect on the input power of the converter. In other words, this circuit may be used to control the input power and shape the waveform of the input current. This input waveform shaping function is described immediately below.

[0009] The input current waveform (i.e., the input current's magnitude, power and total harmonic distortion) provided by each of the AC voltage source input phases V_a, V_b, and V_cis controlled by the variable excitation time for the corresponding input inductors L_a, L_b, and L_c. For example, the input current waveform for current I_ais controlled by changing the excitation time for input inductor L_a. The excitation time for a particular input inductor is, in turn, controlled by changing the difference in the initial and final voltages on the corresponding input capacitors C_a, C_b, and C_cduring each switching cycle. (Note that the final voltage across an input capacitor during each switching cycle will be the final DC output voltage V_dcand the initial voltage across the input capacitor may be as low as zero.) Clearly, the longer the time taken by the input capacitor to change from the initial to the final voltage during a switching cycle, the greater the excitation time for the input inductors. The time required by the input capacitors for charging from the initial to the final voltage may, in turn, be controlled by the input line current. Thus, it is clear that when the instantaneous amplitude of the input current is low, the time required for charging from the initial to the final voltage across the input capacitors will be relatively long, and when the instantaneous amplitude of the input current is high, the time for charging from the initial to the final voltage will be relatively short.

[0010] During each switching period, the energy supplied to the input capacitors C_a, C_b, and C_cby the input currents must be released or transferred to the output of the converter, otherwise the capacitors C_a, C_b, C_ccannot absorb any of the input power. In the converter, the high frequency current source 10 is used to transfer the energy stored in C_a, C_b, C_cto the output of the converter.

[0011] The process of energy transfer by the high frequency current source can be divided into two stages. During the first stage, the energy in C_a, C_band C_cis transferred to the high frequency inductor L₁. During the second stage, the energy in L₁is transferred to the output of the converter through the active switches M₁and M₂. Because the energy stored in C_a, C_b, C_cis transferred to the output of the converter through L₁, the current in L₁must be relatively high to store the total energy of C_a, C_band C_c. As shown in FIG. 1, the current in L₁also passes through active switches M₁and M₂. The amplitude of the current will affect the conduction loss of the active switches M₁and M₂. In the second stage, as the active switches M₁and M₂alternately turn on or off, the energy in L₁will be released to the output through the body diode (not shown) of M₁or M₂and diode D_aor D_b. The turn-off current of the active switches M₁and M₂will be the maximum value of the current in L₁. The amplitude of the current will also affect the switching loss of M₁and M₂.

[0012] During each switching period, the discharge time of C_a, C_b, and Cc should be less than half of the switching period in order to guarantee that C_a, C_b, and C_cwill be charged from zero again. For a given the value of (1) C_a(=C_b=C_c), (2) the switching frequency (f_s), (3) the rated input power, and (4) the output voltage V_dc, the minimum amplitude I_SMof the high-frequency current source required to transfer the energy can be expressed as:

[0013] I_SM=8 f_sC_aV_dc  (1)

[0014] The relation between the product f_sC_aand the input power level is obtained as

[0015] f_sC_a=F/R_equ  (2)

[0016] where F is a coefficient and R_equis the equivalent resistance seen by the capacitor C_a. From (2), it is clear that the product of f_sC_avaries linearly with the input RMS current. From equations (1) and (2), it can be concluded that, as the power level of the converter increases, the amplitude of the high-frequency current source 10 also has to be increased to guarantee the required input power and a sufficiently low THD in the three-phase input current.

[0017] The topology just described has several advantages over the previously mentioned SSB converter topology. This RBI converter topology, unlike the SSB converter topology, operates in zero voltage switching (ZVS) condition and thus can handle higher switching frequencies than the SSB converter. Additionally, much lower DC bus 20 voltages are possible for a given AC input voltage and given acceptable level of total harmonic distortion. However, this RBI converter topology has one disadvantage as compared to the SSB converter. In the RBI converter, the current stress on the switches is almost double that of the SSB converter. Increased switch current stress leads to undesirable conduction losses and turn-off switching losses. Thus, there is a need for an AC-DC power converter that has all the advantages of the RBI type converter while having a switch current stress approximately the same as an SSB converter.

[0018] A three phase AC-DC power conversion circuit is provided. The circuit includes a plurality of input inductors and capacitors and output capacitors. A high frequency current source is operably connected between the input and output of the circuit and operates to transfer energy from the input capacitors to the output capacitors. The energy is transferred through the secondary of a transformer in the high frequency current source. Current in the high frequency current source's switches flows through the primary of the transformer.

[0019] FIG. 1 is a schematic diagram of a prior art Resonant Boost Input three-phase PFC circuit.

[0020] FIG. 2 is a schematic diagram of a Resonant Boost Input three-phase PFC circuit according to one embodiment of the present invention.

[0021] FIG. 3 is a schematic diagram of the equivalent single-phase circuit for the embodiment of the present invention illustrated in FIG. 2.

[0022] FIGS. 4(a) and (b) illustrate the input current waveforms and the frequency spectrum of one of the phase currents of the circuit of FIG. 2.

[0023] FIGS. 5(a) and (b) illustrate the switch current waveforms for the circuits of FIGS. 2 and 1, respectively.

[0024] FIG. 6 is a schematic diagram of a second embodiment of the present invention.

[0025] FIG. 7 is the schematic diagram of a third embodiment of the present invention.

[0026] FIG. 8 is a schematic diagram of the equivalent single-phase circuit for the embodiment of the present invention illustrated in FIG. 7.

[0027] A. Description of a First Embodiment

[0028] 1. Structure of the First Embodiment

[0029] In one embodiment of the present invention shown in FIG. 2, some of the general configuration of the power converter topology of FIG. 1 has been retained. However, novel structural changes have been made in the present invention to achieve its objectives—retaining the advantages that the power converter of FIG. 1 has over SSB converters, while reducing the current stress on the switches M₁and M₂. One of the key points of the invention is that the amount of energy transferred by the high frequency current source 110 is reduced in comparison to the circuit of FIG. 1. This is accomplished in the present invention by directly transferring the energy stored in C_a, C_b, and C_cto the output of the converter through the current transformer T₁.

[0030] Referring specifically now to FIGS. 1 and 2, the novel structural changes of the present invention are discussed. First, it can be seen in FIG. 2 that the output DC voltage is now supplied by two series coupled output capacitors C_dc1and C_dc2(as opposed to the single output capacitor C_dcof FIG. 1). Second, a current transformer T₁has been added to the high frequency current source 110 of FIG. 2. Third, the connections of some of the components of the high frequency current source 110 of FIG. 2 have been changed in comparison to FIG. 1.

[0031] With regard to the second and third of these structural changes, the common terminal 30 of the input capacitors C_a, C_b, and C_cof FIG. 1 is no longer connected to the switches M₁and M₂through the inductor L₁. Rather, as shown in FIG. 2, the common terminal 130 of the input capacitors C_a, C_b, and C_cis now connected to the terminal 200 between the output capacitors C_dc1and C_dc2via the secondary of current transformer T₁. Additionally, as shown in FIG. 2, the primary of the transformer T₁is connected at one end to the transformer T₁secondary and at the other end to inductor L₁. Inductor L₁is, in turn, connected to the terminal between switches M₁and M₂. With these changes in mind, a more detailed description of one embodiment of the present invention is now provided.

[0032] The circuit of FIG. 2 is composed of three input inductors L_a, L_b, L_c; six ultra-fast diodes D₁-D₆; one high-frequency inductor L₁; one high-frequency current transformer T₁; two general-purpose diodes D_a, D_b; three input capacitors C_a, C_b, C_c; two output or DC bulk capacitors C_dc1, C_dc2; and two power switches M₁, M₂. In the circuit of FIG. 2, the section comprising D_a, D_b, M₁, M₂, T₁, and L₁constitutes a high-frequency current source 110. The current source 110 discharges the capacitors C_a, C_b, and C_cand transfers the energy stored in C_a, C_b, and C_cto the DC bulk capacitors C_dc1and C_dc2and the load which is across the DC bus 120. As noted above, the circuit of FIG. 2 uses a current transformer T₁as part of high frequency current source 110. Since the circuit can operate at a relatively high switching frequency, the size of the transformer T₁can be small.

[0033] 2. Operation of the First Embodiment

[0034] a. Operation in General

[0035] In operation, the configuration of FIG. 2 operates to reduce the current stress (i.e., the maximum current flowing through) on switches M₁and M₂by a desired amount. Generally, the amount of current flowing through switch M₁(or M₂, depending upon which switch is on), inductor L₁, and the transformer T₁primary may be controlled by the current transformer ratio.

[0036] The transformer T₁secondary provides an alternative current path 210 for the high frequency current source 110 current I_SM(The magnitude of this current and other variables may be determined from the same equations described above in the Background of the Invention). This current (which in FIG. 1 would flow through inductor L₁and the “on” switch M₁or M₂to the load) now bypasses the switches M₁and M₂altogether via alternative current path 210. Now the current flowing through the switches M₁or M₂and inductor L₁is proportionally lower than the current I_SM, depending upon the current ratio of current transformer T₁. It can be seen that this reduced current through the switches M₁and M₂reduces current stress, reduces conduction and turn-off switching losses through the switches M₁and M₂, and generally increases the efficiency of the power converter. Moreover, the charging current of the two output capacitors C_dc1and C_dc2is also reduced proportionally, thereby prolonging the active life of these components.

[0037] b. Operation in More Detail

[0038] A more detailed description of the operation of the power converter of FIG. 2 is now provided. The power converter can be decoupled into three single-phase PFC converters as shown in FIG. 3, each of which is a single-phase doubler PFC converter. In FIG. 3, with the help of the current transformer T₁, the input capacitor C_atransfers whole or part of the input energy to the DC bulk capacitors C_dc1, C_dc2, and the load. The whole switching process can be divided into a resonant input mode and a boost input mode.

[0039] The resonant input mode corresponds to a low input voltage and the voltage on C_ais always less than (V_dc1+V_dc2). The energy from the input line is first stored on C_aand then transferred to the output through resonance. During the resonant input mode, each half-cycle can be further divided into six switching modes discussed immediately below:

[0040] Mode 1: The switch M₂is turned on. Assuming that the current in the transformer T₁secondary is larger than the current in the differential choke L_a, the diode D_bturns on, the transformer T₁releases the energy in inductor L₁to C_dc2, and the current in L₁resonantly decreases. The input capacitor C_ais charged by V_a(V_in) through L_a. The voltage across C_aincreases but it will be less than (V_dc1+V_dc2).

[0041] Mode 2: Once the switch M₂is turned off, the current through L₁continues through D₁and switch M₁is turned on under ZVS condition. The energy stored in L₁is released to the DC capacitors C_dc1and C_dc2through the current transformer T₁, D_b, and D₁. The current in L₁will decrease to zero causing D_bto turn off.

[0042] Mode 3: The capacitor C_awith its initial voltage resonates with L₁through the current transformer T₁, and the resonant current flows through D₁, C_dc1, L₁, and M₁. The energy stored in C_ais transferred directly to C_dc1or through L₁, and the energy stored in L_ais released to V_dc1through D₁.

[0043] Mode 4: As the voltage on C_adrops below zero, D_ais turned on. The voltage on C_ais clamped to zero and the transformer T₁releases the energy in inductor L₁to C_dc1, and thus the current in L₁resonantly decreases. The energy stored in L_acontinues to be released to V_dc1through D₁.

[0044] Mode 5: As the switch M₁turns off, the switch M₂can be turned on under ZVS condition. The energy stored in L₁will be released to C_dc2through the current transformer T₁and D₂. The current in L₁will decrease to zero, and then D_ais turned off. The energy stored in L_acontinues to be released to V_dc1through D₁.

[0045] Mode 6: The switch M₂is turned on. The capacitor C_awill resonate with L₁through the current transformer T₁, and the current through L₁increases. As the current through L₁exceeds the input current, D₁will be turned off and D_bwill turn on and carry the current of the secondary of T₁. The energy in L₁will be released to C_dc2. The switching process will then return to Mode 1.

[0046] The boost input mode corresponds to a high value of instantaneous input line-voltage and the voltage on C_awill reach (V_dc1+V_dc2). The input capacitor C_atransfers part of the input energy to the output and the differential choke L_aand the switch (M₁or M₂at various times) feeds part of the input energy to the output directly through boost function. During this mode, each half-cycle can be divided into seven switching modes discussed immediately below:

[0047] Mode 1: The switch M₂is turned on. Assuming that the current in the secondary of transformer T₁is larger than the current in the differential choke L_a, the diode D_bturns on, the transformer T₁release the energy in inductor L₁to C_dc2, and the current in L₁resonantly decreases. The input capacitor C_ais charged by V_a(V_in) through L_a. The voltage on C_aincreases until it reaches (V_dc1+V_dc2).

[0048] Mode 2: Once the voltage on C_aexceeds (V_dc1+V_dc2), D₁will be turned on and the energy stored in L_awill be released to V_dc1. The transformer T₁releases the energy in inductor L₁to C_dc2, and the current in L₁resonantly decreases..

[0049] Mode 3: Once the switch M₂is turned off, the current through L₁continues through D₁and switch M₁is turned on under ZVS condition. The energy stored in L₁is released to the DC capacitors C_dc1and C_dc2through the current transformer T₁, D_b, and D₁. The current in L₁will decrease to zero causing D_bto turn off.

[0050] Mode 4: The capacitor C_awith its initial voltage (V_dc1+V_dc2) resonates with L₁through the current transformer T₁, and the resonant current flows through D₁, C_dc1, L₁, and M₁. The energy stored in C_ais transferred directly to C_dc1or through L₁, and the energy stored in L_ais released to V_dc1through D₁.

[0051] Mode 5: As the voltage on C_adrops below zero, D_ais turned on. The voltage on C_ais clamped to zero and the transformer T₁releases the energy in inductor L₁to C_dc1, and the current in L₁resonantly decreases. The energy stored in L_acontinues to be released to V_dc1through D₁.

[0052] Mode 6: As the switch M₁turns off, the switch M₂can be turned on under ZVS condition. The energy stored in L₁will be released C_dc2through the current transformer T₁and D₂. The current in L₁will decrease to zero, and then D_ais turned off. The energy stored in L_acontinues to be released to V_dc1through D₁.

[0053] Mode 7: The switch M₂is turned on. The capacitor C_awill resonate with L₁through the current transformer T₁, and the current through L₁increases. As the current through L₁exceeds the input current, D₁will be turned off and D_bwill turn on and carry the current of the secondary of T₁. The energy in L₁will be released to C_dc2. The switching process will then return to Mode 1.

[0054] It is clear that during each mode, the input capacitor C_acan directly transfer the energy stored to the C_dc1or C_dc2through the current transformer T₁, and the inductor L₁will also help the energy transfer from the capacitor C_ato C_dc1or C_dc2. The inductor L₁will be not used to store energy temporarily. It is the direct energy transfer that makes the efficiency of the whole system high.

[0055] c. Specific Example of the First Embodiment

[0056] A power converter according to the first embodiment of the present invention has been simulated. The simulation was performed with AC voltage sources having a frequency of 600 Hz in order to reduce the simulation time. (Typical applications of the present invention would involve the use of AC sources having frequencies of 50 Hz, 60 Hz, and 400 Hz.) The various components of the converter were given the following values: L_a=L_b=L_c=1.72 MH, C_a=C_b=C_c+5.1 nF, C_dc1=C_dc2=200 uF, L₁=200 uH, and switching frequency f_s=170 kHz. Diodes D₁through D₆are ultra-fast diodes and diodes D_aand D_bare general purpose diodes. The transformer T₁is a 2:1 current transformer. For an input voltage of 208 Vrms line, the final output voltage V_dc=(V_dc1+V_dc2) was chosen as 340 Vdc.

[0057] In FIGS. 4(a) and (b), there is shown the waveforms of the AC input current and the frequency spectrum of one of the phase currents, respectively. As may be calculated from FIG. 4(a), the value of THD is approximately 8.5%.

[0058] In FIG. 5(a) there is shown the current waveform of switch M₁of the present invention and in FIG. 5(b), for comparison, the current waveform of switch M₁for the converter of FIG. 1. From these Figures, it can be seen that the peak current through M₁for an input power of 214 W in the present invention (FIG. 2) is 1.21A. In comparison, the prior art converter of FIG. 1 has a current stress of 2.40A for an input power of 189W. Thus, the current stress is reduced by 50% in the proposed converter.

[0059] B. Description of a Second Embodiment

[0060] A second embodiment of the present invention is shown in FIG. 6. This embodiment of the present invention adds a phase shift controlled DC-DC voltage converter 330 to the power converter circuit of FIG. 2 which, in turn, provides the circuit with another control variable for controlling the output power.

[0061] In this embodiment, the high-frequency current source 310 still comprises components D_a, D_b, M₁, M₂, T₁, and L₁. The high-frequency current source 310 discharges the input capacitors C_a, C_b, C_cand transfers the energy stored in them to the DC bulk capacitors C_dc1and C_dc2and the load which is across the DC bus. However, in this embodiment, a second pair of switches M₃and M₄, a second transformer T2, and a rectifier and filter circuit 320 have been added to the circuit of FIG. 2. These latter components, together with switches M₁and M₂, comprise a full-bridge DC-DC converter 330 which is phase-shift controlled. In this full-bridge converter 330, the lagging-leg switches M₁and M₂perform both the PFC function and the DC-DC conversion function. The leading-leg switches M₃and M₄perform the DC-DC conversion function only.

[0062] The output power of the full-bridge DC-DC 330 converter is controlled by varying its equivalent duty cycle and is independent of the switching frequency. Thus, in the circuit of FIG. 6, two independent control variables are available: (1) the switching frequency which is used to control the input power and (2) the equivalent duty cycle which is used to control the output power. Since these control variables are independent, it is possible to balance the input power and the output power, thereby setting the DC link voltage. In general, in a full-bridge, phase-shift dc-dc converter, the switches in the leading leg (M₃, M₄) turn on and turn off under ZVS condition automatically due to the load current. However, the switches in the lagging leg (M₁, M₂) do not have ZVS unless an auxiliary circuit is added. In the converter of the second embodiment, the ZVS of the switches in the lagging leg is automatically provided by the high-frequency current source. More over, the circuit allows operation over a wide load range with ZVS and a higher efficiency.

[0063] C. Description of a Third Embodiment

[0064] The circuit of a third embodiment of the present invention is shown in FIG. 7. In the circuit of FIG. 7, the section comprising D_a-D_f, Q₁, Q₂, T, and L_rconstitutes a high-frequency resonant pulse current source 410 which discharges the capacitors C_a, C_b, and C_cand transfers the energy stored in them to the DC bulk capacitor C_dcand the load (shown in FIG. 7 as voltage source V_dc). Like the circuit of FIG. 2, this circuit can operate at a higher switching frequency and the size of the transformer can be small. In comparison to the circuit of FIG. 1, the circuit of FIG. 7 uses a voltage transformer with a ratio n:1 to feed the energy stored in C_a, C_b, and C_cback to the DC bus and to eliminate circulating currents. The operation of this circuit is described below.

[0065] As Q₁turns on under ZCS due to the current in L_rgoing to zero, the inductor L_rresonates with C_a, C_b, and C_c. The DC bus voltage is reflected as an AC voltage source through the voltage transformer T to absorb the stored energy in the capacitors. As the voltage on C_a, C_b, and C_cgoes to zero or V_dc(V_sareaches V_dc), the current in L_rreaches its maximum value. After that, the current in L_rdecays to zero and the energy in L_ris released to the dc bus through the transformer. After the current in L_rdrops to zero with Q₁still conducting, the voltage across C_a, C_b, and C_cwill stay at zero or V_dcuntil the next half switching-period. Because the current in Q₁is equal to the current through L_rwhich is almost zero, Q₁turns off in ZCS with a negligible switching loss. A similar sequence of operation occurs when Q₂turns on under ZCS. In FIG. 7, the freewheeling diodes DQ₁and DQ₂are used to clamp the voltage of Q₁and Q₂.

[0066] It can be shown that the time taken for the energy stored in C_a, C_b, and Cc to be transferred to the DC bus is much shorter for the circuit of FIG. 1. Hence the power density and the corresponding power loss will be higher in the circuit of FIG. 1. On the other hand, the circuit of FIG. 7 has a lower power density and a lower power loss which means a higher overall efficiency.

[0067] The circuit parameters are determined by the required input power, the switching frequency f_s, and the output dc voltage V_dc. The maximum charge Q_con C_acan be expressed as

[0068] Q_c=3·C_a·V_dc

[0069] The amplitude of the resonant current I_mis then given by

[0070] I_m=2·Q_c·f_s

[0071] From the value of I_mand those of C_a, C_b, and C_c, the value of L_rcan be determined. The input power varies almost linearly with the switching frequency f_s. In order to guarantee ZCS condition for Q₁and Q₂., the maximum switching frequency has to be limited.

[0072] For a balanced three-phase system, the converter of FIG. 7 can be decoupled into three single-phase PFC converters as shown below FIG. 8. Each of the converters is a single-phase doubler PFC converter. The input capacitor C_atransfers part of the input energy to the inductor L₁and the energy is then transferred to the DC bulk capacitor and the load. As with the first embodiment of the present invention, the whole switching process can be divided into a resonant input mode and a boost input mode.

[0073] 1. Resonant Input Mode

[0074] The resonant input mode corresponds to a low input voltage and the voltage on C_ais always less than (V_dc1+V_dc2). During this mode, each half-cycle can be divided into six switching modes. The energy from the input line is first stored on C_aand then transferred to the output by the high-frequency current source. During each switching period, C_ais charged from zero to a certain value and then discharged to zero. After that, the voltage across C_ais kept at zero until the next half-switching period

[0075] 2. Boost Input Mode

[0076] During the boost input mode, the instantaneous input line-voltage is high, and the voltage on C_awill reach (V_dc1+V_dc2). During this mode, each half-cycle can be divided into seven switching modes. The input capacitor C_atransfers part of the input energy to the output and the input inductor L_aand the diodes D₁or D₂feeds part of the input energy to the output directly through a boost function. During each switching period, the voltage on C_ais charged from zero to (V_dc1+V_dc2) and then discharged to zero and after that, the voltage on C_ais kept at zero until the next half switching-period.

[0077] During each mode of operation, the input capacitor C_aautomatically controls the equivalent duty-cycle and thus plays a key role in shaping the input current. The capacitor C_awill be charged from zero to a certain value or (V_dc1+V_dc2), and then discharged to zero completely by the high-frequency current source. There will be a circulating current through the switches and diodes D_aor D_bwith zero energy stored in C_a. After that, the voltage on C_ais kept at zero until the next half switching-period. If the high-frequency current source goes to zero and stays there after the voltage on C_adecays to zero, there will be no circulating current and the voltage on C_awill stay at zero. This suggests that if the high-frequency current source has three levels, namely, +I_m, O, and −I_m, where I_mis its amplitude, then there will be no circulating current and the efficiency will be high. Since the three-level current source has a zero current period, the ZCS condition for the IGBTs is automatically set up.

[0078] 3. Remarks on the Third Embodiment

[0079] An IGBT switch is a particularly good choice for this embodiment since it has conductivity modulation in device structure and an on-voltage which is independent of the current density. Due to the recombination of the minority carriers in the wide base region of the integral BJT, this recombination process produces what is frequently termed as the “current tail.” This current tail limits the operating frequency of the IGBT. A good turn-off method is to make the IGBT turn-off in ZCS, that is, the current in IGBT is first decreased to almost zero and then the gate drive voltage reduced to zero. In this case, the minority carriers are first swept out of the wide base region of the integral BJT and the turn-off energy is very low.

[0080] In this embodiment, the time taken for the energy stored in the input capacitors C_a, C_b, C_cto be transferred to the DC bus is relatively shorter than in the embodiment of FIG. 2. Thus, in this embodiment, there is a period in which the current in L_rdecays to zero and the energy in L_rhas been released to DC bus through the voltage transformer. After the current L_rreduces to zero and IGBT1 or IGBT2 is still on, C_a, C_b, and C_cwill have a zero voltage or V_dcuntil the next half switching period. Because the current in IGBT1 or IGBT2 is equal to the current in L_rwhich is almost zero, as IGBT1 or IGBT2 turns off in ZCS, the switching loss in IGBT1 or IGBT2 will be almost zero. The embodiment allows that the invention can be applied in higher power level applications.

[0081] This application incorporates by reference all materials in related provisional application Ser. No. 60/123,879 filed on Mar. 11, 1999.

[0082] It will be readily apparent to those skilled in the art that innumerable variations, modifications, applications, and extensions of these embodiments and principles can be made without departing from the principles and spirit of the invention. For example, one skilled in the art will realize that the number of switches and other components may be increased without detracting from the advantages of the present invention. Accordingly, it is intended that the scope of the invention be only limited as necessitated by the accompanying claims.