Microwave-frequency hybrid integrated circuit

[0002] The present invention relates in general to electronic engineering and more specifically to a microwave hybrid integrated circuit (IC).

[0003] A microwave hybrid IC is known, the circuit comprising a dielectric board having a topological metallization pattern and semiconductor chips which are arranged in the substrate so that the face surface of each chip with contact pads are located in the same plane with the substrate surface, and the contact pads of the chips are electrically connected to the topological metallization pattern see U.S. Pat. No. 4,772,914.

[0004] The aforementioned hybrid IC, however, is possessed of a dispersion in the circuit electrical parameters resulted from variations in the length of interconnecting wires due to possible displacement of the semiconductor chip along the bottom of the recess from one of its walls towards the other one.

[0005] One more prior-art microwave hybrid IC is known, the circuit comprising a dielectric board with a topological metallization pattern and recesses, wherein the chips of the chip-type semiconductor devices are secured with the aid of a binder so that the face surface of the chips with the contact pads is coplanar with the board surface, and the contact pads of the chips are electrically connected to the topological metallization pattern (JP, B, 49-12794).

[0006] The aforecited hybrid IC is possessed of a low reproducibility of its electrical parameters due to chip displacement along the bottom of the recess during its fitting with the resultant variations in the length of interconnecting wires.

[0007] The principal object of the present invention is to provide a microwave hybrid integrated circuit, wherein the recesses are provided in the dielectric board, in which recesses the semiconductor chips being fixed, so as to allow enhancing the reproducibility and manufacturability of the electrical parameters of the IC.

[0008] The foregoing object is accomplished due to the fact that in a microwave hybrid IC, comprising a dielectric board provided with a topological metallization pattern and a number of recesses in which the semiconductor chips are fixed with a binder, the face surface of the chips provided with contact pads being coplanar with the board surface plane, while the contact pads of the chips are electrically connected to the topological metallization pattern, according to the present invention, the walls of each recess are inclined towards the board surface at an angle of 90.1 to 150°.

[0009] Making the angle of inclination of the walls towards the plane of the board surface less than 90.1° does not give any positive results and making said angle more than 150° elongates substantially the length of connecting leads and hence the spurious inductance.

[0010] The recesses may be metallized and the metal coating may be electrically connected to the topological metallization of the board. The board may be provided with the shield grounding metallization on its back side, and in the bottom of the recesses the metallized holes may be made, filled with an electrically and heat conducting material, for connection with the shield grounding metallization.

[0011] Performing the walls of the recesses inclined towards the plane of the board surface at an angle α=90.1 to 150° ensures:

[0012] first, restricting the possibility of chip displacement along the bottom of the recesses and hence reducing the variation in the length of conductors interconnecting the contact pads with the topological metallization and therefore enhancing reproducibility of the circuit electrical parameters;

[0013] second, enhancing the accuracy of the chip fitting in the recess and its orienting therein, as well as simpliying the electric connection between metallization of the recess and the topological metallization, thereby increasing the manufacturability.

[0014] The present invention is illustrated by a detailed description of some specific exemplary embodiments thereof to be taken with reference to the accompanying drawings, wherein:

[0015] FIG. 1 is a sectional view of the filed microwave hybrid IC;

[0016] FIG. 2 is a plan view of FIG. 1;

[0017] FIG. 3 is a sectional view of another embodiment of the filed microwave hybrid IC; and

[0018] FIG. 4 is a sectional view of still another embodiment of the filed microwave hybrid IC.

[0019] The microwave hybrid IC, according to the invention, comprises a 0.5 mm thick dielectric board 1 (FIGS. 1 and 2) made of, e.g., Polycor and having a topological metallization pattern 2 on the face side thereof The topological metallization may be of a Cr—Cu structure (3 μm thick applied by a spray-deposition technique)—Cu (3 μm thick electroplated)—Ni (0.5 μm thick electroplated)—Au (3 μm thick electroplated). The board 1 has a number of recesses 3, each of, e.g., 0.6×0.6×0.16 mm having an angle α of inclination of the walls towards the plane of the board surface equal to α=120°. In this case, with the layer of a binder 4 on the bottom of the recess being 10 μm thick, a distance between a chip 5 and the upper edge of the recess 3 equals 87 μm. An adhesive 1 such as -C (Standard Specifications bIyO 0.028.052 TY) may be used as the binder 4.

[0020] The chip 5 of the chip transistor 3325A-5 of 0.5×0.5×0.15 mm is mounted in the recess 3 so that its surface is coincided with the surface plane of the board 1. Contact pads 6 of the chip 5 are electrically connected to the topological metallization pattern 2 by means of a 15 μm diameter golden wire 7.

[0021] The recesses 3 (FIG.3) may be metal-coated and the structure of metallization 8 may be, e.g., Pd—Ni (0.2 μm thick chemically deposited)—Cu (3 μm electroplated)—Ni (0.5 μm electroplated)—Au (3 μm electroplated).

[0022] In the bottom of the recess 3 (FIG.4) metallized holed 9 are made having a diameter of, e.g., 100 μm filled with an electrically and heat conducting material 10, for instance, grown with copper preliminarily activated with PdCl₂+SnCl₂. The back side of the board 1 is provided with a shield grounding metallization 11 having a structure similar to that of the metallization 2 on the face side of the board 1.

[0023] The microwave hybrid integrated circuit, according to the invention, functions as follows,:

[0024] A signal is applied to the input of the transistor amplifier stage, which undergoes an appropriate conversion, whereupon the amplified signal arrives at the stage output.

[0025] The filed microwave hybrid integrated circuit allows to increase the reproducibility of electrical circuit parameters by reducing the variation in the length of the interconnecting wires (leads) of the semiconductor chip to increase the manufacturability due to a more accurate fitting of the chip in the recess and its orientation therein, as well as due to a simpler connection between the recess metallization and the topological metallization pattern. All the mentioned above makes it possible to reduce the laboriousness of the circuit trimming procedure.

[0026] Moreover, the metallization of the recesses and their connection to the topological metallization pattern allows to enhance the circuit reliability.

[0027] In describing the disclosed embodiments of the present invention, specific narrow terminology is used for the sake of clarity. However, the invention is not restricted to the specific terms so selected, and it should be understood that each such term covers all equivalent elements functioning in a similar way and used for solving similar problems.

[0028] Although the present invention has been described herein with reference to the preferred embodiment, it will be understood that various modifications and alterations may occur to the details of construction without departing from the spirit and scope of the invention, as will be readily understood by those skilled in the art.

[0029] All these modifications and alterations should be considered to remain within the limits of the spirit and scope of the invention and the claims that follow.

[0030] The present invention can be used in semiconductor microelectronics.