Exchanging converter having a zero-voltage switching control circuit for driving an output voltage filter capacitor to partially feed back storage energy to an input side of the transformer or storage inductor

[0002] 1. Field of the Invention

[0003] The present invention relates to an exchanging converter with a zero potential switching control function, and more particularly to such a converter, which drives every switch to achieve a switching operation at a zero-voltage status, so as to effectively eliminate power loss due to a high frequency switching operation.

[0004] 2. Description of the Prior Art

[0005] In recent years, semiconductor fabrication technology has rapidly developed, and semiconductor elements are made more and more smaller. This development trend in semiconductor fabrication drives electronic product manufacturers to create and design thinner, lighter and shorter products. However, in conventional hard type exchanging converters, a power switch is operated under a high frequency environment. This operation consumes much power, and produces much heat. In order to prevent damage due to heat, a heat sink, fan, and suitable cooling means must be installed to carry heat from the converter. Further, these conventional hard type-switching converters are expensive, and wear quickly with use. Because of the aforesaid numerous drawbacks, conventional hard type switching converters cannot be made as small as desired.

[0006] Since 1980, following the development of microcomputer, “small-size” has become more and more important in the fabrication of electronic products. In order to meet this requirement, the following converters are developed:

[0007] (1) Flyback Converter

[0008] A flyback converter, as shown in FIG. 1, comprises an input voltage filter capacitor C₁connected between two opposite ends of an input power source V_into provide a stable input voltage to a posterior converter. The posterior converter comprises a transformer. The transformer comprises a primary winding L_pand a secondary winding L_s. The primary winding L_pis connected to a switching element S₁, forming a series loop at two opposite sides of the filter capacitor C₁. The secondary winding L_sis connected to a diode D₁, forming a series loop at two opposite sides of a filter capacitor C₂. Modulated high frequency from the switching element S₁is smoothed through the posterior converter, so that the transformer provides a DC output voltage V_oto the load. In this flyback converter, when the switching element S₁is on, input power source V_incharges the primary winding L_p, enabling energy to be stored therein. At this time, the polarity of the primary winding L_pis reversed to the secondary winding L_s, and the diode D₁is biased reversely, and therefore the output voltage filter capacitor C₂provides the load with the necessary energy. When the switching element S₁is off, the magnetic flux at the transformer starts to contract, and the voltage polarity of the second winding L_sis reversed to produce an induced current, thereby causing the diode D₁to be electrically connected. When the diode D₁is electrically connected, it charges the filter capacitor C₂, enabling electricity to be outputted to the load. Because a high voltage exists in the switching element S₁when the switching element S₁is off, a potential energy (CV²/2) is accumulated in its parasitic capacitance. This potential energy (CV²/2) is changed into heat energy at the moment the switching element S₁is switched off. Therefore, the switching element produces high heat under a high frequency switching environment, and wears quickly with use. U.S. Pat. No. 5,057,986 discloses a converter, which eliminates the aforesaid problem. According to this design, as shown in FIG. 2, another switching element S₂and capacitor C_pare added to the primary circuit, so that the resonance formed at the parasitic capacitance of the inductance Lp, capacitor C_pand switching elements S₁;S₂of the converter is utilized to achieve a zero-voltage control scheme. However, because this zero-voltage control scheme provides the necessary energy for zero-voltage control by means of the inductor Lp, zero-voltage control becomes more difficult to achieve when the load is high. U.S. Pat. No. 5,402,329 discloses another design, in which, as shown in FIG. 3, a small inductance L₁is installed in the converter to provide the necessary energy for zero-voltage control. This inductance can be an externally added inductance, or a leakage inductance of the transformer itself. This design eliminates the drawback of the disclosure of U.S. Pat. No. 5,057,986, however because the zero-voltage control of this design relies on the stray capacitance and leakage inductance of the circuit, which is difficult to specify when designing and fabricating this structure of converter.

[0009] (2) Boost Converter

[0010] A boost converter, as shown in FIG. 4, is used to improve power factor correction. Because power factor correction runs under a high voltage environment, a voltage of about 400V exists when the switching element S₁is switched off, and accumulated high electric energy will be changed into heat energy at the switching element S₁at the moment the switching element S₁is switched on, causing the service life of the switching element S₁to be shortened. In 1992 Lee Yuan-Tse et al disclosed another design of converter, in which, as shown in FIG. 5, an auxiliary switch S₂, an inductor L₂and a diode D₂are added to the circuit shown in FIG. 4. When operated, the auxiliary switch S₂is transiently turned on and maintained electrically connected until the voltage at the switching element S₁is discharged, and the switching element S₁is turned on to complete zero-voltage switching control when reached the status of zero-voltage is reached. This design greatly increases the cost. Because of high cost, this design is not popularly accepted. FIG. 6 shows another design according to U.S. Pat. No. 5,402,329. This design simply reduces discharge loss at the switching element S₁due to deposit charge at the rectifier diode D₁. However, because the switching element S₁uses a hard type switching mode, power loss under a high frequency switching operation is still significant.

[0011] (3) Buck Converter

[0012] A buck converter, as shown in FIG. 7, is designed for use under a low voltage high current condition. This design biases the reduction of turn-on power loss at the switching element S₁and the rectifier diode D₁, however it neglects switching loss, and no application example of this design has been disclosed. FIG. 8 shows another design of a buck converter, in which power MOSFET transistors Q₁and Q₂are used as substitutes for the switching element S₁and the rectifier diode D₁. Because these two transistors Q₁and Q₂adopt complementary switching, the advantage of low impedance of these two transistors Q₁and Q₂is used to reduce turn-on loss. However, because these two transistors Q₁and Q₂require a hard switching mode, a high power loss during switching of the switching element is inevitable when used in a high voltage condition.

[0013] The present invention has been accomplished to provide an exchanging converter with a zero-voltage switching control function, which eliminates the aforesaid drawbacks. According to the present invention, the exchanging converter comprises a zero-voltage switching control circuit. The zero-voltage switching control circuit drives an output voltage filter capacitor to partially feed back storage energy to an input side thereof by means of the operation of a transformer (or storage inductor), and provides a complementary driving signal to switches in the exchanging converter when the switches reach a zero-voltage switching control condition, so as to control turn-off or turn-on time of the switches, enabling the switches and to repeat the switching operation at zero-voltage again and again.

[0014] FIG. 1 illustrates the basic architecture of a conventional flyback converter.

[0015] FIG. 2 illustrates the basic architecture of a flyback converter according to U.S. Pat. No. 5,057,986.

[0016] FIG. 3 illustrates the basic architecture of a flyback converter according to U.S. Pat. No. 5,402,329.

[0017] FIG. 4 illustrates the basic architecture of a conventional boost converter.

[0018] FIG. 5 illustrates the basic architecture of a switching type boost converter according to the prior art.

[0019] FIG. 6 illustrates the basic architecture of another switching type boost converter according to the prior art.

[0020] FIG. 7 illustrates the basic architecture of a conventional buck converter.

[0021] FIG. 8 illustrates the basic architecture of a low turn-on loss type buck converter according to the prior art.

[0022] FIG. 9 illustrates the circuit architecture of an exchanging converter according to one embodiment of the present invention.

[0023] FIG. 10 illustrates voltage or current waveform of every major component part of the circuit shown in FIG. 9.

[0024] FIG. 11 illustrates the circuit architecture of an exchanging converter according to an alternate form of the present invention.

[0025] FIG. 12 illustrates voltage or current waveform of every major component part of the circuit shown in FIG. 11.

[0026] FIG. 13 illustrates the circuit architecture of an exchanging converter according to another alternate form of the present invention.

[0027] FIG. 14 illustrates voltage or current waveform of every major component part of the circuit shown in FIG. 13.

[0028] The present invention uses a zero-voltage switching control circuit SK₁to control a power converter, enabling an output voltage filter capacitor to partially feed back storage energy to an input side thereof by means of the operation of a transformer (or storage inductor), and to provide a complementary driving signal to switches in the exchanging converter when the switches reach a zero-voltage switching control condition, so as to control turn-off or turn-on time of the switches, enabling the switches and to repeat the switching operation at zero-voltage again and again. The zero-voltage switching control circuit SK₁regulates its pulse width by detecting the output voltage of the exchanging converter. The switches can be power MOSFETs having a respective rectifier diode.

[0029] FIG. 9 shows a circuit design of the present invention used in a flyback converter. The circuit comprises an input voltage filter capacitor C₁bridged the two opposite ends of input power source V_into provide a stable input voltage to a posterior converter. The posterior converter comprises a transformer T₁for storing and releasing electric energy. The transformer T₁comprises a primary winding L_pand a secondary winding L_s. The inductance of the primary winding L_pand the secondary winding i_pare i_s, and the ratio of number of turns between the primary winding L_pand the secondary winding i_pis N:1. The primary winding L_pis connected in series to a primary power switch Q₁, forming a series loop bridging the two opposite ends of the filter capacitor C₁. The secondary winding L_sforms with a secondary power switch Q₂a series loop bridging the two opposite ends of an output voltage filter capacitor C₂. The output voltage filter capacitor C₂smooths the high frequency switching waveform modulated by the switches Q₁and Q₂, so as to provide a stable DC output voltage V_oto the load bridging the output ends.

[0030] During operation, the voltage or current waveform of every major component part of the circuit is as shown in FIG. 10. As illustrated, when t=t₁, the control circuit SK₁outputs a forward pulse wave driving voltage V_GS1to the gate of the primary power switch Q₁, causing the primary power switch Q₁to be turned on, and at this time, the input voltage V_inis almost fully added to the primary winding L_pif the impedance of the passage is neglected. Therefore, a charging current i_ppasses through the primary winding L_p, and the value of the charging current i_pis subject to the following equation (1): $\begin{array}{cc}{i}_P\left(t\right)=i_P\left(t_1\right)+\frac{V_{in}}{L_P}\left(t-t_1\right)& \left(1\right)\end{array}$

[0031] in which, i_p(t₁) is the initial charging value; V_in/L_pis the charging slope. At this stage, the voltage induced by the secondary winding L_sis a reversed bias voltage to the rectifier diode D_bof the secondary power switch Q₂, and the passage at the secondary power switch Q₂is turned off, so that i_s=0.

[0032] When t=t₂, the control circuit SK₁changes the forward pulse wave driving voltage V_GS1to zero potential, causing the primary power switch Q₁to be turned off, and at this time, the charging current i_pis turned off, and the magnetic flux established by the charging current i_pat the transformer T₁starts to contract, causing the induced current i_sto pass from the secondary winding L_sto the diode D_bto charge the filter capacitor C₂. The value of the induced current i_s, when the forward voltage drop of the diode D_bis not considered, is subject to the following equation (2): $\begin{array}{cc}{i}_S\left(t\right)=i_P\left(t_2\right)\times N-\frac{V_o}{L_S}\left(t-t_2\right)& \left(2\right)\end{array}$

[0033] in which, i_p(t₂)×N is the initial discharging value of the induced current i_s, and −V_o/L_sis its discharging slope. In this embodiment, when the diode D_bis turned on by the induced current i_s, the voltage V_GS2between the drain and source of the secondary power switch Q₂is approximately at the zero potential status, and this zero potential status is maintained unchanged until zero current at the diode D_b. Therefore, the period where the diode D_bis maintained turned on is the time for the secondary power switch Q₂to perform a zero-voltage switching operation, and t₃can be any time spot in this period.

[0034] When t=t₃, the control circuit SK₁outputs a forward pulse wave V_GS2to the gate of the secondary power switch Q₂, causing the secondary power switch Q₂to be turned on, and at this time, the passage impedance at the secondary power switch Q₂is lower than the diode D_b, therefore current is mainly shunted from the diode D_b, to the passage at the secondary power switch Q₂, and when the energy is completely discharged from the secondary winding L_s, i.e. when i_s=0, the passage of the secondary power switch Q₂is maintained turned on, and the voltage passes from the filter capacitor C₂through the secondary power switch Q₂to charge the secondary winding L_sof the transformer T₁, causing the current value of the current i_sto be changed to a negative value, although its charging slope is still maintained at −V_o/L_s.

[0035] When the secondary winding L_sobtains a certain energy due to the charging operation of the capacitor C₂, i.e., when t=t₄, the control circuit SK₁changes the driving voltage V_GS1to zero potential, causing the secondary power switch Q₂to be turned off, and at this time, the current i_sis turned off, and the magnetic flux established by the current i_sat the transformer T₁starts to contract, causing the induced current i_pto pass from the primary winding L_pto the diode D_aand to charge the filter capacitor C₁. The value of the current i_p, when the forward voltage drop of the diode D_ais not considered, is subject to the following equation (3): $\begin{array}{cc}{i}_P\left(t\right)=\frac{i_S\left(t_4\right)}{N}+\frac{V_{in}}{L_P}\left(t-t_4\right)& \left(3\right)\end{array}$

[0036] in which, i_s(t₄)/N is the initial discharging value and ; V_in/L_pis the charging slope. In this embodiment, when the diode D_ais turned on, the voltage V_DS1between the drain and source of the primary power switch Q₁is approximately at the zero potential status, and this zero potential status is maintained unchanged until zero current at the diode D_a. Therefore, the period where the diode D_ais maintained turned on is the time for the primary power switch Q₁to perform a zero-voltage switching operation, and t₅can be any time spot in this period.

[0037] When t=t₅, the control circuit SK₁outputs a forward pulse wave V_GS1to the gate of the primary power switch Q₁, causing the primary power switch Q₁to be turned on, and at this time, the passage impedance at the primary power switch Q₁is lower than at the diode D_a, causing current to be mainly shunted from the body diode D_a, to the passage at the primary power switch Q₁, and when the energy is completely discharged from the primary winding L_p, i.e. when i_p=0, the passage of the primary power switch Q₁is maintained turned on, and the voltage passes from the filter capacitor C₁through the primary power switch Q₁to charge the primary winding L_pof the transformer T₁, so as to store energy in the transformer T₁, and at this stage, the slope of the charging current i_pis still maintained at V_in/L_p. Therefore, by means of controlling the output time sequence of the output pulse wave V_GS2and the output pulse wave V_GS1, the control circuit SK₁drives the switches Q₁and Q₂to be repeatedly turned on at zero-voltage again and again to effectively reduce the switches Q₁and Q₂from power loss during a high frequency switching operation.

[0038] FIG. 11 shows a circuit design of the present invention used in a boost converter. The circuit comprises an input voltage filter capacitor C₁bridging the two opposite ends of input power source V_in, a storage inductor L₁and a charging power switch Q₁connected in series and bridging the two opposite ends of the filter capacitor C₁, and a discharging power switch Q₂connected in series to the charging power switch Q₁and forming with the charging power switch Q₁a series loop bridging the two opposite ends of an output voltage filter capacitor C₂. The drain of the charging power switch Q₁is connected to the source of the discharging power switch Q₂, and its source is connected to the negative terminal of the capacitor C₂, so that the filter capacitor C₂is capable of providing a stable DC output voltage V_oto the load at its output end.

[0039] During operation, the voltage or current waveform of every major component part of the circuit of FIG. 11 is shown in FIG. 12. As illustrated, when t=t₁, the control circuit SK₁outputs a forward pulse wave driving voltage V_GS1to the gate of the power switch Q₁, causing the power switch Q₁to be turned on, and at this time, the passage of the power switch Q₂is off, and the input voltage V_inis almost fully added to the storage inductor L₁. Therefore a charging current i₁passes through the storage inductor L₁, and the value of the charging current i₁is subject to the following equation (4): $\begin{array}{cc}{i}_1\left(t\right)=i_1\left(t_1\right)+\frac{V_{in}}{L_1}\left(t-t_1\right)& \left(4\right)\end{array}$

[0040] in which, i₁(t₁) is the initial charging value and; V_in/L₁is the charging slope. At this stage, the input voltage V_inis lower than the output voltage V_o, the voltage across the diode D_bof the power switch Q₂is a reverse bias voltage, and the passage of the power switch Q₁is turned off. Therefore, i₁=i₃, and i₂=0.

[0041] When t=t₂, the control circuit SK₁changes the forward pulse wave driving voltage V_GS1to zero potential, causing the power switch Q₁to be turned off. At this time, the induction current i₁must be maintained in continuation, and the passage of the power switch Q₂is maintained off, the direction of the diode D_bprovides a path for the induction current i₁to charge the filter capacitor C₂, and voltage at the storage inductor L₁, if the forward voltage drop of the diode D_bis not considered, is equal to (V_o−V_in) when the diode D_bis turned on, and the value of the induced current i_sis subject to the following equation (5): $\begin{array}{cc}{i}_1\left(t\right)=i_1\left(t_2\right)-\frac{V_o-V_{in}}{L_1}\left(t-t_2\right)& \left(5\right)\end{array}$

[0042] in which, i₁(t₂) is the initial discharging value of the induced current i₁, and −(V_o−V_in)/L, is its discharging slope. In this embodiment, when the body diode D_bis turned on by the induced current i₁, the voltage V_GS2between the drain and source of the power switch Q₂is approximately at the zero potential status, and this zero potential status is maintained unchanged until zero current is reached at the diode D_b. Therefore, the period where the rectifier diode D_bis maintained turned on is the time for the power switch Q₂to perform a zero-voltage switching operation, and t₃can be any time spot in this period.

[0043] When t=t₃, the control circuit SK₁outputs a forward pulse wave V_GS2to the gate of the secondary power switch Q₂, causing the power switch Q₂to be turned on, and at this time, the passage impedance at the secondary power switch Q₂is lower than the body diode D_b, therefore current is mainly shunted from that of diode D_b. Therefore, to the passage at the power switch Q₂, and when the energy is completely discharged from the storage inductor L₁, i.e. when i₁=0, the passage of the power switch Q₂is maintained turned on, and the voltage passes from the filter capacitor C₂through the power switch Q₂to charge the storage inductor L₁and the capacitor C₁, causing the current value of the current i_sto be changed to a negative value, even though its charging slope is still maintained at −(V_o−V_in)/L₁.

[0044] When the storage inductor L₁obtains certain energy due to charging operation of the capacitor C₂, i.e., when t=t₄, the control circuit SK₁changes the driving voltage V_GS2to zero potential, causing the power switch Q₂to be turned off, and at this time, the current i₁is maintained in continuation, and the current i₁passes from the storage inductor L₁to the diode D_aand to charge the filter capacitor C₁. The value of the current i₁, when the forward voltage drop of the diode D_ais not considered, is subject to the following equation (6): $\begin{array}{cc}{i}_1\left(t\right)=i_1\left(t_4\right)+\frac{V_{in}}{L_1}\left(t-t_4\right)& \left(6\right)\end{array}$

[0045] in which, i₁(t₄) is the initial discharging value of the i₁; and V_in/L₁is the charging slope. In this embodiment, when diode D_ais turned on by the current i₁, the voltage V_DS1between the drain and source of the power switch Q₁is approximately at the zero potential status, and this zero potential status is maintained unchanged until zero current at diode D_a. Therefore, the period where diode D_ais maintained turned on is the time for the primary power switch Q₁to perform a zero-voltage switching operation, and t₅can be any time spot in this period.

[0046] When t=t₃, the control circuit SK₁outputs a forward pulse wave V_GS1to the gate of the power switch Q₁, causing the power switch Q₁to be turned on, and at this time, the passage impedance at the power switch Q₁is lower than that of the body diode D. Therefore, current is mainly shunted from the diode D_a, to the passage at the power switch Q₁, and when the energy is completely discharged from the storage inductor L₁, i.e. when i₁=0, the passage of the power switch Q₁is maintained turned on, causing the voltage to pass from the filter capacitor C₁through the power switch Q₁to charge the storage inductor L₁, and the slope is still maintained at V_in/L₁. Therefore, by means of controlling the output time sequence of the output pulse wave V_GS2and the output pulse wave V_GS1, the control circuit SK₁drives the switches Q₁and Q₂to be repeatedly turned on at zero-voltage again and again to effectively protect the switches Q₁and Q₂from power loss during a high frequency switching operation.

[0047] FIG. 13 shows a circuit design of the present invention used in a buck converter. The circuit comprises an input voltage filter capacitor C₁bridging the two opposite ends of input power source V_in, a charging power switch Q₁and a discharging power switch Q₂connected in series and bridging the two opposite ends of the filter capacitor C₁, a storage inductor L₁forming with the discharging power switch Q₂a series loop bridging the two opposite ends of an output voltage filter capacitor C₂. The storage inductor L₁and filter capacitor C₁form a low-pass filter to smooth the high frequency waveform outputted from the switches Q₁and Q₂, so as to provide a stable DC output voltage V_oto the load at its output end.

[0048] During operation, the voltage or current waveform of every major component part of the circuit of FIG. 13 is shown in FIG. 14. As illustrated, when t=t₁, the control circuit SK₁outputs a forward pulse wave driving voltage V_GS1to the gate of the power switch Q₁, causing the power switch Q₁to be turned on, and at this time, the passage of the power switch Q₂is off, and the input voltage V_inis greater than the output voltage V_in. Therefore, a voltage drop −(V_in−V_o) exists in the storage inductor L₁, which voltage drop forms a charging current i₂at the storage inductor L₁, and the value of the charging current i₁is subject to the following equation (7): $\begin{array}{cc}{i}_2\left(t\right)=i_2\left(t_1\right)+\frac{V_{in}-V_o}{L_1}\left(t-t_1\right)& \left(7\right)\end{array}$

[0049] in which, i₂(t₁) is the initial charging value and; (V_in−V_o)/L₁is the charging slope. At this stage, current i₁=i₂, and i₃=0.

[0050] When t=t₂, the control circuit SK₁changes the forward pulse wave driving voltage V_GS1to zero potential, causing the power switch Q₁to be turned off. At this time, the induction current i₂must be maintained in continuation, and the passage of the power switch Q₂is maintained off. The direction of the body diode D_bprovides a path for the induction current i₂to charge the filter capacitor C₂, and the voltage at the storage inductor L₁, if the forward voltage drop of the diode D_bis not considered, is equal to V_owhen the body diode D_bis turned on, and the value of the induced current i₂is subject to the following equation (8): $\begin{array}{cc}{i}_2\left(t\right)=i_2\left(t_2\right)-\frac{V_o}{L_1}\left(t-t_2\right)& \left(8\right)\end{array}$

[0051] in which, i₂and (t₂) is the initial discharging value of the current i₂, −V_o0/L₁is its discharging slope. In this embodiment, when the diode D_bis turned on by the current i₂, the voltage V_GS2between the drain and source of the power switch Q₂is approximately at the zero potential status, and this zero potential status is maintained unchanged until zero current at the diode D_b. Therefore, the period where the body diode D_bis maintained turned on is the time for the power switch Q₂to perform a zero-voltage switching operation, and t₃can be any time spot in this period.

[0052] When t=t₃, the control circuit SK₁outputs a forward pulse wave V_GS1to the gate of the power switch Q₂, causing the power switch Q₂to be turned on, and at this time, the passage impedance at the power switch Q₂is lower than at the diode b_a. Therefore, current is mainly shunted from the body diode D_b, to the passage at the power switch Q₂, and when the energy is completely discharged from the storage inductor L₁, i.e. when i₂=0, the passage of the power switch Q₂is maintained turned on, causing the voltage to pass from the filter capacitor C₂through the power switch Q₂to charge the storage inductor L₁, causing the current i₂to be changed to negative status, and the slope to still be maintained at −V_o/L₁.

[0053] When the storage inductor L₁obtains certain energy due to charging operation of the capacitor C₁, i.e., when t=t₄, the control circuit SK₁changes the driving voltage V_GS2to zero potential, causing the power switch Q₂to be turned off, and at this time, the current i₂is maintained in continuation, and the current i₂passes from the storage inductor L₁to the diode D_aand to charge the filter capacitor C₁. The value of the current i₂, when the forward voltage drop of the diode D_ais not considered, is subject to the following equation (9): $\begin{array}{cc}{i}_2\left(t\right)=i_2\left(t_4\right)+\frac{V_{in}-V_o}{L_1}\left(t-t_4\right)& \left(9\right)\end{array}$

[0054] in which, i₂(t₄) is the initial discharging value of the inductance and, −(V_in−V_o)/L₁is its discharging slope. In this embodiment, when the body diode a_bis turned on by the current i₂, the voltage V_DS1between the drain and source of the power switch Q₁is approximately at the zero potential status, and this zero potential status is maintained unchanged until zero current at the body diode D_ais reached. Therefore, the period where the diode D_ais maintained turned on is the time for the power switch Q₁to perform a zero-voltage switching operation, and t₃can be any time spot in this period.

[0055] When t=t₃, the control circuit SK₁outputs a forward pulse wave V_GS1to the gate of the power switch Q₁, causing the power switch Q₁to be turned on, and at this time, the passage impedance at the power switch Q₁is lower than at the diode D_a. Therefore current is mainly shunted from the body diode D_a, to the passage at the power switch Q₁, and when the energy is completely discharged from the storage inductor L₁, i.e. when i₂=0, the passage of the power switch Q₁is maintained turned on, causing the voltage to pass from the filter capacitor C₁through the power switch Q₁to charge the storage inductor L₁, and the capacitor C₂, and the slope to still be maintained at (V_in−V_o)/L₁.

[0056] Thus, by means of controlling the output time sequence of the output pulse wave V_GS1and the output pulse wave V_GS2, the control circuit SK₁drives the switches Q₁and Q₂to be repeatedly turned on at zero-voltage again and again to effectively protect the switches Q₁and Q₂from power loss during a high frequency switching operation.

[0057] Further, the control circuit SK₁can be designed to operate at a rated or frequency converting mode. When at the rated mode, the inductance of the transformer (or storage capacitor) must be sufficient to satisfy the requirement for zero-voltage control within the range of full load, so that the power switches Q₁and Q₂can be turned on at any time under zero-voltage. Therefore, the switching frequency will be lower when the load becomes greater, and vice versa.

[0058] In conclusion, the present invention uses a control circuit SK₁having a zero-voltage control function to drive the power switch means of a flyback converter, boost converter or buck converter to achieve a switching operation under zero-voltage, so that power loss due to a high frequency operation is eliminated. Because the design greatly reduces accumulated heat at the switch means, the size of the heat sink can be greatly reduced. Therefore, the present invention is practical for use in all electronic products of small design.

[0059] It is to be understood that the drawings are designed for purposes of illustration only, and are not intended for use as a definition of the limits and scope of the invention disclosed.