Piezoelectric inverter

[0002] 1. Field of the Invention

[0003] The present invention relates to a piezoelectric inverter for driving a load using a piezoelectric transformer, and, more particularly, to a piezoelectric inverter that is preferably used as a lighting circuit for a discharge tube, such as a cold-cathode tube for use in a liquid-crystal backlight.

[0004] 2. Description of the Related Art

[0005] Small cold-cathode tubes are conventionally used as an backlight illumination source for a liquid-crystal display apparatus. To drive a cold-cathode tube, a piezoelectric transformer, rather than a magnetic transformer, is used because of the compact design and low cost thereof.

[0006] Japanese Unexamined Patent Publication No. 7-220888 discloses a driver of a backlight cold-cathode tube employing a piezoelectric transformer. According to this disclosure, a chopper circuit is connected between a direct-current power source and an inverter driving the piezoelectric transformer. The piezoelectric transformer is connected to the cold-cathode tube, and a current flowing through the cold-cathode tube is detected by a tube current detector circuit. The luminance of the cold-cathode tube is maintained constant by controlling a duty factor of the chopper circuit to maintain the tube current constant.

[0007] Japanese Unexamined Patent Publication No. 9-107684 discloses a piezoelectric transformer drive circuit which controls a tube current to a desired value by making use of frequency-versus-gain characteristics of the piezoelectric transformer. Connected between an input terminal and the piezoelectric transformer are a drive voltage control circuit having no parts for rectifying and smoothing, and a voltage multiplication circuit. The drive voltage control circuit maintains constant a mean input voltage applied to the voltage multiplication circuit. A cold-cathode tube is connected to the piezoelectric transformer. Also provided is a frequency control circuit which detects a current flowing through the cold-cathode tube, and controls the tube current to a desired value taking advantage of the frequency-versus-gain characteristics of the piezoelectric transformer.

[0008] When the input voltage to the voltage multiplication circuit increases with no drive voltage control circuit employed in the control method using the frequency-versus-gain characteristics of the piezoelectric transformer, a drive voltage frequency of the piezoelectric transformer shifts to a high frequency side where the voltage multiplication ratio or gain of the piezoelectric transformer is small, thereby cancelling the increase in the input voltage. The conversion efficiency of the piezoelectric transformer drops in a frequency region where the voltage multiplication ratio is small. In this conventional art, the drive voltage control circuit maintains constant the mean voltage to the voltage multiplication circuit, thereby maintaining the drive voltage frequency of the piezoelectric transformer to a frequency at which efficiency is high. It is therefore believed that the conventional art keeps a relatively high efficiency within a wide input voltage range.

[0009] In the conventional art disclosed in Japanese Unexamined Patent Publication No. 7-220888, the output of the chopper circuit is a direct current, and the chopper circuit is thought to be a DC-DC converter. To construct the chopper circuit of a DC-DC converter, inductors and capacitors, for rectifying and smoothing, are required. The component count of the circuit increases, and loss attributed thereto is also increased.

[0010] The piezoelectric transformer drive circuit, disclosed in Japanese Unexamined Patent Publication No. 9-107684, needs no rectifier circuit, thereby avoiding the loss attributed thereto.

[0011] The conventional art, disclosed in Japanese unexamined Patent Publication No. 9-107684, however, needs two types of feedback control: 1) frequency control for maintaining constant the tube current through a frequency control circuit, and 2) pulse width duty factor control through the drive voltage control circuit for maintaining constant the voltage input to the voltage multiplication circuit. The control circuit therefore becomes complicated, increasing costs involved.

[0012] Accordingly, it is an object of the present invention to provide a piezoelectric inverter which is low cost, has a simplified control circuit, free from the above problem, needs no rectifying and smoothing circuits, and reliably drives a load using a piezoelectric transformer.

[0013] According to one broad aspect of the present invention, a piezoelectric inverter for driving a load using a piezoelectric transformer, includes an input voltage controller, having a switching transistor and a current circulating element, for converting a direct-current input voltage into a rectangular alternating-current voltage, a piezoelectric transformer driver, connected between the input voltage controller and the piezoelectric transformer, and including an inductive element, for outputting, to the piezoelectric transformer, an alternating-current voltage having a substantially constant frequency that is lower than the frequency of an output alternating-current voltage of the input voltage controller, a first oscillator for determining an operating frequency of the input voltage controller, a second oscillator for determining an operating frequency of the piezoelectric transformer driver, the piezoelectric transformer having an input electrode and an output electrode with the input electrode thereof connected to the piezoelectric transformer driver and the output electrode thereof connected to the load, a load current detector, connected to the load, for detecting a load current, and a duty factor controller, connected to the load current detector, for controlling a duty factor of a rectangular pulse of the input voltage controller in response to the output of the load current detector so that the load current is maintained to a substantially constant target current value, wherein an oscillation frequency of the second oscillator is not higher than a frequency at which the voltage multiplication ratio of the piezoelectric transformer becomes maximized with no load applied to the output of the piezoelectric transformer, and the oscillation frequency of the second oscillator is not lower than a frequency at which the voltage multiplication ratio of the piezoelectric transformer becomes maximized with the piezoelectric transformer driving the load connected to the output thereof.

[0014] Preferably, the second oscillator includes a frequency divider that frequency-divides the frequency of the first oscillator, and a signal into which the frequency of the first oscillator is divided is the output of the second oscillator, and a single oscillator is shared by the first oscillator and the second oscillator.

[0015] Preferably, a piezoelectric inverter of the present invention further includes a temperature-compensating circuit which controls the temperature dependence of required mean output voltage of the input voltage controller, thereby compensating for the dependence of the oscillation frequency of the second oscillator on ambient temperature.

[0016] The temperature-compensating circuit preferably includes one of a thermistor or a temperature-compensating capacitor.

[0017] The target current value is preferably changed in response to an externally applied, first dimmer signal.

[0018] Preferably, a piezoelectric inverter of the present invention further includes a variable oscillation-frequency circuit that varies the oscillation frequency of one of the first and second oscillators in response to the first dimmer signal without using feedback control. The oscillation frequency of the second oscillator may be varied by varying the output frequency of the first oscillator, and then by frequency-dividing the output frequency of the first oscillator. Preferably, a piezoelectric inverter of the present invention further includes a load drive time controller which varies an on time ratio of the load in response to an externally applied, second dimmer signal by intermittently switching on and off the driving of the load.

[0019] Preferably, a piezoelectric inverter of the present invention further includes a rectifier for rectifying the load current detected by the load current detector and outputting a direct current in response to the load current, wherein, when the inverter works to set the load to be in an on state, or the load is in an on state, a voltage, substantially equal to a voltage occurring at the output of the rectifier, is applied to the output of the rectifier during a period throughout which the inverter operates to set the load to be in an off state, or the load is in an off state.

[0020] Preferably, a piezoelectric inverter further includes a dead-time controller for controlling a duty factor of a rectangular pulse of the input voltage controller to be not higher than a constant value, without dependence on a current flowing through the load and the output voltage of the rectifier, wherein the duty factor of the rectangular pulse controlled by the dead-time controller varies in response to an input voltage.

[0021] Preferably, a piezoelectric inverter further includes a circuit operation stopping unit which stops the operation of the inverter when a duration, during which the current flowing through the load fails to coincide with the target current value, exceeds a predetermined constant duration of time.

[0022] Preferably, a constant duration from the occurrence of an abnormal event to a stop of the operation of the circuit is varied by a constant of an externally connected component.

[0023] Preferably, an excessive rise in the output voltage of the piezoelectric transformer is prevented by varying, toward a high frequency side, the oscillation frequency of the second oscillator when the output voltage of the piezoelectric transformer exceeds a desired value. In this case, the frequency of the first oscillator may be varied, and is then frequency-divided as a frequency of the second oscillator. Alternatively, an excessive rise in the output voltage of the piezoelectric transformer may be prevented by decreasing the duty factor of the output rectangular pulse of the input voltage controller when the output voltage of the piezoelectric transformer exceeds a desired value. Preferably, a startup operation is carried out while the oscillation frequency of the second oscillator sweeps from a high frequency side to a low frequency side.

[0024] Preferably, the oscillation frequency of the second oscillator is shifted to a low frequency lower than a normal oscillation frequency thereof when the input voltage is lower than a desired frequency.

[0025] The piezoelectric inverter of this invention is used to drive a variety of loads, and is suited for use in lighting and light adjustment control of a discharge tube in particular. Such discharge tubes include, but not limited to, a cold-cathode tube for a liquid-crystal backlight.

[0026] FIG. 1 is a block diagram generally showing a piezoelectric inverter of a first embodiment of the present invention;

[0027] FIG. 2 is a circuit diagram specifically showing the circuit of the piezoelectric inverter shown in FIG. 1;

[0028] FIG. 3 is a waveform diagram of voltages at various points in the circuit of the piezoelectric inverter shown in FIG. 2;

[0029] FIG. 4 is a graph showing frequency-versus-gain characteristics of a piezoelectric transformer;

[0030] FIG. 5 is a circuit diagram of a piezoelectric inverter of a second embodiment of the present invention;

[0031] FIG. 6 is a circuit diagram of a piezoelectric inverter of a third embodiment of the present invention;

[0032] FIG. 7A through FIG. 7D are circuit diagrams of temperature-compensating circuits connected to a second frequency oscillator;

[0033] FIG. 8 is a circuit diagram showing a piezoelectric inverter of a fourth embodiment of the present invention;

[0034] FIG. 9 is a circuit diagram showing a piezoelectric inverter of a fifth embodiment of the present invention;

[0035] FIG. 10 is a circuit diagram showing a piezoelectric inverter of a sixth embodiment of the present invention;

[0036] FIG. 11 is a circuit diagram showing a piezoelectric inverter of a seventh embodiment of the present invention;

[0037] FIG. 12 is a graph showing frequency-versus-gain characteristics of a piezoelectric transformer with a high-impedance load and a low-impedance load connected thereto;

[0038] FIG. 13 is a graph showing oscillation frequency-versus-temperature characteristics of an oscillator;

[0039] FIG. 14 is a graph showing output-versus-temperature characteristics of an input voltage controller; and

[0040] FIG. 15 is a graph showing the dependence of the output of the input voltage controller on an input voltage when dead-time control is used.

[0041] The present invention is now discussed in more detail, referring to the drawings.

[0042] FIG. 1 is a block diagram generally showing a piezoelectric inverter of a first embodiment of the present invention, and FIG. 2 is a circuit diagram specifically showing the circuit of the piezoelectric inverter shown in FIG. 1.

[0043] Referring to FIG. 1, an input voltage controller 1 (input voltage control means) receives an input voltage in the piezoelectric inverter of the present invention. The input voltage controller 1 turns on and off the input voltage at a predetermined frequency, thereby converting the input voltage into a rectangular alternating-current voltage. The input voltage controller 1 is composed of a voltage stepdown chopper circuit including neither rectifying circuit nor smoothing circuit.

[0044] A first oscillator 2 is connected to the input voltage controller 1 through a duty factor controller 3. The first oscillator 2 is used to provide the predetermined frequency to the input voltage controller 1.

[0045] The input voltage controller 1 is connected to a piezoelectric transformer driver 4. The piezoelectric transformer driver 4 is connected to a second oscillator 5. The piezoelectric transformer driver 4 performs a switching operation at a frequency determined by the second oscillator 5.

[0046] Specifically, the piezoelectric transformer driver 4 converts the rectangular alternating-current voltage input from the input voltage controller 1 into an alternating-current voltage having the frequency derived from the second oscillator 5 as a main component thereof. The piezoelectric transformer driver 4 includes an inductive element, i.e., an inductor or an electromagnetic transformer.

[0047] The oscillation frequency of the second oscillator 5 is set to be lower than the oscillation frequency of the first oscillator 2. Preferably, the oscillation frequency of the second oscillator 5 is set to be equal to or lower than one-quarter of the oscillation frequency of the first oscillator 2.

[0048] A piezoelectric transformer 6 is fabricated of a known Rosen-type piezoelectric transformer. The piezoelectric transformer driver 4 applies the alternating-current voltage to an input terminal of the piezoelectric transformer 6. The piezoelectric transformer 6 multiplies the input alternating-current voltage and then outputs an alternating-current voltage. The alternating-current voltage output from the piezoelectric transformer 6 is applied to a discharge tube 7 as a load.

[0049] The discharge tube 7 is connected to a current detector 8, which detects a current flowing through the discharge tube 7, namely, a load current.

[0050] A rectifier 9 is connected to an output terminal of the current detector 8. The rectifier 9 rectifies the load current detected through the current detector 8 at a certain time constant, and outputs a direct-current voltage responsive to the load current.

[0051] The rectifier 9 is then connected to the duty factor controller 3. The duty factor controller 3 compares the output voltage of the rectifier 9 to a target voltage corresponding to a predetermined target load current, and controls the duty factor of the rectangular pulse of the input voltage controller 1 so that the output voltage of the rectifier 9 coincides with the target voltage.

[0052] In the circuit arrangement shown in FIG. 1, the voltage control means in this invention includes, in a broad sense, the input voltage controller 1, the first oscillator 2, the duty factor controller 3, the piezoelectric transformer driver 4, the second oscillator 5, the current detector 8, and the rectifier 9. The voltage control means thus controls the mean voltage of the alternating-current voltage input to the piezoelectric transformer 6 so that the current flowing through the load coincides with the target current value.

[0053] The operation of the piezoelectric inverter shown in FIG. 1 is now discussed.

[0054] At startup, a direct-current input voltage from a power source is applied to the input voltage controller 1, and is converted into a rectangular alternating-current voltage in accordance with the oscillation frequency provided by the first oscillator 2. The rectangular alternating-current voltage is then fed to the piezoelectric transformer driver 4, which in turn performs a switching operation in accordance with the oscillation frequency of the second oscillator 5 to switch on and off the input alternating-current voltage.

[0055] The oscillation frequency of the first oscillator 2 is higher than the oscillation frequency of the second oscillator 5, and the inductive element arranged in the piezoelectric transformer driver 4 removes the frequency component derived from the first oscillator 2. The piezoelectric transformer driver 4 outputs almost no frequency component derived from the first oscillator 2 in the output voltage thereof, and the main component of the output voltage thereof is a frequency component of the second oscillator 5.

[0056] The piezoelectric transformer driver 4 drives the piezoelectric transformer 6, and the piezoelectric transformer 6 outputs a high-tension voltage at the output terminal thereof, namely, the output electrode thereof, causing the discharge tube 7 to light. When the discharge tube 7 is lit, a current, namely, a load current starts flowing therethrough.

[0057] The load current is detected by the current detector 8, and a direct-current voltage responsive to the magnitude of the load current is output by the rectifier 9. The duty factor controller 3 compares the direct-current voltage of the rectifier 9 to the constant target voltage corresponding to the target load current and controls the duty factor of the rectangular pulse of the input voltage controller 1 so that the two voltages coincide with each other. The load current is thus controlled to the target current value, and luminance of the discharge tube 7 is thus maintained constant.

[0058] An increase in the load current due to an external disturbance is now considered. The increase in the load current causes the voltages of the current detector 8 and the rectifier 9 to rise. As a result, a difference occurs between the target voltage value and the direct-current voltage. In response to the difference, the duty factor controller 3 reduces the duty factor of the rectangular pulse. The method of reducing the duty factor is not limited to any particular method. For instance, an on time ratio of a switching element in the input voltage controller 1 is reduced, thereby lowering the mean voltage of the input voltage controller 1.

[0059] The piezoelectric transformer 6 operates at a substantially constant frequency determined by the oscillation frequency of the second oscillator 5. When the voltage input to the piezoelectric transformer driver 4 drops, the output voltage of the piezoelectric transformer driver 4 also drops accordingly.

[0060] The load current decreases, controlling the effect of the initial external disturbance.

[0061] When the load current drops due to an external disturbance, control in the opposite direction is performed, thereby maintaining constant the load current.

[0062] In the piezoelectric inverter shown in FIG. 1, the input voltage controller 1 converts the input voltage into the rectangular alternating-current voltage based on the oscillation frequency of the first oscillator 2, and the duty factor controller 3 compares the direct-current voltage output by the rectifier 9 to the target voltage corresponding to the target current value, and controls the rectangular pulse duty factor of the input voltage controller 1 so that the two voltages coincide with each other. The piezoelectric inverter thus controls the load current to the target load current value. Since a voltage stepdown chopper circuit having neither rectifying circuit nor smoothing circuit is employed as the input voltage controller 1, the component count is reduced, and loss involved is reduced accordingly. Since feedback control is used in the duty factor controller 3 only, the circuit arrangement of the control system is simplified.

[0063] Referring to FIG. 2, the piezoelectric inverter of this embodiment is specifically discussed.

[0064] In the circuit diagram shown in FIG. 2, the input voltage controller 1 is composed of a P-type FET1aas a switching element and a diode 1bas a current circulating element. Specifically, the source of the FET1ais connected to an input terminal IN, and the drain thereof is connected to the piezoelectric transformer driver 4. The gate of the FET1ais connected to the duty factor controller 3. The diode 1bis connected between a junction 1cof the drain of the FET1aand the piezoelectric transformer driver 4 and ground in a manner such that the forward direction thereof is aligned to the junction 1c.

[0065] The diode 1bis arranged so that no surge voltage occurs in response to a sharp change in the inductor current of the piezoelectric transformer driver 4 when the FET1ais turned off.

[0066] The piezoelectric transformer driver 4 includes two inductors 4aand 4b, and two N-type FET4cand N-type FET4d. Specifically, ends of two inductors 4aand 4bare connected to the input terminal of the piezoelectric transformer driver 4 in parallel. The other ends of the inductors 4aand 4bare respectively connected to drains of the FET4cand FET4d. The sources of the FET4cand FET4dare respectively grounded. The gates of the FET4cand FET4dare respectively connected to the second oscillator 5.

[0067] A junction 4eof the inductor 4aand the drain of the FET4cforms one output terminal of the piezoelectric transformer driver 4, and a junction 4fof the inductor 4band the drain of the FET4dforms a second output terminal of the piezoelectric transformer driver 4. In other words, the FET4cand FET4dform a push-pull circuit.

[0068] The piezoelectric transformer 6 includes a pair of input electrodes 6aand 6band an output electrode 6c. The input electrode 6ais connected to the junction 4e, and the input electrode 6bis connected to the junction 4f. The piezoelectric transformer 6 is thus driven by the alternating-current voltage output by the piezoelectric transformer driver 4.

[0069] The voltage stepped up by the piezoelectric transformer 6 is output to the output electrode 6c. The output electrode 6cis connected to one terminal of the discharge tube 7.

[0070] A current detector resistor 8aforming the current detector 8 is connected between the other terminal of the discharge tube 7 and ground potential.

[0071] The rectifier 9 is connected to a junction 8bof the other terminal of the discharge tube 7 and the resistor 8a. The rectifier 9 includes a diode 9a, a resistor 9b, and a capacitor 9c. The diode 9ais connected to the junction 8bin such a manner that the backward direction thereof is aligned to the junction 8b. The resistor 9band the capacitor 9care connected in parallel between the other terminal of the diode 9aand ground potential.

[0072] The output terminal of the rectifier 9 is connected to the duty factor controller 3. The duty factor controller 3 includes two comparators 3aand 3b. The output of the rectifier 9 is fed to an inverting input terminal of the comparator 3athrough a resistor 3c. A capacitor 3dis connected between the inverting input terminal of the comparator 3aand the output terminal of the comparator 3a. A first dimmer signal, corresponding to a target load current value, is fed to a normal input terminal of the comparator 3avia a first dimmer signal input terminal 3efrom outside. The first dimmer signal is a direct-current voltage signal corresponding to the target load current value.

[0073] The comparator 3acompares the direct-current output voltage V_Rresponsive to the load current provided by the rectifier 9, to the first dimmer signal, thereby outputting a voltage signal Vc.

[0074] The output of the comparator 3ais coupled to an inverting input terminal of the comparator 3b. The first oscillator 2 is connected to a normal input terminal of the comparator 3b. Also connected to the normal input terminal of the comparator 3bis an input terminal of the second oscillator 5.

[0075] The first oscillator 2 is an oscillator having a fixed frequency, and is fabricated of a piezoelectric ceramic, for instance.

[0076] The comparator 3bcompares a triangular wave output from the first oscillator 2 to an output wave from the comparator 3a, and outputs a signal having a duty factor responsive to the output voltage Vc of the comparator 3a. This arrangement for pulse-width modulation control is widely used in the field of DC-DC converters.

[0077] In this embodiment, the output of the first oscillator 2 is divided by four, and is output as the output of the second oscillator 5. Specifically, the second oscillator 5 is composed of a frequency divider circuit having D flipflops 5aand 5b. The output of the second oscillator 5 is a two-phase output. With its duty factor precisely set to 50%, the two-phase output is advantageously used to perform push-pull driving in the piezoelectric transformer driver 4.

[0078] Referring to the circuit diagram shown in FIG. 2, the operation of the piezoelectric inverter is discussed.

[0079] An input voltage is fed to the input voltage controller 1 via the input terminal IN. The operation of the input voltage controller 1 remains unchanged from the one described with reference to FIG. 1. Specifically, the input voltage controller 1 converts the input voltage into the rectangular alternating-current voltage. The waveform of the output voltage Vi of the input voltage controller 1 is shown in FIG. 3.

[0080] FIG. 3 shows the waveforms of various voltage signals. Each waveform is drawn on its own level, for instance, the output voltage Vi drawn above a gate voltage Vg does not mean that the output voltage Vi is higher in level than the gate voltage Vg.

[0081] When the gate voltage Vg of the FET4cand FET4dbecomes high in the piezoelectric transformer driver 4, the FET4cand FET4dare turned on, thereby causing current energy from the input voltage controller 1 to build up in the inductors 4aand 4b. When the FET4cand FET4dare turned off, stored current energy is switched to the input electrodes of the piezoelectric transformer 6. The output voltage Vd of the piezoelectric transformer driver 4 is shown in FIG. 3.

[0082] With this circuit arrangement, the peak value of the output voltage Vd of the piezoelectric transformer driver 4 is stepped up to a voltage approximately three times as high as the mean voltage of the output voltage Vi of the input voltage controller 1.

[0083] In this embodiment, the operational frequency of the input voltage controller 1 is four times as high as the operational frequency of the piezoelectric transformer driver 4. The output voltage of the input voltage controller 1 is smoothed by the inductors 4aand 4bof the piezoelectric transformer driver 4, and almost no frequency component of the input voltage controller 1 appears in the piezoelectric transformer driver 4.

[0084] In t his way, the piezoelectric transformer 6 is driven and the output of the piezoelectric transformer 6 causes the discharge tube 7 to light.

[0085] The method of controlling the load current to a substantially constant value is now discussed, referring to FIG. 2.

[0086] Now the load current becomes excessively large due to some external disturbance in FIG. 2. The current detector 8 voltage-current converts the load current, thereby resulting in a voltage V_FBresponsive to the load current.

[0087] The voltage V_FBis rectified by the rectifier 9 at a predetermined time constant. The time constant is adjusted by adjusting the values of the diode 9a, the resistor 9b, and the capacitor 9c.

[0088] The rectifier 9 then results in an output voltage V_R.

[0089] Since the load current is now large, the output voltage V_Rof the rectifier 9 becomes larger than the externally applied first dimmer signal. The comparator 3adecreases the output voltage Vc thereof at a time constant determined by the resistor 3cconnected between the rectifier 9 and the inverting input terminal of the comparator 3aand the capacitor 3dconnected between the output terminal and the inverted input terminal of the comparator 3a.

[0090] The output voltage Vc of the comparator 3ais compared to the output V_OSCof the first oscillator 2, i.e., the triangular wave, at the second comparator 3b. Since the output of the comparator 3ais coupled to the inverting input terminal of the comparator 3b, the higher the output voltage of the comparator 3a, the higher the ratio of a high state in the output of the comparator 3b.

[0091] Since the switching element in the input voltage controller 1 is a P-type FET1a, the switching element is turned on when the gate voltage thereof is in a low state. The higher the output of the comparator 3b, the higher the ratio of the off state in the EFT1a.

[0092] The mean value of the output voltage Vi of the input voltage controller 1 drops, and the piezoelectric transformer driver 4 and the piezoelectric transformer 6 respectively decrease the outputs thereof, reducing the load current and thereby controlling the effect of the disturbance.

[0093] Referring to FIG. 3, load current control in response to a change in the voltage of the first dimmer signal is discussed below.

[0094] At time T=0, the first dimmer signal voltage remains high as shown in FIG. 3. When the dimmer signal voltage drops at time T=T1, the output voltage Vc of the comparator 3a, the mean value of the output voltage Vi of the input voltage controller 1, and the peak value of the output voltage Vd of the piezoelectric transformer driver 4 respectively drop, reducing the load current. When the mean value of the output voltage V_Rof the rectifier 9 drops down to a level equal to the voltage of the first dimmer signal, control reaches stabilization.

[0095] In this embodiment, the load current is controlled to the constant target current value. The target value of the load current is changed by changing the first dimmer signal voltage in this way.

[0096] Since the feedback control is performed by the duty factor controller 3 only in this embodiment, the circuit arrangement required for control is simplified. Since the output of the input voltage controller 1 is an alternating-current voltage rather than a direct-current voltage, unnecessary loss, which would be caused by parts required for rectifying and smoothing, is not involved.

[0097] The direct-current voltage signal shown in FIG. 3 is used as the first dimmer signal in this embodiment. Alternatively, a multi-bit digital signal may be used. In such a case, the digital data may be digital-to-analog converted in the inverter.

[0098] FIG. 4 shows frequency-versus-gain characteristics and frequency-versus-conversion efficiency characteristics of the piezoelectric transformer 6 with a load resistor of 100 kΩ. FIG. 12 shows voltage multiplication characteristics of the piezoelectric transformer 6 with the load resistor switched from 100 kΩ to 10 MΩ.

[0099] It is known that insufficient impedance matching between the output impedance of the piezoelectric transformer 6 and the impedance of the discharge tube 7 causes the load current to pulsate or causes the discharge tube 7 to intermittently light. Such a load current pulsation is not controlled by the circuit. The type and operating conditions of the piezoelectric transformer 6 need to be properly selected.

[0100] According to a study carried out by the inventors of this invention, if a frequency is selected from within a range not higher than a frequency giving a maximum voltage multiplication ratio with the discharge tube 7 extinguished, i.e., the load of the piezoelectric transformer 6 opened, namely, 57.5 kHz in FIG. 12, and not lower than a frequency giving a maximum voltage multiplication ratio with the discharge tube 7 lighting normally, namely, 56 kHz in FIG. 12, the load current pulsation is controlled to a minimum.

[0101] Referring to FIG. 4, the conversion efficiency of the piezoelectric transformer 6 is also maximized within the above frequency range. Driving the piezoelectric transformer 6 within the above frequency range is preferable from the standpoint of taking advantage of the characteristics of the piezoelectric inverter.

[0102] Since a drive frequency is varied to control the load current to a constant in the conventional art disclosed in Japanese Unexamined Patent Publication No. 9-107684, maintaining the drive frequency within the above frequency range is thus not achieved. In the conventional art disclosed in Japanese Unexamined Patent Publication No. 7-220888, the piezoelectric transformer is self-oscillating, and thus operates at a frequency providing a maximum voltage multiplication ratio regardless of load state.

[0103] As seen from FIG. 4, frequencies that provide a maximum efficiency of the piezoelectric transformer fall within a range slightly higher than frequencies that provide a maximum multiplication ratio. This means that the conventional art disclosed in Japanese Unexamined Patent Publication No. 7-220888 is unable to maximize the efficiency of the piezoelectric transformer 6.

[0104] In contrast, the operational frequency of the piezoelectric transformer driver 4 in the piezoelectric transformer of this embodiment is substantially constant. The piezoelectric transformer 6 is set to be driven within the above frequency range, namely, within an optimum frequency region during manufacturing process. A stable and high-efficiency piezoelectric inverter thus results.

[0105] FIG. 5 is a circuit diagram showing the circuit arrangement of a piezoelectric inverter of a second embodiment of the present invention.

[0106] In the piezoelectric inverter of the second embodiment, a piezoelectric transformer driver 14 includes a single N-type FET14aand an auto transformer 14b. In the first embodiment, the circuit for driving the piezoelectric transformer 6 is a push-pull circuit composed of the two FETs, while this embodiment employs a single-ended configuration. The auto transformer 14bis arranged to compensate for a lack of voltage multiplication ratio of the piezoelectric transformer 6. With the auto transformer 14bthereof, the piezoelectric transformer driver 14 thus preliminarily steps up the alternating-current voltage input to the piezoelectric drive means 14.

[0107] One end of a primary winding of the autotransformer 14bis connected to the input voltage controller 1, and the other end of the primary winding thereof is connected to the drain of the FET14a. One end of a secondary winding of the autotransformer 14bis connected to the input electrode 6aof the piezoelectric transformer 6. The other end thereof is connected to the drain of the FET14a. The source of the FET14ais grounded, and the gate thereof is connected to the second oscillator 5.

[0108] The piezoelectric transformer driver 14 thus constructed employs such autotransformer 14b. Since the size of the autotransformer 14bis naturally bulky, the first embodiment outperforms the second embodiment in terms of compact and thin design. However, with the reduced component count thereof, the second embodiment achieves a cost reduction.

[0109] The circuit arrangement of the piezoelectric transformer driver is not limited to the ones in the first and second embodiments, and may be modified and changed as appropriate.

[0110] The second embodiment employs a temperature-compensating capacitor 12afor compensating for temperature characteristics of a first oscillator 12. The temperature-compensating capacitor 12ais connected between the first oscillator 12 and ground potential. Variations in the oscillation frequency of the first oscillator 12 due to ambient temperatures are thus compensated for.

[0111] A second oscillator 5 has a construction identical to the counterpart of the first embodiment. Specifically, the output of the second oscillator 5 is obtained by dividing the output signal of the first oscillator 12 by four, and the oscillation frequency of the second oscillator 5 is also temperature-compensated for by the above temperature-compensating circuit.

[0112] Even if the operational frequency is slightly varied, the performance of the input voltage controller 1 is not sensitive to variations. With the above circuit arrangement, the number of oscillators is reduced as in the first embodiment.

[0113] In the first embodiment, when the first dimmer signal voltage is lowered, i.e., when the target current value of the load current is set to be small, the on duty width of the pulse of the input voltage controller 1 is narrowed, and the mean output voltage of the input voltage controller 1 is controlled to be small. In a region where the on duty width is too narrow in PWM (pulse-width modulation) control, gain of the control system becomes excessively large, and assuring system stability is difficult. When the first dimmer signal voltage becomes low, the multiplication gain of the piezoelectric transformer 6 decreases. It is important to prevent the on duty width of the pulse of the input voltage controller 1 from being excessively narrowed.

[0114] One end of a resistor R20 is connected to the input terminal 3eof the first dimmer signal in the second embodiment, and the other end of the resistor R20 is connected to a junction 12bof the first oscillator 12 and a frequency-setting resistor R21. The voltage at the junction 12bis referred to as V_OSC.

[0115] The rest of the construction of the second embodiment remains unchanged from that of the first embodiment. Components identical to those described in connection with the first embodiment are designated with the same reference numerals and the discussion thereabout is not repeated here.

[0116] The operation of the piezoelectric inverter of the second embodiment is now discussed. When the first dimmer signal voltage is reduced, a current flowing into the junction 12bof the frequency-setting resistor 21 of the first oscillator 12 through the resistor R20 decreases. Since the voltage V_OSCat the junction 12bis maintained constant, a current flowing out of the first oscillator 12 increases.

[0117] In other words, the resistance of the frequency-setting resistor 21 appears small, if viewed from the first oscillator 12, and the oscillation frequency of the first oscillator 12 increases. The oscillation frequency of the first oscillator 12 is divided by four, and is provided as the output of the second oscillator 5. The oscillation frequency of the second oscillator 5 is thus increased.

[0118] As already discussed, the present invention uses frequencies within the frequency range where an increase in the oscillation frequency reduces the voltage multiplication gain of the piezoelectric transformer 6. As the oscillation frequency of the second oscillator 5 increases, the voltage multiplication gain of the piezoelectric transformer 6 decreases, and the on-duty width of the pulse of the input voltage controller 1 does not become so narrow.

[0119] Conversely, when the first dimmer signal voltage rises, the load current increases, the oscillation frequency of the second oscillator 5 decreases. The voltage multiplication gain of the piezoelectric transformer 6 thus increases. A variation in the on-duty width of the pulse of the input voltage controller 1 is thus controlled.

[0120] The gain of the piezoelectric transformer 6 is roughly adjusted in response to the magnitude of the first dimmer signal voltage. By controlling the variation in the input voltage controller 1, the stability, thus reliability of the control system is increased.

[0121] In the second embodiment, feedback control is also performed by the duty factor controller 3 only. The circuit arrangement of the control circuit is thus simplified as in the first embodiment.

[0122] FIG. 6 is a circuit diagram of a piezoelectric inverter of a third embodiment of the present invention.

[0123] The piezoelectric inverter of the third embodiment includes a piezoelectric transformer driver 24 that is a push-pull circuit composed of two FET4cand FET4d, as in the first embodiment. In the third embodiment, however, isolating transformers 24aand 24bare substituted for the coils 4aand 4bin the first embodiment. Ends of primary windings of the isolating transformers 24aand 24bare connected to the input voltage controller 1, and the other ends thereof are respectively connected to the drains of the FET4cand FET4d. One end of a secondary winding of the isolating transformer 24ais connected to the input electrode 6aof the piezoelectric transformer 6, and the other end thereof is grounded. One end of a secondary winding of the insulating transformer 24bis connected to the input electrode 6bof the piezoelectric transformer 6, and the other end thereof is grounded.

[0124] In this embodiment, the isolating transformers 24aand 24bpreliminarily step up the input voltage from the input voltage controller 1 and the piezoelectric transformer 6 fully steps up the input voltage applied thereto. A piezoelectric inverter providing a large output thus results.

[0125] In a duty factor controller 23, the input terminal 3afor the first dimmer signal is connected to the normal input terminal of the comparator 3avia a diode D2 and a resistor R10. A resistor R10′ is connected between a junction 23aof the resistor R10 and the normal input terminal and ground potential.

[0126] The diode D2 is connected in a manner such that the forward direction thereof is aligned to the resistor R10.

[0127] A rectifier 9 has a construction identical to that of the counterpart in the first embodiment, and includes a diode 9a. In the third embodiment, the diode D2 is connected to the duty factor controller 23, and the temperature-versus-forward voltage drop characteristics of the diode 9ais compensated for by the diode D2.

[0128] In the third embodiment, a second oscillator 25 is constructed of an oscillator separate from the first oscillator 2. The oscillation frequency of the second oscillator 25 is set independently of the oscillation frequency of the first oscillator 2.

[0129] A capacitor 25bis connected between the second oscillator 25 and ground potential. Furthermore, a resistor 25cis connected between the second oscillator circuit 25aand ground potential. A resistor 25eand a PTC thermistor element 25fare connected between a junction 25dof the resistor 25cand the second oscillator 25 and ground potential. Furthermore, a resistor 25gis connected between a junction of the resistor 25eand the PET thermistor element 25fand ground potential.

[0130] The capacitor 25b, the resistors 25c, 25e, and 25g, and the thermistor element 25fare configured to perform temperature compensation of the second oscillator 25. This temperature-compensating circuit has the same construction as that shown in FIG. 7D. Referring to FIG. 7D, the construction will be detailed later.

[0131] In the third embodiment, the second oscillator 25 is fabricated of the second oscillator circuit 25a, independent of the first oscillator 2. As in the first embodiment, the second oscillator may be constructed of a frequency divider that frequency-divides the output of the first oscillator 2.

[0132] The third embodiment uses a third oscillator 26a. The third oscillator 26ais connected to a normal input terminal of a comparator 26b. An inverting input terminal of the comparator 26bis connected to a second dimmer signal input terminal 26c. The third oscillator 26agenerates a triangular wave having a frequency within a frequency range from 100 to 1000 Hz. The comparator 26bcompares the triangular wave with the second dimmer signal voltage, thereby generating a rectangular pulse having a frequency within a range of 100 to 1000 Hz.

[0133] The rectangular pulse is fed to the gates of the FET24cand FET24dof the piezoelectric transformer driver 24. With the rectangular pulse forcing the gates of the FET24cand FET24ddown to ground potential, the discharge tube 7 is lit or extinguished at a frequency of 100 to 1000 Hz.

[0134] By changing the voltage of the second dimmer signal, a light time ratio of the discharge tube 7 is changed, and burst light adjustment is thus performed.

[0135] The second dimmer signal is a direct-current voltage in this embodiment. A rectangular pulse signal having a frequency within a range of 100 to 1000 Hz, similar to the output of the comparator 26b, may be used as the externally applied second dimmer signal.

[0136] In the third embodiment, a duty factor hold unit 27 is connected to the rectifier 9. The duty factor hold unit 27 includes a PNP transistor 27aas a switching element. The emitter of the transistor 27ais connected to a reference voltage, and the collector thereof is connected one end of a diode 27b. The diode 27bis configured in such a manner that the backward direction thereof is aligned with a direction toward the transistor 27a. The other end of the diode 27bis connected to a resistor R11. The resistor R11 is connected to the output terminal of the rectifier 9.

[0137] One end of a resistor R27 is connected to the base of the transistor 27a. The other end of the resistor 27 is connected to the collector of an NPN transistor 27cas a switching element. The emitter of the transistor 27cis grounded, and the base thereof is connected to an output terminal of the comparator 26bthrough a resistor 27d.

[0138] The operation of the duty factor hold unit 27 is now discussed, focusing problems that would arise without duty factor hold unit 27.

[0139] During a burst off period, i.e., a duration of time during which the discharge tube 7 remains off, the load current becomes zero, and the output of the rectifier 9 also becomes zero. The output voltage of the comparator 3arises, expanding the on-duty width of the pulse of the input voltage controller 1. When the burst off period alternates with a burst on period, the mean value of the output voltage of the input voltage controller 1 becomes high, causing an excessive current to flow through the discharge tube 7, and light adjustment cannot be performed.

[0140] In the third embodiment, a voltage, approximately equal to the voltage appearing at the output of the rectifier 9 during the burst on period, is introduced to the output of the rectifier 9 by the duty factor hold unit 27 through the resistor R11 during the burst off period. With this arrangement, the output voltage of the comparator 3a, i.e., a variation in the on-duty width of the input voltage controller 1 is thus controlled.

[0141] The piezoelectric inverter of the third embodiment performs burst light adjustment by inputting the second dimmer signal voltage. The third embodiment thus performs light adjustment within a wide range, compared with the first embodiment. The duty factor hold unit 27 controls variations in the duty factor during the burst off period. The duty factor hold unit 27 is merely arranged to introduce an appropriate voltage to the output of the rectifier 9, and the variation in the duty factor of the burst off period is controlled at low costs.

[0142] In the third embodiment, temperature compensation for the second oscillator 25 is performed with the capacitor 25bconnected to the second oscillator 25. The temperature compensation and frequency-setting method are appropriately modified and changed.

[0143] FIG. 7A through FIG. 7D show modifications of the frequency setting method in the second oscillator.

[0144] Referring to FIG. 7A, the second oscillator 25 is connected to a capacitor C1 and a resistor R1, external thereto. The capacitor C1 is charged and discharged with a current I_OSCflowing out of the second oscillator 25 into the resistor R1. A signal having a certain frequency is thus generated.

[0145] As the resistance of the resistor R1 decreases, the current I_OSCincreases, the rate of charge and discharge of the capacitor C1 becomes fast, and the oscillation frequency is thus increased. As the capacitance of the capacitor C1 decreases, the oscillation frequency also increases because the voltage across the capacitor C1 rises fast even if the capacitor C1 is charged and discharged with the same current I_OSC.

[0146] If the ambient temperature varies, the voltage V_OSCvaries because of the temperature characteristics of parts in the second oscillator, and there is a fear that the oscillation frequency of the second oscillator may vary. The problem of the variation in the oscillation frequency is now discussed, referring to FIG. 13.

[0147] FIG. 13 shows the relationship between the variation in the oscillation frequency and the ambient temperature in the second oscillator. Blank circles connected by lines represent temperature-uncompensated frequency variations. A fixed-frequency type oscillator increases in oscillation frequency as the ambient temperature rises. In other words, as the temperature rises, the multiplication gain of the piezoelectric transformer 6 drops. When such an oscillator is used for the second oscillator 25, the mean output voltage of the input voltage controller 1 results as shown in FIG. 14 when the discharge tube 7 is a cold-cathode tube and an LCD (liquid-crystal display) panel is lit with a constant liquid current.

[0148] As represented by the blank circles in FIG. 14, the output voltage of the input voltage controller 1 greatly varies as the ambient temperature rises. If temperature compensation is not performed, the mean output of the input voltage controller 1 increases to compensate for a drop in the multiplication gain of the piezoelectric transformer 6 as the ambient temperature rises.

[0149] In response to the variation in the ambient temperature, the variation in the input voltage controller 1 changes within a range of 0.8 to 1.5. This range of variation presents the difficulty of designing the piezoelectric inverter.

[0150] If oscillation frequency-versus-temperature characteristics of the second oscillator 25 are compensated for as represented by solid circles connected by lines as shown in FIG. 13 and FIG. 14, the dependence of the oscillation frequency on temperature is reduced, and the temperature dependence of the mean output voltage of the input voltage controller 1 is significantly flattened.

[0151] Referring to FIG. 13, the temperature-compensated oscillation frequency slightly rises with the temperature increase. Referring to FIG. 14, the mean output voltage of the input voltage controller 1 remains substantially constant regardless of the temperature increase when temperature compensation is performed. This is because the tube voltage in an LCD panel drops at a high temperature, and a smaller gain is acceptable as the temperature gets higher.

[0152] When the oscillation frequency of the second oscillator 25 exhibits positive-temperature-coefficient characteristics as shown in FIG. 13, a temperature-compensating capacitor C_1Ahaving positive-temperature-coefficient capacitance-versus-temperature characteristics is substituted for the capacitor C₁.

[0153] With the temperature-compensating capacitor C_1A, having positive-temperature-coefficient capacitance-versus-temperature characteristics, employed, the temperature dependence of the mean output voltage of the input voltage controller 1 is controlled.

[0154] Referring to FIG. 7C, a negative-temperature-coefficient thermistor TC and a resistor R2 are connected between an external reference voltage and the junction of an oscillation-frequency-setting resistor R1 and the second oscillator 25. A resistor R3 is connected in parallel with the negative-temperature-coefficient thermistor TC. A current is permitted to flow from the external reference voltage into the resistor terminal of the second oscillator 25. The temperature compensation is performed so that the current value is controlled to be small as temperature rises.

[0155] Referring to FIG. 7D, when the second oscillator 25 has negative-temperature-coefficient frequency-versus-temperature characteristics, a resistor R2′ and a negative-temperature-coefficient thermistor TC′ are connected in parallel with are sistor R1 relative to common line. The current flowing out of the resistor terminal of the second oscillator 25 is increased with temperature increase.

[0156] When the resistances of the resistors R1, R2, and R3, the negative-temperature-coefficient thermistor TC, the resistors R1, R2′, and R3, and the negative-temperature-coefficient thermistor TC′ are appropriately set as shown in FIG. 7C and FIG. 7D, the oscillation frequency at normal temperatures is set to be equal to that obtained in the second oscillator shown in FIG. 7A.

[0157] The temperature-compensating circuits shown in FIG. 7C through FIG. 7D employ the negative-temperature-coefficient thermistors. Alternatively, a positive-temperature-coefficient thermistor may be employed by modifying the circuit arrangement.

[0158] As discussed above, temperature compensation is performed by using a variety of circuits taking into consideration various features such as temperature characteristics of the second oscillator 25. When the temperature characteristics of the second oscillator 25 are controlled to within a desired range, the temperature dependence of the mean output voltage of the input voltage controller 1 is thus controlled. When the temperature dependence of the output of the input voltage controller 1 is large, the output voltage needs to be set to be low at normal temperatures with some margin implemented in design. A piezoelectric transformer 6 having a large voltage multiplication ratio needs to be used, and is economically disadvantageous. With the temperature-compensating circuit incorporated in this embodiment, this problem is resolved. The cost of the piezoelectric inverter is thus reduced.

[0159] FIG. 8 is a circuit diagram showing a piezoelectric inverter of a fourth embodiment of the present invention. In the piezoelectric inverter of the third embodiment, the FET24aand FET24bas switching elements in the piezoelectric transformer driver 24 are set to an off state to create the burst off period. The fourth embodiment employs an OR gate 31 to stop the driving of the input voltage controller 1.

[0160] In the fourth embodiment, the output terminal of a third comparator 26bis connected to one input terminal of the OR gate 31. The output terminal of a second comparator 3bis connected to the other input terminal of the OR gate 31. The output terminal of the OR gate 31 is connected to the gate electrode of FET1ain the input voltage controller 1.

[0161] The rest of the construction of the fourth embodiment remains unchanged from that of the third embodiment. Components identical to those described in connection with the third embodiment are designated with the same reference numerals and the discussion thereabout is not repeated here.

[0162] When either the output of the comparator 3bor the output of the comparator 26bis in a high state, the OR gate 31 outputs, to the FET1a, a signal for stopping the driving of the FET1a. During the burst off period, the stop signal from the OR gate 31 stops the operation of the FET1a. The circuit arrangement for creating the burst off period may be modified as appropriate, for instance, by incorporating the OR gate 31.

[0163] In the third embodiment, energy stored in inductance of the isolating transformers 24aand 23bbecomes surge voltages at the transition into a burst off period. The surge voltages appear between the drain and source of each of the FET24cand FET24d.

[0164] To protect the FET24cand FET24dfrom the surge voltage, Zener diodes 24fand 24gneed to be connected thereto. In the fourth embodiment, no such surge voltages take place. The circuit arrangement of the fourth embodiment is thus simplified, and the reliability thereof is improved.

[0165] FIG. 9 is a circuit diagram showing a piezoelectric inverter of a fifth embodiment of the present invention.

[0166] In the fifth embodiment, a third comparator 33bhas three input terminals, namely, two inverting input terminals and one normal input terminal. A dead-time generator circuit 31 is connected to one of the two inverting input terminals.

[0167] The output terminal of a third comparator 26bis connected to not only the rectifier 9 but also the dead-time generator circuit31. The dead-time generator circuit 31is also connected to the input terminal IN.

[0168] The dead-time generator circuit 31 is arranged to perform a dead-time function. The dead-time function controls the duty factor of the rectangular pulse, which is the output of a second comparator 33b, to be not greater than a constant value, independently of an output voltage V_FBof the tube current.

[0169] Specifically, in the fifth embodiment, the output signal of the dead-time generator circuit 31 is input to the second comparator 33b, thereby controlling the duty factor of the output pulse of the second comparator 33b.

[0170] Without the dead-time function, the following problem arises.

[0171] In economical design, the mean output voltage of the input voltage controller 1 is set to be 6.5 V or so in the piezoelectric inverter having the input voltage specification of 7 to 12 V. In such a case, the mean output voltage of the input voltage controller 1 is maintained to 6.5 V regardless of the input voltage value, when the load current is controlled to be constant, namely, during feedback control. According to the quasi-class-E multiplication effect of the piezoelectric transformer driver 4, the output voltage of the piezoelectric transformer driver 4 is approximately 20 V peak voltage (=5 V×3). TheFET24cand FET24din the piezoelectric transformer driver 4 in use have withstand voltage of approximately 60 V.

[0172] The duration during which the feedback control is inoperative, for instance, in immediate succession to a startup, is considered. More specifically, now the piezoelectric inverter is started with a 21 V input. The load current is zero immediately subsequent to the startup. In the first embodiment, the comparators 3aand 3bperform control to result in a duty factor of 100% in the input voltage controller 1. The mean output voltage of the input voltage controller 1 becomes 21 V, and a peak voltage of 63 V (=21V×3) is fed to the FET in the piezoelectric transformer driver 4. FETs having withstand voltage rating of 60 V cannot be used. FETS having higher withstand voltage may be used. This is not preferable in view of dimensions, performance, and costs.

[0173] In contrast, the fifth embodiment is arranged so that the input voltage is applied to the dead-time generator circuit 31 via the input voltage terminal IN. The output voltage of the dead-time generator circuit 31 varies in response to the input voltage. FIG. 15 shows the mean output voltage of the input voltage controller 1.

[0174] Referring to FIG. 15, a one-dot chain line X represents the mean output voltage of the input voltage controller 1 during the feedback control, and shows that the mean output voltage of the input voltage controller 1 is substantially constant regardless of variations in the input voltage. As represented by a solid line Y in an out-of-feedback control state, the mean output voltage of the input voltage controller 1 becomes high as the input voltage rises when no dead-time generator circuit is employed.

[0175] In the fifth embodiment with the dead-time generator circuit 31 incorporated, the mean output voltage of the input voltage controller 1 remains substantially constant and is controlled to 12 V or lower with the dead-time generator circuit 31 incorporated even when the input voltage rises. The use of the dead-time generator circuit 31 permits the piezoelectric transformer driver 4 to be fabricated of FETs having a withstand voltage of 60 V.

[0176] The dead-time function is also used to result in the burst off period in the fifth embodiment. The output of the comparator 26bis fed to the dead-time generator circuit 31. The output of the comparator 33bis set to be a duty factor of zero percent with the output of the comparator 26btransitioned to a high state. With this arrangement, the output of the input voltage controller 1 becomes zero, achieving the burst off period.

[0177] During the burst off period, a transistor 27ais concurrently turned on. By equalizing a resistor R10 and a resistor R11 in resistance and by equalizing a resistor R10′ and a resistor 9bin resistance, the problem of an excessive duty factor during the burst off period is prevented in the same manner as in the third and fourth embodiment. Specifically, the use of the dead-time function helps perform a burst light adjustment with a simple circuit arrangement.

[0178] The fifth embodiment also includes an open/short protection circuit 32. The open/short protection circuit 32 is connected to the output terminal of the first comparator 3a, thereby receiving a feedback voltage.

[0179] The open/short protection circuit 32 may be fabricated of a timer latch circuit such as a general-purpose PWMIC.

[0180] The operation of the open/short protection circuit 32 is now discussed. Now, the output voltage of the rectifier 9, namely, the feedback voltage (V_FB) is transitioned to a high state. When the value V_FBrises in excess of a predetermined constant voltage, a capacitor 102 connected to a time-constant setting terminal of the open/short protection circuit 32 starts to be charged. When the voltage at the time-constant setting terminal rises above a constant voltage, the general operation of the piezoelectric inverter stops.

[0181] In abnormal states in which the output of the piezoelectric transformer is opened or shorted to ground, the load current becomes zero, and the output of the rectifier 9 also becomes zero. An open/short protection operation is thus carried out, stopping the operation of the piezoelectric inverter when an abnormal state continues for a predetermined duration of time.

[0182] The piezoelectric inverter requires a preventive step to cope with the inability to light under dark conditions (the cold-cathode tube is unable to light under fully dark lighting conditions). To this end, the function required of the piezoelectric inverter is to output a voltage not lower than a light enable voltage for a constant duration of time rather than stopping immediately in case of an output opening. The “constant duration of time” is varied depending on the operational conditions under which the user uses the inverter, and is specifically varied from one second to a longtime. The constant duration of time is preferably externally set.

[0183] In the fifth embodiment, the capacitor 102 has a minimum required capacitance, and an interconnect terminal for an external capacitor is connected to the time-constant-setting terminal. A capacitor is connected to the external capacitor terminal as necessary, and by changing the capacitance of the external capacitor, the constant duration of time is easily adjusted.

[0184] The protection operation during the abnormal event is performed only by substantially fixing the drive frequency of the piezoelectric transformer.

[0185] When the protection operation is performed in the method discussed above, the same time constant applies to an open and a short of the output of the piezoelectric transformer 6. As already discussed, in the event of an open circuit, a delay time of one second or longer from the occurrence of the open circuit to the protection operation is typically required. In the event of a short circuit as well, the protection operation is initiated after an elapse of one second.

[0186] When the output of the piezoelectric transformer 6 is shorted, the oscillation frequency (the frequency at which the input impedance of the piezoelectric transformer 6 is minimized) is present among frequencies lower than normal. In the piezoelectric transformer having the frequency-versus-gain characteristics shown in FIG. 4, the input impedance is minimized within a frequency range from 54 to 55 kHz. With the piezoelectric transformer 6 driven by the frequency within this range, large energy is fed thereto, and the piezoelectric transformer 6 is subject to failures such as a open circuit.

[0187] The conventional art, disclosed in Japanese Unexamined Publication No. 7-220888, constantly drives the piezoelectric transformer with a resonance frequency, and an open circuit of the transformer is inevitable. In the conventional art shown in Japanese Unexamined Patent Publication No. 9-107684, the load current is unable to reach a target value when the output of the piezoelectric transformer is shorted. Frequency sweep means decreases the drive frequency of the piezoelectric transformer. The drive frequency passes the resonance frequency that minimizes the input impedance and sweeps into a lower frequency. Since the delay time prior to the circuit protection against an abnormal event is one second or longer, the piezoelectric transformer is also subject to an opening.

[0188] Since the frequency of the piezoelectric transformer is fixed in the piezoelectric inverter of the present invention, the piezoelectric inverter does not operate at the resonance frequency in the event of abnormal events. Energy input to the piezoelectric transformer 6 is thus restricted. If a short state continues for one second or longer, the piezoelectric transformer 6 is free from an open circuit.

[0189] The protection during output opening is now discussed.

[0190] During the output opening, a voltage is continuously fed for a constant duration of time until the open/short protection circuit 32 is initialized. The operational frequency of the piezoelectric transformer 6 (the oscillation frequency of the second oscillator) is fixed, and the piezoelectric transformer operates in a region having a high gain at an opening as shown in FIG. 12. The output of the first oscillator 12 becomes excessively large, and there is a fear that unnecessary discharges and breakdown of the transformer may take place.

[0191] In the fifth embodiment, resistors R110 and R111 voltage-divide the output of the piezoelectric transformer 6, and a divided voltage drives a transistor Q101. The output voltage is thus controlled at the opening.

[0192] When the output of the piezoelectric transformer 6 rises above a constant voltage that is determined by a division ratio of the resistors R110 and R111, the transistor Q101 is turned on. One end of a resistor R109 is grounded. As a result, a current flowing out of a resistor connecting terminal of the first oscillator 2 increases, increasing the oscillation frequency of the first oscillator 2. The transformer drive frequency, which is obtained by dividing the increased oscillation frequency by four, is also increased.

[0193] Referring to FIG. 12, as the drive frequency increases, the gain of the piezoelectric transformer decreases, and the output voltage drops. In other words, in the event of an open output of the transformer, the output voltage is maintained to the constant voltage determined by the division ratio of the resistors R110 and R111. Unnecessary discharges and opening of the piezoelectric transformer are thus prevented.

[0194] Connected between the junction of voltage division and the base of the transistor Q101 are a diode D3 and a resistor R112 in series connection. A capacitor C103 is connected between the junction of the resistor 112 and the diode D3 and ground potential. The collector of the transistor 101 is connected to the junction of the resistor R109 and the capacitor 101. The resistor R109 and the capacitor C101 are connected between the junction 12band ground potential.

[0195] Under normal operating conditions, a constant voltage V_OSCdetermined in the design of the first oscillator 2 is fed across the capacitor 101. Prior to startup, the voltage applied to the capacitor 101 is zero. A current for charging the capacitor 101 flows through the resistor R109 for a constant duration of time at the startup. At the startup, lighting is performed with frequency sweeping from a frequency higher than frequencies in normal operating conditions to a low frequency side. With this function implemented, an excessive current is prevented from flowing through the load at the startup.

[0196] FIG. 10 is a circuit diagram showing a piezoelectric inverter of a sixth embodiment of the present invention.

[0197] The sixth embodiment remains unchanged from the fifth embodiment shown in FIG. 9, except for the protection operation in the event of an output open circuit. The rest of the construction is not discussed here.

[0198] Referring to FIG. 10, the collector of the transistor Q101 is connected to one end of a resistor R113, and the other end of the resistor R113 is connected to the base of a transistor Q102. The emitter of the transistor Q102 is connected to a reference voltage, the collector thereof is connected to the dead-time generator circuit 31. The input terminal of the dead-time generator circuit 31 is designed to be at a duty factor of zero percent when the collector voltage of the transistor Q102 is in a high state, namely, to the reference voltage.

[0199] When the output of the piezoelectric inverter is opened, i.e., without load, for some reason, the output voltage of the piezoelectric transformer increases in the same way as shown in FIG. 9. The anode voltage of the diode D3 increases, causing the diode D3 to be conductive, and thereby turning on the transistor Q101. The transistor Q102 is turned on through the resistor R113, feeding a high signal to the dead-time generator circuit 31. The duty factor of the input voltage controller 1 becomes zero percent, reducing the input voltage to the piezoelectric transformer 6, and thereby reducing the output voltage of the piezoelectric transformer 6. An initial excessive rise in the piezoelectric transformer output voltage is thus prevented. With the piezoelectric transformer output voltage decreased, the transistors Q101 and Q102 are turned off. The duty factor in the input voltage controller 1 starts expanding again. The input voltage controller repeats on and off operations on the mean output voltage thereof, while preventing an excessive voltage from being output.

[0200] In the above discussion, the transistor Q102 is fully turned on, and the duty factor of the switching element of the input voltage controller 1 becomes zero percent. Reducing the duty factor down to zero percent is not a requirement. Specifically, the transistors Q101 and Q102 are used in a linear region (a half-on region) so that the input voltage to the dead-time generator circuit 31 is controlled to be an intermediate voltage, higher than zero V and lower than the reference voltage. The output of the input voltage controller 1 does not fully become zero, but agrees with a substantially constant voltage so that the piezoelectric inverter output voltage continuously coincides with a target open voltage.

[0201] In both cases, the voltage higher than the light enable voltage is continuously output, while the protection operation is performed to control the generation of excessive voltages.

[0202] FIG. 11 is a circuit diagram showing a piezoelectric inverter of a seventh embodiment of the present invention.

[0203] In the seventh embodiment, a piezoelectric transformer driver 54 includes two FET54aand FET54bconfigured in a half bridge. The output of the input voltage controller 1 is fed to the source of the P-type FET54a. The drain of the FET54ais connected to the drain of the FET54b. The source of the FET54bis grounded. The gates of the FET54aand FET54bare commonly connected to the second oscillator 25.

[0204] One end of an inductor 54dis connected to a junction 54cto which the drains of the FET54aand FET53bare commonly connected. The other end of the inductor 54dis connected to a first input electrode 6aof the piezoelectric transformer 6. A capacitor 54fis connected between a junction 54eof the other end of the inductor 54dand the input electrode 6aof the piezo electric transformer6 and ground potential. Specifically, an LC low-pass filter composed of the inductor 54dand the capacitor 54fis connected to the output of a drive circuit having a half-bridge configuration of the FET54aand FET54b. The output voltage, from which high-frequency components have been removed by the LC low-pass filter, is added to the piezoelectric transformer 6.

[0205] The resonance frequency of the LC filter, determined by the sum of the capacitance of the capacitor 54fand the input capacitance of the piezoelectric transformer 6 and the inductance of the inductor 54d, is substantially equalized to the drive frequency of the piezoelectric transformer 6. An optimum design is thus accomplished. The circuit arrangement of the piezoelectric transformer driver is not limited to any particular one. The circuit arrangement of the piezoelectric transformer driver of each preceding embodiment may be implemented. By connecting the LC low-pass filter, a voltage, from which unwanted high-frequency components are removed, is applied to the piezoelectric transformer.

[0206] In the seventh embodiment, the input voltage is divided by resistors 201 and 202. One end of a Zener diode vz is connected to a division junction 51 of the resistors 201 and 202, and the other end thereof is connected to the base of a transistor Q201 via a resistor R52. The collector of the transistor Q201 is connected to a frequency-setting-resistor terminal of the second oscillator 25 via a resistor R203. The emitter of the transistor Q201 is grounded.

[0207] The input voltage is divided by the resistors R201 and R202. When the divided voltage is higher than a Zener voltage of the Zener diode Vz, the Zener diode Vz becomes conductive. As a result, the transistor Q201 is turned on, increasing the frequency of the second oscillator 25. Conversely, when the input voltage drops, turning off the transistor Q201, a resistor R203 is isolated from ground potential. The oscillation frequency of the second oscillator thus drops. During the normal operational conditions, the piezoelectric inverter operates in a high-efficiency frequency region and maintains lighting even in the event of a voltage drop in the input voltage. This operation is now discussed.

[0208] Now discussed is the piezoelectric inverter for use in a notebook personal computer with an input voltage rating of 7 to 20 V and an input voltage of 10.8 V during a battery operation.

[0209] As clearly seen from FIG. 4, the frequency giving a maximum efficiency of the piezoelectric transformer 6 is slightly higher than a frequency giving a maximum gain. With an input voltage of 10.8 V, a frequency of 57.5 kHz providing a maximum efficiency is now used. The voltage multiplication gain of the piezoelectric transformer 6 is 34 dB, and there is a margin of 5 dB to the maximum gain of 39 dB.

[0210] Now considered is a rare case in which the input voltage drops down to 7 V. When the frequency is fixed to 57.5 kHz, the gain of the piezoelectric transformer 6 is also fixed. The on duty of the input voltage controller 1 needs to be increased to maintain the mean output voltage of the input voltage controller 1 to a certain value. Assuming that the required output voltage of the input voltage controller 1 is 8 V, the rectangular pulse duty becomes 100%, and a SCP function is activated, stopping the inverter.

[0211] By selecting appropriate resistances of the resistor R201, R202, and R203, the transistor Q201 is turned off with the input voltage smaller than 9 V, and the oscillation frequency set to move to 56.5 kHz, the gain of the piezoelectric transformer 6 increases to 38 dB with the input voltage of 9 V or smaller. The mean voltage of the input voltage controller 1 required for maintaining the load current drops, causing the inverter not to stop operating even from an input voltage of 7 V.

[0212] At an oscillation frequency of 56.6 kHz, the piezoelectric transformer presents an efficiency slightly lower than that at an oscillation frequency of 57.5 kHz. An input voltage smaller than 9 V is rarely input in actual operating conditions. An efficiency slightly lower in this frequency is not a problem in practice.

[0213] When the input voltage becomes lower than a desired constant value, a circuit for changing the oscillation frequency of the second oscillator to another frequency slightly lower than normal frequency is added. Lighting is assured within a wide range of input voltage and at the input voltage most frequently used, the piezoelectric transformer is thus driven at a frequency that provides a maximum efficiency of the piezoelectric transformer.

[0214] In the piezoelectric inverter of the present invention, the load is connected to the output electrode of the piezoelectric inverter, and the voltage control means controls the current flowing through the load to approximately the target current value. Since the voltage control means functions to control the mean voltage of the alternating-current voltage to the piezoelectric transformer, the load current is stabilized through single feedback control. The construction of the control circuit system is thus simplified and low cost. The input voltage controller, including the switching transistor and the current circulating element, is used for the voltage control means. When the duty factor of the input voltage controller is controlled so that the current flowing through the load approximately coincides with the target current value, a stepdown chopper circuit including the switching transistor and the current circulating element is constructed. Since the chopper circuit needs neither inductor nor capacitor for rectifying and smoothing, the component count is reduced. It is sufficient to control the duty factor of the input voltage controller, and the control system is thus simplified. A simplified and low-cost circuit arrangement thus results.

[0215] Since the input voltage controller, including the switching transistor and the current circulating element, needs neither smoothing means and rectifying means, the input voltage controller is free from loss involved in such smoothing and rectifying means.

[0216] The load current flowing through the load is detected by the load current detector, and the duty factor of the rectangular pulse of the input voltage controller is controlled by the duty factor controller so that the load current approximately coincides with the target current value. With a single feedback control loop, the load current is stabilized. In other words, the control system is simplified. A low-cost and reliable piezoelectric inverter results.

[0217] The operation frequencies of the input voltage controller and the piezoelectric transformer driver are respectively determined by the first oscillator and the second oscillator.

[0218] The piezoelectric inverter may include the frequency divider to divide the frequency of the first oscillator, and when the divided one of the frequency of the first oscillator is the output of the first oscillator, the first oscillator and the second oscillator are constructed of a single oscillator circuit. This arrangement simplifies the circuitry.

[0219] The oscillation frequency of the second oscillator is not higher than the frequency that gives a maximum voltage multiplication ratio of the piezoelectric transformer with the piezoelectric transformer having no load as the output thereof, and the oscillation frequency is not lower than the frequency that gives a maximum voltage multiplication ratio of the piezoelectric transformer with the piezoelectric transformer having the load. This arrangement provides a high efficiency, and controls the unstable operation in which the load current pulsates.

[0220] The piezoelectric inverter may also include the temperature-compensating circuit to correct the dependence of the oscillation frequency of the second oscillator on the ambient temperature. The required mean output voltage of the input voltage controller is thus controlled by the temperature compensation function. This arrangement reduces variations in the output of the input voltage controller, eliminates the need for a piezoelectric transformer having an unnecessarily higher voltage multiplication ratio, and results in a low-cost piezoelectric transformer.

[0221] Composed of the thermistor or the temperature-compensating capacitor, the temperature-compensating circuit is low cost.

[0222] When the target current value is varied in response to the first external dimmer signal, the load current is also varied in response to the first external dimmer signal. The adjustment of the load, such as the adjustment of the luminance of the discharge tube, is easily performed.

[0223] The piezoelectric transformer may also includes the variable oscillation-frequency circuit for varying the oscillation frequency of the second oscillator in response to the first dimmer signal without using feedback control. The variation in the mean output of the input voltage controller is set to be smaller than the variation in the set load current by varying the frequency of the second oscillator in response to the first dimmer signal. This arrangement increases the stability of the feedback control system, and further increases the reliability of the piezoelectric transformer.

[0224] The load drive time controller may also included to intermittently turn on and off the driving of the load to vary the on time ratio in response to the second external dimmer signal.

[0225] The load is intermittently turned on and off in response to the second dimmer signal. The burst light adjustment is thus achieved, increasing the range of light adjustment.

[0226] The piezoelectric inverter may also include the rectifier to rectify the load current from the load current detector and to output the direct-current voltage responsive to the load current. When the inverter works to set the load to be in an on state, or the load is in an on state, the voltage, substantially equal to the voltage occurring at the output of the rectifier, is applied to the output of the rectifier during a period throughout which the circuitry operates to set the load to be in an off state, or the load is in an off state. The variation in the duty factor of the output rectangular pulse of the duty factor controller is controlled during the burst off period. The light adjustment feature is thus improved.

[0227] The piezoelectric inverter may further include a dead-time controller for controlling the duty factor of the rectangular pulse of the input voltage controller to be not higher than a predetermined value, without dependence on a current flowing through the load and the output voltage of the rectifier. Since the duty factor of the rectangular pulse controlled by the dead-time controller varies in response to an input voltage, an excessive rise in the output of the input voltage controller is controlled with a high input voltage and in an out-of-feedback state. Low withstand voltage, thus low-cost FETs are used for the piezoelectric transformer. The burst light adjustment is cost-effectively performed.

[0228] The piezoelectric inverter may further include the circuit operation stopping unit which stops the operation of the circuit when a duration, during which the current flowing through the load fails to agree with the target current value, exceeds a predetermined constant duration of time. Unnecessary discharges and breakdown of the piezoelectric transformer are controlled, and the piezoelectric inverter is reliably protected.

[0229] The constant duration of time from the occurrence of an abnormal event to a stop of the operation of the circuit may be varied by a constant of a component externally connected. By selecting a proper external component, the constant duration of time is easily adjusted.

[0230] The rise in the output voltage of the piezoelectric transformer may be prevented by varying, toward a high frequency side, the oscillation frequency of the second oscillator when the output voltage of the piezoelectric transformer exceeds a desired value. In this case, a breakdown of the piezoelectric transformer is reliably prevented, and the piezoelectric inverter is protected.

[0231] The same effect results if the duty factor of the input voltage controller is controlled when the output voltage of the input voltage controller exceeds a desired value.

[0232] The startup operation is carried out while the oscillation frequency of the second oscillator sweeps from a high frequency side to a low frequency side. In this arrangement, an excessive output current is prevented from flowing at the startup.

[0233] The oscillation frequency of the second oscillator is shifted to a low frequency lower than the normal oscillation frequency when the input voltage is lower than a desired frequency. In this arrangement, the operational frequency of the piezoelectric transformer is shifted into a lower frequency side, thereby increasing the voltage multiplication gain. This reduces the possibility of aborted lighting of the discharge tube, and causes the discharge tube to reliably light. At the input voltage most frequently used, the piezoelectric transformer is thus driven at a frequency that provides a maximum efficiency of the piezoelectric transformer. The efficiency of the piezoelectric inverter is increased.