Method of Symmetrically Implanted Punch-Through Stopper for a Rugged DMOS Power Device

1. Method of fabricating a p-channel DMOS power device in a silicon semiconductor substrate, the method comprising: forming a gate oxide layer on the substrate; forming a polysilicon layer on the gate oxide layer; forming a silicon dioxide layer on the polysilicon layer; etching the silicon dioxide layer, the polysilicon layer and the gate oxide layer to expose a portion of the substrate; implanting an n-type dopant into the exposed portion of the substrate to form an n-type well region in the substrate; implanting a p-type dopant into the n-type region to form a p-type source region in the p-type well region; forming oxide sidewall spacers on sidewalls of the etched polysilicon layer; performing a first implant to introduce phosphorus into the well region beneath the source region at a first depth at a peak concentration of about 8.times.10.sup.14 atoms per cubic centimeter at about 200-220 KeV; and performing a second implant to introduce phosphorus into the well region at a second depth shallower than the first depth beneath the source region at a peak concentration of about 5.times.10.sup.15 atoms per cubic centimeter at about 60 KeV.