Recessed Etch RF Micro-Electro-Mechanical Switch

This invention relates to a micro-electro-mechanical (MEMS) RF switch and more specifically to the structure of such and to a process for fabricating such a switch using a recessed etch technique.

An RF switch can be achieved by deflecting a metal membrane with an applied voltage so that the capacitance between two metal electrodes is dramatically changed. Fundamentally, such a switch is a reactive device so that the switch conducts RF signals when the capacitance is high and the capacitive reactance is low; i.e., ##EQU1## where X.sub.c is the capacitive reactance,

f is the RF frequency, and

c is the capacitance of the switch.

A thin dielectric can be used to separate the two electrodes so that a DC bias can be applied and maintained between them. The capacitance is a function of the area of the electrode and the spacing between the two metal electrodes; i.e., ##EQU2## where .epsilon. is the dielectric constant for the insulator

A is the area of either of the two metal electrodes

s is the spacing between the two electrodes, and

C is the capacitance.

FIGS. 1 and 2 show a basic conventional MEMS switch mechanism for the OFF and ON conditions, respectively.

FIG. 1 shows a conventional MEMS RF switch in the OFF state. The switch structure is built on the chosen substrate 10 material and consists of two dielectric (insulator) posts 12. These posts have been constructed of both inorganic and organic polymer materials, both of which have problems. Problems with inorganic dielectric posts have been known to be related to stresses encountered with nitride or oxide layers in excess of a few microns thick. Organic polymers may be used as the post material but they tend to be less rigid and prone to degradation with time and environmental exposure. These dielectric posts support the flexible metal membrane 14 which is one plate of the capacitor. The second plate of the capacitor, the bottom electrode 16, is constructed on the surface of the substrate 10. A thin insulator, dielectric 18, is then placed on top of bottom electrode 16. An electrical connection is also made to the bottom electrode 16 for applying a DC bias 20, shown in the OFF state, to control the switch. Finally, connections are made for the RF input 22 signal and the RF output 26 signal. A fixed capacitor 24 is used to couple the switch structure to the RF output 26. In this state, there is no DC bias on the bottom electrode 16 and the membrane 14 is relaxed leaving a large separation between the two metal electrodes. This provides a low capacitance and high reactance condition which results in an OFF switch for RF signals.

FIG. 2 is the same structure as in FIG. 1, but now a DC bias 20 has been applied to the bottom electrode 16 to turn the switch ON. As shown, membrane 14 is now flexed down against the dielectric 18. This minimum separation between the two metal electrodes, membrane 14 and bottom electrode 16, yields a high capacitance and a low reactance resulting in an ON switch for RF signals.

Several of the problems associated with conventional MEMS RF switches include:

1. the need to fabricate tall posts to support the membrane

2. a requirement for a relatively large voltage to pull down the membrane to activate the switch, and

3. the stress placed on the membrane material when it is pulled down.

Representative prior structures are discussed in U.S. Pat. Nos. 5,578,976; 5,367,136; and 5,258,591. None of these patents disclose or suggest the novel features of the present invention.

A novel micro-electro-mechanical (MEMS) RF switch having a recessed area in a substrate which creates a spacing between a conductive membrane and a bottom electrode. The invention eliminates the need for the dielectric posts found in prior art MEMS RF switches, includes a flexure structure in the membrane which will reduce the required pull down voltage for the membrane, and reduces the stress and fatigue in the membrane due to switch activation.

For a more complete understanding of the present invention and for further advantages thereof, reference is now made to the following detailed description taken in conjunction with the accompanying drawings in which:

FIG. 1 shows the undeflected membrane for a conventional RF switch in the OFF state.

FIG. 2 shows the deflected membrane for a conventional RF switch in the ON state.

FIG. 3 shows the recessed switch structure of this invention in the OFF state.

FIG. 4 shows the recessed switch structure of this invention in the ON state.

FIG. 5a shows a top view of the substrate with the several micron deep cavity etched into it.

FIG. 5b shows a side sectional view of the device of FIG. 5a along the section lines 1--1.

FIG. 5c shows the etched cavity with a dielectric insulator layer deposited over the substrate.

FIG. 5d shows a top view of the deposition and patterning of the first level metal which results in the bottom electrode for the RF switch structure.

FIG. 5e shows a side sectional view of the device of FIG. 5d along the section lines 2--2.

FIG. 5f shows a top view of a dielectric layer deposited and patterned over the bottom electrode of the RF switch structure.

FIG. 5g shows a side sectional view of the device of FIG. 5f along the section lines 3--3.

FIG. 5h shows a top view of the RF switch structure with a sacrificial resist spacer spun on.

FIG. 5i shows a side sectional view of the device of FIG. 5h along the section lines 4--4.

FIG. 5j shows a top view of the RF switch structure with the second level metal deposited and patterned to form the membrane.

FIG. 5k shows a side setional view of the device of FIG. 5j along the section lines 5--5.

FIG. 5l shows a top view of the finished RF switch with the sacrificial spacer removed and the membrane free to move.

FIG. 5m shows a side sectional view of the device of FIG. 5l along the section lines 6--6.

FIG. 3 shows the structure for the MEMS RF switch of this invention. The device's substrate 28 has a recessed cavity 30, several microns deep, etched into it. In a general sense, a dielectric 32 layer is shown over the substrate 28 surface to insulate the switch structure from the substrate, although for some substrate materials this layer may not be required. The switch structure is then built in the well of this cavity, as shown. The membrane structure 34 is built on top of the substrate while the bottom electrode 38 and dielectric 40 insulator layer are built on the bottom surface of the cavity 30. Membrane 34 is located in facing relationship to the bottom electrode 38 and in fact, in this preferred embodiment, has a portion oriented in parallel to a portion of electrode 38. However, in this description and in the appended claims, the term "in facing relationship" is not intended to be limited to a parallel orientation but is intended to encompass any relative orientation where the two plates (electrodes) of the capacitor are located in proximity to each other and wherein at least one of the plates may be deflected to a sufficient extent in the direction of the other plate to result in significant capacitance between the plates. The membrane 34 also has a flexure structure 36 built into it's periphery. This flexure structure, which acts much like a spring, provides stress relief for the membrane. The rest of the device, the DC bias 42, RF input 44, fixed capacitance 46 at the output, and RF output 48 are similar to the conventional switch discussed earlier. In this configuration where there is no DC bias 42 applied, the membrane 34 is relaxed, the capacitance is low, and the switch in OFF.

FIG. 4 shows the same RF switch structure with a DC bias 42 applied. In this case the electrostatic charge causes the membrane 34 to deflect or pull down to the dielectric 40 insulator separating the two electrodes. The stress in the membrane 34 is effectively transferred to the flexure structure 36 which supports the membrane 34 and which is designed to absorb this stress. In this state the capacitance is high and the switch is ON.

The process for fabricating the RF switch of this patent uses standard integrated circuit manufacturing techniques which are well known in the art. This process is illustrated in FIGS. 5a-5m with both top and cross sectional views. As shown in FIGS. 5a and 5b, a recessed cavity 30 is patterned and then etched several microns deep into substrate 28. This cavity is shown as circular, although other shapes could be used. A notch 50 extends the cavity on one side to accommodate the RF output connection and isolation between the two electrodes. There are numerous well known reactive ion etching (RIE) techniques which can be used to produce substantially vertical sidewalls and smooth etched surfaces. A typical depth of this cavity is on the order of 4 microns.

Any number of substrate materials can be used to build the switch structure. Depending on the substrate material used, it may be necessary to put down a dielectric layer 32, as shown in FIG. 5c, over the substrate 28 in order to isolate the switch electrodes and input/output connections. GaAs is a good choice for the substrate material when working in the RF domain. Its semi-insulating properties provide a very low loss substrate for RF signals and, as a result, it can be used without a dielectric material under the electrodes. In a general sense, the dielectric layer is shown in the cross sectional views but omitted in the top views for clarity.

FIGS. 5d and 5e show the build-up of the switch structure through the bottom metal electrode step. A metal layer is deposited on the wafer by sputter coating or other deposition technique. Sputter coating has the advantage of good step coverage over the edge of the etched region. Aluminum is one choice for the deposited metal, although any number of other metals could be used. A lithographic step is used to define the bottom metal electrode 38, along with the input and output pads 44 and 48, and then the metal is etched by means of a wet chemical or dry etching technique.

A dielectric layer 40 is then deposited on the wafer as indicated in FIGS. 5f and 5g. Plasma enhanced deposition of silicon nitride is a suitable choice for the layer. A lithography and etching step is then used to pattern and etch the nitride layer leaving the dielectric 40 covering the bottom electrode 38 in the area at the bottom of the recessed cavity.

Next, as shown in FIGS. 5h and 5i, a layer of photoresist 52 is spun on and defined by lithography. The spin rate and resist type are selected to produce the desired spacing of the membrane over the bottom electrode. Because the photoresist pattern extends well outside the etched cavity and the resist will not completely planarize, there will be a resist thickness on the top surface of the substrate which is similar in thickness to the resist in the etched cavity. This rim around the membrane is referred to as the "resist ledge" 54. Unlike a process that uses the resist spacer as the eventual post material, this resist layer is completely sacrificial and will be totally removed later in the process. As a result, the photoresist spacer 52 does not need to have all the properties that would be required for a material which would remain in the completed device. This feature provides a great deal of flexibility in processing the RF switch device.

Next, as shown in FIGS. 5j and 5k, a metal layer is deposited over the wafer. Sputtered Aluminum is a reasonable choice for this metal, although other metals could be used. A pattern is formed lithographically and the metal is etched either by wet etching or with the RIE technique discussed earlier, to form the metal membrane 34 over the resist spacer 52. Note that the metal deposited over the resist ledge around the periphery of the device forms the flexure structure 36 which supports the membrane and provides the desired stress relief. A series of small holes 56 are included in the membrane, a small section of which is shown in the exploded blow-up, wherever there is resist under the membrane, but not included around the edge of the device where the membrane sits directly on the substrate. Any number of hole patterns could be used to provide access for the undercut etch process, for example holes which are 2 microns in diameter and separated by 7.times.7 microns from center to center in both vertical and horizontal directions.

Finally, as illustrated in FIGS. 5l and 5m, the resist spacer layer 52 is undercut from underneath the membrane using an anisotropic dry etch. The undercut holes in the membrane, discussed above, are used for plasma dry etch access and a path for etching away the photoresist spacer from below the membrane. The end result is a membrane with an annular flexure structure 36 which is free to move up and down as the switch is turned on and off.

While the invention has been described in the context of a preferred embodiment, it will be apparent to those skilled in the art that the present invention may be modified in numerous ways and may assume many embodiments other than that specifically set out and described above. Accordingly, it is intended by the appended claims to cover all modifications of the invention which fall within the true spirit and scope of the invention.