Integrable Using Amorphous Magnetic Material Circuit Inductor

This invention relates in general to inductors, and more particularly, to inductors used in integrated circuits.

Inductive components are needed on integrated circuits for a wide variety of applications. Inductors formed on radio frequency (RF) or microwave frequency integrated circuits generally require a large amount of die space to achieve any significant inductance. In addition to substantial space consumption, when compared to typical transistors, resistors, and capacitors, the performance of integrated inductors tend to be poor. Inductors are often implemented on integrated circuits using spiraled conductor lines. Planar spiral inductors are easily fabricated, requiring only a single patterned metal layer, which tends to be space efficient. U.S. Pat. No. 5,396,101, issued to Shiga on Mar. 7, 1995, for an Inductance Element, describes an integrated spiral inductor that incorporates a core portion to increase inductance and/or to reduce space consumption.

Despite these advances, inductors integrated on integrated circuit substrates, such as silicon and gallium arsenide, still consume substantial space for radio frequency and microwave frequency applications. It is therefore desirable to obtain a better performing inductor for integrated circuit applications.

FIG. 1 is a plan view of a conductive pattern for a spiral inductor, in accordance with the present invention.

FIG. 2 is a cross-sectional view of a spiral inductor implemented on an integrated circuit substrate, in accordance with the present invention.

FIG. 3 is a fragmentary cross-sectional view of the integrated circuit inductor of FIG. 2, showing preferred dimensions, in accordance with the present invention.

FIG. 4 is a graph showing inductance for various ratios of magnetic material thickness to conductor line width of a spiral inductor, in accordance with the present invention.

Generally, the present invention provides an integrable circuit inductor, such as would be implemented on an integrated circuit substrate. The inductor has a conductive pattern, defining the inductor geometry, which is disposed within a material having a magnetic response at the operating frequency of the inductor. In the preferred embodiment, the inductor is implemented on a integrated circuit substrate by completely encapsulating a major portion of a spiral conductive pattern between layers of a amorphous ferrite material. The encapsulation provides a closed magnetic flux path for the inductor when processing a signal at its operating frequency. A ratio of magnetic material layer thickness to conductive pattern line width of between 0.5 and 10 is preferred.

FIG. 1 shows a cross-sectional plan view 100 of conductive material 110 patterned on a substrate 101 to form an inductor, in accordance with the present invention. The conductive material 110 is a planar metal conductor trace formed in a spiral pattern. This conductor trace 110, also commonly referred to as the coil of the inductor, can be formed using standard thin-film fabrication techniques typically used to deposit conductor traces on an integrated circuit. In the preferred embodiment, the conductor trace 110 has a particular conductor line width (W), measured across a planar surface of the inductor.

FIG. 2 is a cross-sectional side view of an integrated circuit 200 incorporating an inductor, in accordance with the present invention. The integrated circuit 200 has a layered construction which incorporates a circuit substrate layer 210, including a semiconductor substrate layer 211, a dielectric layer 213, a metal layer 215, and a passivation layer 217. The integrated circuit 200 further includes, according to the present invention, a circuit element such as an inductor 220 implemented as a layer of the integrated circuit 200. The inductor layer 220 includes the patterned conductive trace 110, such as in FIG. 1, embedded within layers of magnetic material 221, 223. The patterned conductive trace is electrically coupled to the circuit substrate layer 210 via conductive elements 227. The inductor layer forms a portion of the integrated circuit, and is preferably layered over the circuit substrate layer 210. An additional passivation layer 231 is included on top of the inductor layer 220.

The semiconductor substrate layer 211 forms the base upon which all the other layers of the integrated circuits are arranged. Common materials for forming the semiconductor substrate includes silicon, gallium arsenide, and ceramics. Metal layers 215 provide the basis for defining the circuitry of the integrated circuit. The circuitry may include elements such as transistors, resistors, capacitors, and the like. Integrated circuits often have multiple metal layers separated by dielectric material in order to accommodate more dense circuitry. The passivation layer 217 over the metal and dielectric layers 215, 213 is conventional.

According to the present invention, an inductor layer 220 is included on the integrated circuit 200 for implementing inductive circuit components. In the preferred embodiment, an inductor or inductance element is formed by embedding patterned inductive material within an insulative, i.e. non-conductive, magnetic material. The inductor is formed by depositing a first layer of magnetic material onto a layer, such as the passivation layer, of the integrated circuit. The patterned conductive trace is formed on this first layer, and the second layer of magnetic material is disposed on the first layer and on the patterned conductive trace. Preferably, the patterned conductive trace is formed along a plane normal to the stacked direction of the layers of the integrated circuit.

The magnetic material of the inductor layer 220 is selected to provide high permeability, low loss, and a high quality factor at the desired inductor operating frequencies, such as at radio or microwave frequencies. Accordingly, the preferred embodiment uses amorphous copper ferrite (CuFe.sub.2 O.sub.4) material, which is electrically non-conductive or insulative, but which provides a magnetic response at radio or microwave frequencies. Other amorphous ferrite materials have been found to be suitable including amorphous compounds of BiFeO.sub.3 such as BiFeO.sub.3 --CuFe.sub.2 O.sub.4, and BiFeO.sub.3 --ZnFe.sub.2 O.sub.4, and other like compositions.

In one experiment, inductors were fabricated using amorphous CuFe.sub.2 O.sub.4 thin films, which resulted in a constant inductance up to frequencies greater than 3 gigahertz (GHz). These inductors also had a higher quality factor (Q). Generally, the inductor can be built using thin film deposition technology as a post-processing operation during the manufacture of the integrated circuit. The patterned conductive trace defining the structure of the inductor is embedded within the magnetic material, such that the magnetic material completely surrounded or encapsulated a major portion of the patterned conductive trace. In this embodiment, the magnetic material is completely encapsulates the conductor line or trace so as to provide separation between successive turns of inductor loop. The magnetic material provides a closed magnetic flux path for an inductance element embedded or encapsulated as described, when the inductance element is processing a signal at its operating frequency.

Referring to FIG. 3, a fragmentary cross-sectional side view of the integrated circuit inductor is shown, in accordance with the present invention. As stated earlier, the planar spiral conductor pattern defining the inductor structure is sandwiched between two layers of insulative magnetic material. In the preferred embodiment, the dimensions of the thickness of the layers of magnetic material, as well as the width of the conductor used in the spiral inductor trace, are selected such that there is a particular ratio of magnetic material layer thickness to conductor line width. The thickness of the magnetic layer is measured along the stack direction of the layers of the integrated circuit, and the conductor line width is measured along a plane perpendicular to this stack direction. The conductor trace of the spiral has a particular conductor line width (W) in the preferred embodiment. The thickness (T) of each magnetic material layer sandwiching the conductor trace is selected to be between 0.5 and five times the conductor width, i.e., T=0.5 W-5 W. Thus, the ratio of magnetic layer thickness to conductor line width is between 0.5 and 5.

FIG. 4 is a graph 400 showing the impact of varying the ratio of magnetic material layer thickness to conductor line thickness for a particular inductor, in accordance with the present invention. Plots 410, 420 shows the change in inductance and quality factor, respectively, as the ratio of magnetic material thickness to conductor line width thickness is varied. The data corresponds to a typical spiral inductor, and magnetic material having a permeability of approximately 10. It can be seen that a significant increased in inductance and quality factor can be accomplished by forming an inductor using the concepts described herein. This increase is most dramatic for ratios of magnetic material layer thickness of up to 5 times the conductor line width thickness.

The present invention has broader applications than the particular embodiment described herein. For example, inductors having a variety of structures may be formed and significantly improved by embedding these structures between layers of magnetic material. Moreover, entire portions of circuits, including other circuit elements, may be sandwiched as described for improved performance. This includes other inductive structure, such as transformers, resonators, and the like.

The use of material that is magnetic at the operating frequency of the integrated circuit provides significant advantages. For example, there is a lowering of capacitive coupling between that portion of circuitry housed by the magnetic material and the semiconductor substrate. By confining the magnetic flux of the housed devices within the magnetic material, the magnetic flux is pulled out of the lossy semiconductor material. This results in an increased reactance, depending upon the relative permeability of the magnetic material used. Consequently, the inductance of circuit elements of a given design may be increased, or the space consumed on the integrated circuits for a device having a particular inductance may be decreased.

In the preferred embodiment the inductance element is completely surrounded by the magnetic material. However, significant benefits may be achieved by similarly encapsulating major portions of the inductance element, or major portions of entire circuitry on the integrated circuit.