Information Recording Apparatus, Information Recording Medium and Information Reproducing Apparatus

1. Field of the Invention

The present invention relates to an information recording apparatus for writing information (data) onto a DVD-RAM (DVD-Random Access Memory), which is capable of reading out information and also writing information.

The present invention also relates to an information recording medium on which information is written by the information recording apparatus.

The present invention further relates to an information reproducing apparatus for reading the information recorded on the information recording medium.

2. Description of the Related Art

A DVD (Digital Video or Versatile Disk) is a recording medium having the about seven times capacity as compared with that of a conventional recording medium such as a CD (Compact disk), an LD (Laser disk) or the like. Recently, the research and development about a DVD are done, especially, the research and development about a standard of a DVD-ROM (DVD-Read Only Memory), which is capable of only reading out the information recorded thereon in advance, are actively done.

Here, as one example of modulation and demodulation methods with respect to the DVD-ROM, so-called 8/16 modulation-demodulation method is proposed. The 8/16 modulation-demodulation method is briefly explained below.

The 8/16 modulation is a method to modulate digital record data, which is constructed by the unit of 8 bits, to code data, which is constructed by the unit of 16 bits, corresponding to each other. The code data is actually recorded onto the DVD-RON. In the 8/16 modulation, four modulation tables are used. In each of the modulation tables, each of the code data constructed of 16 bits corresponding to respective one of the record data constructed of 8 bits are described in advance. Namely, in the 8/16 modulation, one modulation table is selected from four modulation tables, and the record data is modulated to the code data by using the selected modulation table. At this time, the selection of the modulation table is done on the basis of discriminating information called "state information". Namely, the state information is determined in advance in view of so-called zero-run-length, i.e., the number of "0" bits which are arrayed at the end-part in the code data which is obtained to modulate one record data by using the 8/16 modulation. For example, when the n.sup.th record data is modulated, the state information, which is used for selecting the modulation table when the (n+1).sup.th record data (the next record data of the n.sup.th record data) is modulated, is obtained. Therefore, in case that the (n+1).sup.th record data is modulated, the modulation table is selected on the basis of this state information. Then, the (n+1).sup.th record data is modulated to the code data by using the selected modulation table.

On the other hand, the 8/16 demodulation is the method to demodulate the code data recorded on the DVD-ROM to the record data. In the 8/16 demodulation, for example, the m.sup.th code data is demodulated on the basis of the (m+1).sup.th code data (the next code data of the m.sup.th code data) by using the demodulation tables. In each of the demodulation tables, each of the record data corresponding to respective one of the code data are described in advance.

However, if the 8/16 modulation-demodulation method used for the DVD-ROM would be adapted for the DVD-RAM capable of reading out information and also writing information, a problem is posed as followings. Namely, in the DVD-RAM, information is not always continuously recorded (written) thereon in time sequence. More particularly, when information is recorded on the DVD-RAM, the information is recorded thereon by the unit of the data-sector constructed by a predetermined quantity (size) of byte-data in order to carry out the error correcting at the time of reproduction. Therefore, in case that the first information constructed of several data-sectors is recorded on the DVD-RAM at first, and next, the second information, which is unrelated to the first information, is recorded thereon, it may happen a case that the recorded data-sectors adjacent to each other are not in series between the first information and the second information. Namely, it may happen a case that the continuity of the data-sector between the first information and the second information is lost or destroyed.

In this case, there is no next code data, which follows the last code data placed at the end-part in the last data-sector placed at the end-portion in the first information, because the recording for the first information is completed when the last code data is recorded on the DVD-RAM. Therefore, if the 8/16 demodulation would be carried out with respect to the last code data, it cannot be done because the next code data, which follows the last code data, does not exist.

It is therefore an object of the present invention to provide an information recording apparatus, an information recording medium and an information reproducing apparatus, in which code data, which is modulated by using 8/16 modulation-demodulation method and recorded on a DVD-RAM, can be completely demodulated by using 8/16 modulation-demodulation method.

More specifically, as mentioned above, even if a plurality of information unrelated to each other are recorded on the DVD-RAM, the last code data, which is placed at the end-part of the last data-sector placed at the end-portion in these information can be demodulated by using the 8/16 modulation-demodulation method. Therefore, all code data recorded on the DVD-RAM can be correctly demodulated by using the 8/16 modulation-demodulation method, and record data corresponding to the code data can be obtained.

According to the present invention, the above mentioned object can be achieved by an information recording apparatus for record data onto an information recording medium, the apparatus having: an inputting device for inputting record data, whose length is N bits; a modulation device for modulating the inputted record data to code data, whose length is M (M.gtoreq.N) bits, by using a predetermined modulation-demodulation method, the predetermined modulation-demodulation method having: a modulation method, wherein the (n+1).sup.th record data (n: natural number) is modulated to the (m+1).sup.th code data (m: natural number) including demodulating information for selecting a demodulation table to be used for demodulating the m.sup.th code data to the n.sup.th record data corresponding to the m.sup.th code data, and a demodulation method, wherein the demodulation table is selected from a plurality of demodulation tables on the basis of the demodulating information included in the (m+1).sup.th code data, and the m.sup.th code data is demodulated to the n.sup.th record data corresponding to the m.sup.th code data on the basis of the selected demodulation table; a first recording device for recording a data-sector including a plurality of the modulated code data onto the information recording medium; a generating device for generating a discriminating data including the demodulating information for selecting the demodulation table to be used for demodulating a last code data, which is placed at an end-part of the data-sector, to the record data corresponding to the last code data by using the predetermined modulation-demodulation method on the basis of the inputted record data; and a second recording device for recording the generated discriminating data onto the information recording medium at the place immediately after the last code data.

Thus, when the inputted record data is modulated to the last code data, the discriminating data including the demodulating information for selecting the demodulation table to be used for demodulating a last code data is generated by the generating device. Then, the discriminating data is recorded on the information recording medium at the place immediately after the last code data. Therefore, when the last code data is demodulated to the record data by using the predetermined modulation-demodulation method, the demodulation table can be selected from a plurality of demodulation tables on the basis of the demodulating information included in the discriminating data, and the last code data can be correctly demodulated to the record data corresponding to the last code data on the basis of the selected demodulation table, and thus, information corresponding to the last code data is correctly reproduced.

According to the present invention, the aforementioned object can be achieved by an information recording medium for storing data to be reproduced by an information reproducing apparatus, the information recording medium having a data structure stored therein, said data structure having a plurality of data-sectors, each of the data-sectors including: a plurality of code data, a length of each of the code data being N bits, each of the code data being obtained to modulate each record data whose length is N (N.ltoreq.M) by using a predetermined modulation-demodulation method, the predetermined modulation-demodulation method comprising a modulation method, wherein the (n+1).sup.th record data (n: natural number) is modulated to the (m+1).sup.th code data (m: natural number) including demodulating information for selecting a demodulation table to be used for demodulating the m.sup.th code data to the n.sup.th record data corresponding to the m.sup.th code data, and a demodulation method, wherein the demodulation table is selected from a plurality of demodulation tables on the basis of the demodulating information included in the (m+1).sup.th code data, and the m.sup.th code data is demodulated to the n.sup.th record data corresponding to the m.sup.th code data on the basis of the selected demodulation table; and a discriminating data placed immediately after a last code data, which is placed at the end-part of the data-sector stored in the information recording medium, a discriminating data including the demodulating information for selecting the demodulation table to be used for demodulating the last code data to the record data corresponding to the last code data by using the predetermined modulation-demodulation method.

Thus, when the last code data included in the data-sector recorded on the information recording medium is demodulated to the record data by using the predetermined modulation-demodulation method, the demodulation table can be selected from a plurality of demodulation tables on the basis of the demodulating information included in the discriminating data recorded on the information recording medium, and the last code data can be correctly demodulated to the record data corresponding to the last code data on the basis of the selected demodulation table, and thus, information corresponding to the last code data is correctly reproduced.

According to the present invention, the aforementioned object can be achieved by an information reproducing apparatus for reproducing information included in a data-sector recorded on an information recording medium, the data-sector including a plurality of code data and a discriminating data, a length of each of the code data being M bits, each of the code data being obtained to modulate each record data whose length is N (N.ltoreq.M) by using a predetermined modulation-demodulation method, the predetermined modulation-demodulation method having: a modulation method wherein the (n+1).sup.th record data (n: natural number) is modulated to the (m+1).sup.th code data (m: natural number) including demodulating information for selecting a demodulation table to be used for demodulating the m.sup.th code data to the n record data corresponding to the m.sup.th code data, and a demodulation method wherein the demodulation table is selected from a plurality of demodulation tables on the basis of the demodulating information included in the (m+1).sup.th code data, and the m.sup.th code data is demodulated to the n record data corresponding to the m.sup.th code data on the basis of the selected demodulation table, the discriminating data placed immediately after a last code data, which is placed at an end-part in the data-sector recorded in the information recording medium, the discriminating data including the demodulating information for selecting the demodulation table to be used for demodulating the last code data to the record data corresponding to the last code data by using the predetermined modulation-demodulation method, the information reproducing apparatus having: a detecting device for detecting the data-sector recorded on the information recording medium; an extracting device for extracting each of the code data and the discriminating data from the detected data-sector; a first demodulation device for demodulating each of the extracted code data to the record data corresponding to each of the extracted code data by using the predetermined modulation-demodulation method when the extracted code data is not a last code data; and a second demodulation device for demodulating the last code data to the record data corresponding to the last code data by a method, wherein the demodulation table is selected from demodulation tables on the basis of the demodulating information included the extracted discriminating data, and the last code data is demodulated to the record data corresponding to the last code data on the basis of the selected demodulation table, when the extracted code data is the last code data.

Thus, the last code data included in the data-sector detected by the detecting device can be correctly demodulated to the record data by the second demodulating device, and information corresponding to the last code data can be correctly reproduced.

According to the present invention, the aforementioned object can be also achieved by an information reproducing apparatus for reproducing information included in a first data-sector and a second data-sector respectively recorded on an information recording medium, each of the first data-sector and the second data-sector including a synchronous data, a plurality of code data and a discriminating data, the synchronous data placed at a top-part of each of the first data-sector and the second data-sector, a length of the synchronous data is L bits (L>M), each of the code data arrayed immediately after the synchronous data in each of the first data-sector and the second data-sector, each of the code data being obtained to modulate each record data whose length is N (N.ltoreq.M) by using a predetermined modulation-demodulation method, the predetermined modulation-demodulation method having: a modulation method, wherein the (n+1).sup.th record data (n: natural number) is modulated to the (m+1).sup.th code data (m: natural number) including demodulating information for selecting a demodulation table to be used for demodulating the m.sup.th code data to the n.sup.th record data corresponding to the m.sup.th code data, and a demodulation method, wherein the demodulation table is selected from a plurality of demodulation tables on the basis of the demodulating information included in the (m+1).sup.th code data, and the m.sup.th code data is demodulated to the n.sup.th record data corresponding to the m.sup.th code data on the basis of the selected demodulation table, the discriminating data placed immediately after a last code data, which is placed at an end-part of each of the first data-sector and the second data-sector respectively recorded in the information recording medium, the discriminating data including the demodulating information for selecting the demodulation table to be used for demodulating the last code data to the record data corresponding to the last code data by using the predetermined modulation-demodulation method, a length of the discriminating data being the same as the length of the code data, the information reproducing apparatus having a detecting device for detecting the first data-sector and the second data-sector respectively recorded on the information recording medium; an extracting device for extracting the synchronous data, each of the code data and the discriminating data from each of the detected first data-sector and detected second data-sector; a generating device for generating a connection data by connecting K (1.ltoreq.K.ltoreq.M) bits at the MSB side of the discriminating data included in the first data-sector and a (L-K).sup.th bit at the MSB side and the following bits of the synchronous data included in the second data-sector; a first demodulation device for demodulating each of the extracted code data to the record data corresponding to each of the extracted code data by using the predetermined modulation-demodulation method, when the extracted code data is not a last code data, which is placed at an end-part in each of the data-sector; and a second demodulation device for demodulating the last code data to the record data corresponding to the last code data by a method, wherein the demodulation table is selected from a plurality of demodulation tables on the basis of the generated connecting data, and the last code data is demodulated to the record data corresponding to the last code data on the basis of the selected demodulation table, when the extracted code data is the last code data.

Thus, the last code data included in the data-sector detected by the detecting device can be correctly demodulated to the record data by the second demodulating device on the basis of the connection data generated by the generating device, and information corresponding to the last code data can be correctly reproduced.

FIG. 1 is a block diagram showing an outline construction of an information recording apparatus of an embodiment;

FIG. 2 is a diagram for showing an example of a part of a modulation table by using 8/16 modulation;

FIG. 3 is a figure for explaining the relation between the zero-run-length of the code data and the state with respect to the modulation table;

FIG. 4 is a figure for explaining the relations between the states and the contents of bits of the code data;

FIG. 5a is a figure for showing an example of sync-patterns corresponding to the state 1 and state 2;

FIG. 5b is a figure for showing an example of sync-patterns corresponding to the state 3 and state 4;

FIG. 6 is a diagram for explaining the recording format of a DVD-RAM;

FIG. 7 is a block diagram showing an outline construction of an information reproducing apparatus of the first embodiment;

FIG. 8 is a block diagram showing an outline construction of an 8/16 decoder of the first embodiment;

FIG. 9 is a block diagram showing an outline construction of an information reproducing apparatus of the second embodiment;

FIG. 10 is a block diagram showing an outline construction of an 8/16 decoder of the second embodiment;

FIG. 11 is a figure for explaining the separating operation and the connecting operation in the information reproducing apparatus of the first embodiment; and

FIG. 12 is a figure for explaining the separating operation and the connecting operation in the information reproducing apparatus of the second embodiment.

Referring to the accompanying drawings, embodiments of the present invention will be now explained. In the following explanation, the present invention is adapted for recording and reproducing a DVD-RAM using 8/16 modulation-demodulation method as a predetermined modulation-demodulation method.

(I) Embodiment of Information Recording Apparatus and Information Recording Medium

An embodiment of an information recording apparatus of the present invention and an information recording medium of the present invention on which information is recorded by using the information recording apparatus is explained with FIGS. 1 to 6.

In FIG. 1, an outline construction of the information recording apparatus 100 of the present invention is shown. Actually, the information recording apparatus 100 has various control sections to control a focus servo, a tracking servo, spindle servo, and so on; a display section to display a condition of an operation of the information recording apparatus 100; and an input control section to input various information. However, these section are omitted in FIG. 1 in order to make the explanation for the present invention understandable.

In FIG. 1, the information recording apparatus 100 is to record information onto the DVD-RAM 1, which is one example of an information recording medium. The information recording apparatus 100 has a spindle motor 2, an optical pickup 3, an ID extracting circuit 4, a timing generator 5, a decision circuit 6, a CPU 7, an AND gate circuit 8, an NRZL (Non Return to Zero Inverted) modulation circuit 9, a switch 10, an ECC (Error Correcting Code) adding circuit 11, a separation circuit 12 as one example of an inputting device, an 8/16 encoder 13 as one example of a modulation device, a post-amble generator 14 as one example of a generation device, a VFO (Variable Frequency Oscillator) generator 15, and a synchronous generator 16. In the present embodiment, one example of a recording device is constructed of the optical pickup 3, the ID extracting circuit 4, the timing generator 5, the decision circuit 6, the CPU 7, the AND gate circuit 8, the NRZL modulation circuit 9 and the switch 10.

In operation, for the purpose of recording information onto the DVD-RAM 1, a record signal S.sub.R is inputted to the ECC adding circuit 11 from the external by the unit of 8 bits. When the record signal S.sub.R is inputted, the ECC adding circuit 11 makes a group constructed of 16 data-blocks included in the inputted record signal S.sub.R, and appends an error correcting code (ECC), which is used for error correcting at the time of reproduction, to this group. Then, the ECC adding circuit 11 outputs an appended-record signal S.sub.ER, which is the record signal S.sub.R to which the ECC is appended, to the separation circuit 12.

The separation circuit 12 separates the appended-record signal S.sub.ER by the unit of one data-block, and outputs this separated data-block as a block-record signal S.sub.SR by the unit of one data-block.

Then, the 8/16 encoder 13 modulates the record data, whose length is 8 bits, and included in the block-record signal S.sub.SR, to the code data, whose length is 16 bits.

Here, 8/16 modulation, which is executed by the 8/16 encoder 13, is explained with FIGS. 2 to 4.

The 8/16 modulation is a method to modulate the record data constructed of 8 bits to the code data constructed of 16 bits by using four modulation tables. Namely, in the 8/16 modulation, one modulation table is selected from four modulation tables, and the record data is modulated to the code data by using the selected modulation table.

As shown in FIG. 2, each of four modulation tables is respectively called as a "state 1", a "state 2", a "state 3" and a "state 4". In each of the modulation tables, each of the code data constructed of 16 bits corresponding to respectively one of the record data constructed of 8 bits are described in advance. The record data is constructed of 8 bits, and thus, the total number of the record data is 256, so that 256 code data are actually described in each of the modulation tables.

In the 8/16 modulation, the selection of the modulation table is performed on the basis of discriminating information called "state information". For example, in case that the (n+1).sup.th record data, which is the next record data of the n.sup.th record data, is modulated to the code data by using the 8/16 modulation, the state of the modulation table is decided on the basis of the state information with respect to the (n+1).sup.th record data. Then, the modulation table corresponding to the decided state is selected, and the (n+1).sup.th record data is modulated to the code data by using the selected modulation table.

More specifically, the state information with respect to the (n+1).sup.th record data is obtained when the n.sup.th record data is modulated to the code data. Namely, as shown in FIG. 2, in each of the modulation table, not only each of the code data corresponding to each of the record data but also the state information to select the state of the modulation table with respect to the next code data are described in advance such that each of the state information corresponds to each of the code data. For example, when the n.sup.th record data is modulated to the code data by using a modulation table, the state information for the next code data, i.e. the state information for the code data corresponding to the (n+1).sup.th record data, is also recognized. Thereafter, when the (n+1).sup.th record data is to be modulated to the code data, the state of the modulation table is decided on the basis of the state information recognized at the time of modulating the n.sup.th record data to code data.

Here, the reason why it is necessary to use four modulation table at the time of the 8/16 modulation is explained below.

Each of the code data is set in accordance with the rule with respect to the limitation of zero-run-length. Here, the zero-run-length is the length of the series "0" bits, i.e., the number of "0" bits which are repeatedly and continuously arrayed in the code data. The limitation of zero-run-length is determined in advance on the basis of the allowable minimum length and the allowable maximum length of the information pit formed on the surface of the DVD-RAM 1 when the code data is recorded on the DVD-RAM 1. The allowable minimum length is set on the basis of the minimum length of the information pit which it is possible to detect by an information reproducing apparatus. The allowable maximum length is set on the basis of the maximum length of the information pit for which it is possible to stabilize a servo control such as a tracking servo control of the information reproducing apparatus. For example, the allowable minimum length is "2", and the allowable maximum length is "10".

Further, the zero-run-length at the place where the two code data adjacent to each other are connected obeys the aforementioned limitation of zero-run-length. Namely, after the 8/16 modulation is preformed, the total of the zero-run-length of the end-part (LSB side) of the code data and the zero-run-length of the beginning-part (MSB side) of the next code data are always in the range of 2 to 10 as shown in FIG. 3. Therefore, in the 8/16 modulation, the suitable modulation table is selected from four modulation tables on the basis of the state information, and the code data is modulated by using the selected suitable modulation table such that all code data obey the rule with respect to the limitation of the zero-run-length. For example, if the zero-run-length at the LSB side of the code data which is obtained to modulate the n.sup.th record data is "1" (the number of the bit "0" at the LSB side of the code data is "1"), the "state 1" is selected, and the (n+1).sup.th record data is modulated to the code data by using the modulation table corresponding to the "state 1".

As mentioned above, in the 8/16 encoder 13, the record data is modulated to the code data by using the state information, and the code data is outputted to the 1st input-terminal of the switch 10 as a code data signal S.sub.M.

Further, when the 8/16 encoder 13 modulates the last record data placed at the end-part of the data-block included in the block-record signal S.sub.SR, the 8/16 encoder 13 outputs the state information corresponding to this modulated code data (hereinbelow it is referred to as "last code data"), and this state information is inputted into the post-amble generator 14 (hereinbelow it is referred to as "PA generator 14") as a state information signal S.sub.I.

The PA generator 14 generates a post-amble (hereinbelow it is referred to as "PA") corresponding to the state information of the last code data, which is obtained to modulated the last record data placed at the end-part of the data-block included in the block-record signal S.sub.SR, and outputs the PA to the 2nd input-terminal of the switch 10 as a PA signal S.sub.PA.

Here, the PA is generated by the PA generator 14 on the basis of the state information of the last code data. The PA is designed for demodulating the last code data to the record data corresponding to each other by the 8/16 demodulation, as explain below. Further, the PA is digital data constructed of 16 bits in the same manner as other code data. Concretely, the PA is constructed in accordance with the following qualifications. Namely, the PA is constructed in accordance with the limitation of zero-run-length with relation to the other code data placed in front and behind of the PA. Furthermore, there are two types of the PA. Namely, the bit-construction of the PA of one type is such that the 1st bit of MSB side is "1" and the 13th bit at the MSB side is "0", for example, "0001000100000000b" ("b" indicates that the number is a binary). The bit-construction of the PA of the other type is such that the 1st bit of MSB side is "0" and the 13th bit of MSB side is "0", for example, "1001000100000000b". In case that the state information corresponding to the last code data indicates the "state 2", the PA of the aforementioned one type is generated. In case that the state information corresponding to the last code data indicates the "state 3", the PA of the aforementioned the other type is generated. In addition, if the state information corresponding to the last code data is the "state 1" or the "state 4", the PA of the aforementioned one or the other type is generated.

The reason why there are two types of the PA is explained.

The PA is used for 8/16 demodulation, which is carried out by the information reproducing apparatus.

Here, the 8/16 demodulation is the method to demodulate the code data to the record data. In case that the code data is demodulated to the record data, if each of the code data completely corresponds to each of the record data, it would be possible to carry out the demodulation by using only one demodulation table in which all record data corresponding to each of the code data are described. However, in the 8/16 demodulation, there are some code data corresponding to two record data. Namely, as shown in FIG. 2, for example, the code data CD1 and CD2 are double, and they are the same regardless each of the corresponded record data is different from each other. Therefore, it is impossible to carry out the 8/16 demodulation by using only one demodulation table.

Therefore, at least two demodulation tables is used for the 8/16 demodulation. In the first demodulation table, the record data corresponding to one code data among the double code data is described, and in the second demodulation table, the record data corresponding to the other code data among the double code data is described. Then, when the 8/16 demodulation is to be performed, the first or second demodulation table is alternatively selected.

Further, the selection of the demodulation table is based on the bit-construction of the next code data. Namely, for example, in case that the m.sup.th code data is demodulated, one or the other demodulation table is selected from two demodulation tables on the basis of the bit-construction of the (m+1).sup.th code data.

More concretely, all code data described in the "state 2" of the modulation table used for the 8/16 modulation are constructed such that the 1st bits and 13th bits at the MSB side are "0". On the other hand, all code data described in the "state 3" of the modulation table are constructed such that one of the 1st bits and the 13th bit at the MSB side of are "1". Here, when the record data is modulated to the code data by using the 8/16 modulation, in case that the m.sup.th code data is double, the (m+1).sup.th code data, which is placed at the next portion of the m.sup.th code data, is always selected from the code data described in the "state 2" or the "state 3" of the modulation table. Therefore, when the 8/16 demodulation is done, the 1st bit and the 13th bit of the (m+1).sup.th code data are checked, and it is judged whether the state of the (m+1).sup.th code data is in the "state 2" or the "state 3". In case that the m.sup.th code data is double, if the (m+1).sup.th code data is in the "state 2", the first demodulation is selected, and the m.sup.th code data is demodulated to the record data corresponding this m.sup.th code data by using the first demodulation table. Similarly, if the (m+1).sup.th code data is in the "state 3", the second demodulation is selected, and the m.sup.th code data is demodulated to the record data corresponding this m.sup.th code data by using the second demodulation table.

In this manner, in the 8/16 demodulation, if the m.sup.th code data is double, one demodulation table is selected among the two demodulation table on the basis of the state of the (m+1).sup.th code data, and the m.sup.th code data is correctly demodulated to the record data only corresponding to the m.sup.th code data on the basis of the selected demodulation table.

As mentioned above, the bits-construction (with respect to the 1st bit and the 13th bit) of the PA is similar to that of code data in the "state 2" or the "state 3". Therefore, in case that the 8/16 demodulation with respect to the last code data is done, the 1st bit and the 13th bit of the PA are checked, and the bit-construction thereof is judged. Thus, if the last code data is double, the record data corresponding to this last code data can be correctly demodulated on the basis of the PA.

Next, the VFO generator 15 generates a VFO signal S.sub.VFO for generating the reproduction-clock, which is used for the control of the reproducing operation at the time of the reproduction for the DVD-RAM 1, and the VFO generator 15 outputs to the 3rd input-terminal of the switch 10. The VFO signal S.sub.VFO is constructed by a pattern repeated, for example, "1000b".

The synchronous generator 16 generates the sync-pattern to be used for a synchronous signal S.sub.SY at the time of the reproduction for the DVD-RAM 1.

Here, referring to FIG. 5, the synchronous signal S.sub.SY is explained in detail.

The synchronous signal SYY includes a plurality of different sync-patterns. Concretely, one kind of the sync-patterns are shown in FIG. 5a, and these patterns correspond to the "state 1" and the "state 2". The other kind of the sync-patterns are shown in FIG. 5b, and these patterns correspond to the "state 3" and the "state 4". Further, each kind of the sync-patterns has 8 patterns, i.e. the pattern 0 (sync 0) to the pattern 7 (sync 7), and each of the sync-patterns is constructed in accordance with the aforementioned the rule with respect to the limitation of zero-run-length. Furthermore, as shown in FIGS. 5a and 5b, there are two types of sync-patterns for each of the sync-patterns 0 to 7, and one of the sync-pattern is alternatively selected under the DSV (Digital Sum Variation) control at the time of reproduction for the DVD-RAM 1. The synchronous signal S.sub.SY is outputted to the 4th input-terminal of the switch 10.

On the other hand, the DVD-RAM 1 is rotated in the predetermined rotation number. Further, the optical beam B to be used for recording information is irradiated by the optical pickup 3, and the reflective light, which is formed of the optical beam B reflected in the DVD-RAM 1, is detected by the optical pickup 3. Therefore, ID part information, which is recorded in advance on the DVD-RAM 1 in the predetermined intervals, is detected, and the optical pickup 3 outputs a detection signal S.sub.PP including the ID part information. The ID part information includes the address data, which indicates the address of the information recorded on the DVD-RAM 1.

Further, the detection signal S is inputted into the ID extracting circuit 4, and in the ID extracting circuit 4, the ID part information is extracted from the detection signal SYY. Then, the ID extracting circuit 4 outputs a position signal S.sub.P, which indicates the timing when the top position of the ID part information is detected, and the ID extracting circuit 4 also outputs the address information included in the ID part information, as the address signal SAD.

The aforementioned position signal S.sub.P is inputted into the timing generator 5, and the timing generator 5 generates a timing signal S.sub.T on the basis of the position signal S.sub.P. The timing signal S.sub.T is used for switching the switch 10. Namely, the switch 10 is switched by the position signal S.sub.P, and thus, the code data signal S.sub.M, the PA signal S.sub.PA, the VFO signal S.sub.VFO and the synchronous signal S.sub.SY are outputted from the output-terminal of the switch 10. Therefore, the code data, the PA, the VFO and the sync-signal are respectively recorded onto the DVD-RAM 1, based on a predetermined recording format explained below.

In contrast, the address signal S.sub.AD outputted from the ID extracting circuit 4 is inputted into the decision circuit 6. Further, a control signal S.sub.C is also inputted into the decision circuit 6. The control signal S.sub.C is generated by the CPU 7. Namely, the CPU 7 recognizes the contents of the signals outputted from the output-terminal of the switch 10, and the CPU 7 outputs the result of the recognition, as the control signal S.sub.C. Then, the decision circuit 6 generates and outputs a decision signal S.sub.W on the basis of the contents of signals outputted from the switch 10 (the control signal S.sub.C) and the address information included in the ID part information (the address signal S.sub.AD). The decision signal S.sub.W is used for deciding whether a modulation signal S.sub.MI outputted from the NRZI modulation circuit 9 is recorded onto the DVD-RAM 1 or not. The modulation signal S.sub.MI is generated by the NRZI modulation circuit 9. The NRZI modulation circuit 9 carries out the NRZI modulation with respect to the signals outputted from the switch 10 (i.e. the code data signal S.sub.M, the PA signal S.sub.PA, VFO signal S.sub.VFO and the synchronous signal S.sub.SY)

Thereafter, the decision signal S.sub.W is inputted into the AND gate circuit 8 together with the aforementioned modulation signal S.sub.MI, and the AND gate circuit 8 carries out the AND operation with respect to the decision signal S.sub.W and the modulation signal S.sub.MI, and thus, a writing signal S.sub.DD is generated. This writing signal S.sub.DD is used for controlling the irradiation of the optical beam B to used for recording information onto the DVD-RAM 1. Concretely, the writing signal S.sub.DD is inputted into the optical pickup 3, and thus, the laser diode of the optical pickup 3 is driven. Therefore, the optical beam B for recording information is irradiated to the DVD-RAM 1, and the modulation signal S.sub.MI is recorded onto the DVD-RAM 1.

Next, the recording format to be used for recording the modulation signal S.sub.MI onto the DVD-RAM 1, is explained with FIG. 6. In FIG. 6, the physical recording format on the one track TR of the DVD-RAM 1 is shown.

At first, as shown in FIG. 6, the switch 10 of the information recording apparatus 100 is switched on the basis of the timing signal S.sub.T such that the VFO signal S.sub.VFO is recorded immediately after the ID part information, which is pre-format on the DVD-RAM 1 in advance. Therefore, the VFO part 21, e.g. "1000b", is recorded on the DVD-RAM 1 immediately after the ID part 20.

Next, the data-sector 22 is formed on the DVD-RAM 1 immediately after the VFO part 21. Namely, the switch 10 is switched on the basis of the timing signal S.sub.T such that a sync "0" included in the synchronous signal S.sub.SY is recorded on the DVD-RAM 1 at the beginning part of the data-sector 22, i.e. immediately after VFO part 21. Therefore, the sync 23 (sync "0") is recorded immediately after VFO part 21. The sync "0" is the first synchronous signal of the data-sector 22. Thus, it is standardized that the sync "0" always has the sync-pattern corresponding to the "state 1" or the "state 2".

Next, the switch 10 is switched on the basis of the timing signal S.sub.T such that code data signal S.sub.M is recorded on the DVD-RAM 1 immediately after the sync 23. Therefore, the sync-frame 24 is formed by the code data signal S.sub.M, and the sync-frame 24 is recorded on the DVD-RAM 1. Thereafter, a combination of the sync 23 and the sync-frame 24 is formed, and 26 combinations (26 sync-frames) can be included in one data-sector 22. In addition, each of the sync-frames 24 is constructed of 93 bytes. Further, in case that the amount of the combinations included in one data-sector 22 are less than 26, in the rest of the data-sector 22, the unrelated data, which is unrelated the reproducing operation at the time of the reproduction for the DVD-RAM 1, for example, "00000 . . . " or "11111 . . . " is recorded.

Further, the switch 10 is switched on the basis of the timing signal S.sub.T such that the PA signal S.sub.PA is recorded on the DVD-RAM 1 at the end-part (last) of one data-sector 22, and thus, a PA part 25 is formed at the end-part of the data-sector 22. Concretely, as mentioned above, "0001000100000000b" (state 2) or "1001000100000000b" (state 3) is recorded at the end-part of the data-sector 22 on the DVD-RAM 1 as the PA part 25.

As mentioned above, according to the information recording apparatus 100 of the embodiment, the PA part 25 is formed and recorded at the end-part of the data-sector 22 when the code data is recorded onto the DVD-RAM 1 by using the 8/16 modulation. Therefore, when the last code data placed at the end-part of the data-sector 22 (immediately before the PA part 25) is demodulated to the record data by using the 8/16 demodulation, one modulation table can be selected from the two demodulation tables on the basis of whether the state of the PA part 25 is the "state 2" or the "state 3", and the last code data can be correctly demodulated by using the 8/16 demodulation and the reproduction with respect to the last code data can be done.

(II) Embodiments of Information Reproducing Apparatus

Embodiments of an information reproducing apparatus of the present invention are explained with FIGS. 7 to 12.

(A) The First Embodiment of Information Reproducing Apparatus

In FIGS. 7 and 8, the construction of an information reproducing apparatus 200 of the first embodiment is shown. The information reproducing apparatus 200 has the exclusive reproducing section to reproduce the DVD-RAM 1.

As shown in FIG. 7, the information reproducing apparatus 200 is constructed of a spindle motor 30, an optical pickup 31 as one example of a detecting device, an ID extracting circuit 32, a read out circuit 33 as one example of a extracting device and a demodulation section 40. In case that the aforementioned information recording apparatus 100 and the information reproducing apparatus 200 of the this embodiment put in the one body case, it is possible that the spindle motor 2, the optical pickup 3 and the ID extracting circuit 4 constructing the aforementioned information recording apparatus 100 are used for the information reproducing apparatus 200 instead of the spindle motor 30, the optical pickup 31 and the ID extracting circuit 32.

Further, the demodulation section 40 is constructed of an 8/16 decoder 41 as one example of a demodulation device, a mixing circuit 42 and an error correcting circuit 43.

Furthermore, as shown in FIG. 8, the 8/16 decoder 41 is constructed of a ROM 41A, a ROM 41B, a select switch SW and an extracting circuit 41C.

In operation, the DVD-RAM 1, on which the information shown in FIG. 6 is recorded, is rotated in the predetermined rotation number by the spindle motor 30. At this time, the optical beam B to be used for reproduction is irradiated to the DVD-RAM 1 by the optical pickup 31, and the optical pickup 31 receives the reflective light in the DVD-RAN 1. Then, the optical pickup 31 outputs a detection signal S.sub.PU including the aforementioned code data signal S.sub.M, the PA signal S.sub.PA, the VFO signal S.sub.VFO the synchronous signal S.sub.SY and the address signal S.sub.AD. Then, the detection signal S.sub.PU is inputted into the ID extracting circuit 32, and in the ID extracting circuit 32, the address signal S.sub.AD is extracted, and thus, the address of the data-sector at the position which the optical beam B is irradiated now is obtained. Then, the ID extracting circuit 32 generates and outputs a data signal S.sub.D including this address of the data-sector and the other signal. At this time, the VFO signal S.sub.VFO included in the detection signal S.sub.PU is outputted toward the reproducing clock generation circuit (not shown in figures), and in the reproducing clock generation circuit, the reproducing clock is generate as a standard clock for reproduction.

Next, the read out circuit 33 reads out the code data signal S.sub.M from the data signal S.sub.D, and also reads out the PA signal S.sub.PA from the PA part 25 placed the end-part of the data-sector 22 included in the data signal S.sub.D. Then, the read out circuit 33 outputs a read out signal S.sub.DR including the code data signal S.sub.M and the PA signal S.sub.PA to the demodulation section 40.

The 8/16 decoder included in the demodulation section 40 demodulates the code data included in the code data signal S.sub.M included in the read out signal S.sub.DR to the record data constructed of 8 bits by using the 8/16 demodulation. As mentioned above, in order to carry out the 8/16 demodulation, two demodulation tables are needed. Thus, as shown in FIG. 8, the 8/16 decoder 41 has two memory devices i.e., the ROM 41A and the ROM 41B, and each of the two demodulation tables is respectively memorized in each of the ROM 41A and the ROM 41B.

More specifically, in each of the demodulation table respectively memorized in the ROM 41A and ROM 41B, the record data corresponding to the code data is described. However, as mentioned above, it may happen a case that one code data is demodulated to two kinds of the record data, such as the code data CD1 and CD2 (double code data) as shown in the FIG. 2, and thus, it may happen a case that the record data corresponding to the code data is not correctly demodulated. In order to prevent this case, in one demodulation table memorized in the ROM 41A, each of the record data corresponding to each of the code data expect for the record data corresponding to one code data among the double code data are described in advance. For example, in one demodulation table, the record data corresponding to the code data CD1 is described, but the record data corresponding to the code data CD2 is not described. On the other hand, in the other table memorized in the ROM 41B, each of the record data corresponding to each of the code data except for the record data corresponding to the other code data among the double code data are described. For example, in the other demodulation table, the record data corresponding to the code data CD2 is described, but the record data corresponding to the code data CD1 is not described.

Then, the read out signal S.sub.DR is inputted to both of the ROM 41A and the ROM 41B, and in each of the ROM 41A and the ROM 41B, the demodulation is independently done. For example, if the m.sup.th code data included in the read out signal S.sub.DR is inputted to both of the ROM 41A and the ROM 41B, the demodulation is done in each of the ROM 41A and the ROM 41B, and each of the record data corresponding to the m.sup.th code data is outputted from each of the RAM 41A and the RAM 41B. At this time, the bit-construction of the 1st bit and the 13th bit at the MSB side of the (m+1).sup.th code data are recognized, and thus, the state of the (m+1).sup.th code data is recognized. Then, if the state of the (m+1).sup.th code data is the "state 2", the selection switch SW is switched such that the ROM 41A and the extracting circuit 41C are connected to each other, and the record data corresponding to the m.sup.th code data is fed into the extracting circuit 41C from the ROM 41A. On the other hand, if the state of the (m+1).sup.th code data is the "state 3", the selection switch SW is switched such that the ROM 41B and the extracting circuit 41C are connected to each other, and the record data corresponding to the m.sup.th code data is fed into the extracting circuit 41C from the ROM 41B. Therefore, if the m.sup.th code data is the double code data such as the code data CD1 or CD2, the m.sup.th code data can be correctly demodulated by using the 8/16 demodulation on the basis of the (m+1).sup.th code data. In addition, if the state of the (m+1).sup.th code data is the "state 1" or the "state 4", the recognition of the state of the (m+1).sup.th code data is not done because there is not the double code data in the "state 1" or the "state 4". Therefore, if the state of the (m+1).sup.th code data is the "state 1" or the "state 4", the same record data are respectively outputted from the ROM 41A and the ROM 41B, so that the selection switch 41C keeps the present state, and the record data corresponding to the m.sup.th code data is fed into the extracting circuit 41C from the ROM 41A or the ROM 41B.

Actually, the data outputted from the ROM 41A or the ROM 41B includes the data with respect to the sync part 23 and the PA part 25 other than the record data. The extracting circuit 41C removes the data with respect to the sync part and the PA part, and extracts only the record data.

Here, in case that the last code data placed at the end-part of the data-sector 22 (immediately before the PA part 25) is demodulated, the demodulation section 40 detects the 1st bit and the 13th bit at the MSB side of the PA part 25, and recognizes whether the PA part 25 is, for example, "0001000100000000b" or "1001000100000000b", i.e., the demodulation section 40 recognizes whether the PA part 25 belongs to the "state 2" or the "state 3". Then, if the PA part 25 belongs to the "state 2", the selection switch SW is switched such that the ROM 41A and the extracting circuit 41C are connected to each other, and the record data corresponding to the last code data is fed into the extracting circuit 41C from the ROM 41A. On the other hand, if the PA part 25 belongs to the "state 3", the selection switch SW is switched such that the ROM 41B and the extracting circuit 41C are connected to each other, and the record data corresponding to the last code data is fed into the extracting circuit 41C from the ROM 41B.

Further, the extracting circuit 41C outputs the record data by the unit of one data-sector as a decode signal S.sub.DCD ', and the decode signal S.sub.DCD ' is inputted into the mixing circuit 42, and in the mixing circuit 42, a decode signal S.sub.DCD is generated by grouping the 16 data-sectors included in the decode signal S.sub.DCD ' Then, the decode signal S.sub.DCD is inputted into the error correcting circuit 43, and in the error correcting circuit 43, a reproduction signal SOUT, whose form is the same as that of the record information before the 8/16 modulation is done, is generated and outputted.

As mentioned above, according to the information reproducing apparatus 200, the last code data placed at the end-part of the data-sector can be demodulated by using the PA recorded on the DVD-RAM 1. Therefore, the last code data can be correctly demodulated by using the 8/16 demodulation, and the code data can be correctly reproduced.

In addition, when the m.sup.th code data is demodulated to the record data by using the 8/16 demodulation, it is recognized whether the (m+1).sup.th sync-pattern is the "state 2" or the "state 3". Therefore, the m.sup.th code data can be correctly demodulated to the record data. Further, when m.sup.th code data is demodulated to the record data by using the 8/16 demodulation, it is recognized whether both of the (m+1).sup.th sync-pattern and the (m+1).sup.th code data are the "state 2" or the "state 3". Therefore, the m.sup.th code data can be also correctly demodulated to the record data. In these case, the demodulation tables, in which the sync-patterns shown in FIG. 5 are described, are prepared.

(B) The Second Embodiment of Information Reproducing Apparatus

In FIGS. 9 to 12, the construction of an information reproducing apparatus 300 of the second embodiment is shown. The information reproducing apparatus 300 is capable of reproducing not only the DVD-ROM but also the DVD-RAM 1. Namely, the information reproducing apparatus 300 can reproduce the DVD-RAM 1 by using a demodulation section for the DVD-ROM. In FIGS. 9 and 10, same constructional elements as those in FIGS. 7 and 8 carry the same reference numbers and the explanations thereof are omitted.

As shown in the FIG. 9, the information reproducing apparatus 300 is constructed of the spindle motor 30, the optical pickup 31, the ID extracting circuit 32, the read out circuit 33, a gate circuit 60, a connection circuit 61 as one example of a generating device and a demodulation section 50.

Further, the demodulation section 50 is constructed of an 8/16 decoder 51 as one example of a demodulation device and an error correcting circuit 43.

Furthermore, as shown in FIG. 10, the 8/16 decoder 51 is constructed of a ROM 41A, a ROM 41B, a selection switch SW and an extracting circuit 51A.

Next, the operation of the information reproducing apparatus 300 is explained in detail.

Each of the operation of spindle motor 30, the optical pickup 31, the ID extracting circuit 32 and the read out circuit 33 is the same as that of the aforementioned information reproducing apparatus 200, and the detailed explanations with respect to these devices are omitted.

The read out circuit 33 outputs a read out signal S.sub.DR, and the read out signal S.sub.DR is inputted into the gate circuit 60, and then, the gate circuit 60 carries out the separating operation with respect to the last code data placed at the end-part of the data-sector 22 included in the read out signal S.sub.DR, and the gate circuit 60 generates and outputs a separation signal S.sub.DG. Further, the connection circuit 61 carries out the connecting operation to carry out the 8/16 demodulation in the same manner as the reproduction for the DVD-ROM.

Here, referring to FIGS. 11 and 12, two methods of the separating operation in the gate circuit 60 and the connecting operation in the connecting circuit 61 are explained in detail.

At first, one of the methods of the separating operation and the connecting operation is explained.

As shown in FIG. 11, in the gate circuit 60, the read out signal S.sub.DR is separated at the place between the top bit (first bit) of the PA part 25 placed at the end-part of the data-sector 22 and the second bit thereof. Further, in the gate circuit 60, the read out signal S.sub.DR is also separated at the place between the first bit of the sync 23 placed at the top of the next data-sector and the second bit thereof. Then, the first portion including the top bit of the PA part 25 and the data before this and the second portion including the second bit of the sync 23 of the next data-sector and the following data are respectively outputted from the gate circuit 60 as the separation signal S.sub.DG.

In the connection circuit 61, the first portion and the second portion are connected to each other such that the top bit of the PA part 25 included in the first portion is adjacent to the second bit of the sync 23 included in the second portion, and connected data (connection data) is outputted from the connection circuit 61 as the connection signal S.sub.DC '.

In this manner, the top bit of the PA part 25 of the data-sector and the second bit and the following bits of the sync 23 of the next data-sector are connected to each other, and thus, the connected data (connection data) to function as the PA corresponding to the last code data placed at the end-part of the data-sector and as the sync "0" of the next data-sector is generated. In addition, sync "0" included in the data-sector always has the sync-pattern corresponding to the "state 1" or the "state 2", as mentioned above. However, in case that the top bit of the PA part 25 whose bit condition is "1" and sync 23 (sync "0") of the next data-sector are connected to each other as mentioned above, the sync-pattern of the sync "0" is changed from the "state 1" or the "state 2" to the "state 3" or the "state 4". But, if the sync-pattern of the sync "0" is changed like this, the function of the synchronization remains.

Next, the other of the methods of the separating operation and the connecting operation are explained.

As shown in FIG. 12, in the gate circuit 60, the read out signal S.sub.DR is separated at the place between the end of the PA part 25 (the end of the data-sector) and the top of the next data-sector. Further, in the gate circuit 60, the read out signal S.sub.DR is separated at the place between the first half 23A of the sync 23 place at the top of the next data-sector (the bits of the 1st to 16th of the sync 23) and the second half 23B of the sync 23 of the same (the bits of the 17th to 32nd of the sync 23 included in the next data-sector). Then, the first portion including the PA part 25 and the second portion including the second half 23B of the sync 23 are respectively outputted from the gate circuit 60 as the separation signal S.sub.DG.

In the connection circuit 61, the first portion and the second portion are connected to each other, and the connected data (connection data) is outputted as the connection signal S.sub.DC '.

In this manner, the PA part 25 of the data-sector and the second half 23B of the sync 23 of the next data-sector are connected to each other, and thus, the connected data (connection data) to function as the PA corresponding to the last code data placed at the end-part of the data-sector and the sync "0" of the next data-sector is generated.

As mentioned above, in the gate circuit 60 and the connection circuit 61, a couple of the data-sectors adjacent to each other are connected, and the connection signal S.sub.DC ' is generated, and then, the connection signal S.sub.DC ' is inputted into the 8/16 decoder 51 included in the demodulation section 50. Here, the connection signal S.sub.DC ' has the form similar to that of the signal used for the reproduction of the DVD-ROM.

The 8/16 decoder 51 carries out the aforementioned 8/16 demodulation with respect to the code data included in the connection signal S.sub.DC ', and restores to the record data corresponding to the code data.

Here, the code data which is not the last code data is modulated in the same manner as the aforementioned first embodiment. Namely, in case that m.sup.th code data is modulated, one suitable demodulation table is selected on the basis of the state of the (m+1).sup.th code data, and the m.sup.th code data is modulated by using the selected demodulation table.

However, in case that the last code data, which is placed at the end-part of the data-sector, is modulated, one suitable demodulation table is selected on the basis of the state of the connection data included in the next data-sector, and the last code data is modulated by using the selected demodulation table.

More specifically, each of the two demodulation table is memorized in each of the ROM 41A and the ROM 41B in the same construction as the aforementioned information reproducing apparatus 200. Then, the connection signal S.sub.DC ' is respectively inputted into both of the ROM 41A and the ROM 41B, and the last code data of the data-sector included in the connection signal S.sub.DC ' is independently demodulated in each of the ROM 41A and the ROM 41B. At this time, it is recognized whether the state of the connection data included in the next data-sector (in the connection signal S.sub.DC ') is the "state 2" or the "state 3. Concretely, the bit condition of the 1st bit and the 13th bit at the MSB side of the 16 bit data place at the beginning-part of the next data-sector are checked. If both of the 1st bit and the 13th bit are "0", the state of the connection data is the "state 2". Therefore, the selection switch SW is switched such that the ROM 41A and the extracting circuit 51A are connected to each other, and the record data corresponding to the m.sup.th code data is outputted from ROM 41A to the extracting circuit 51A.

On the other hand, if the 1st bit of the connection data is "1" and the 13th bit of the connection data "0", the state of the connection data is the "state 3". Therefore, the selection switch SW is switched such that the ROM 41B and the extracting circuit 51A are connected to each other, and the record data corresponding to the m.sup.th code data is outputted from ROM 41B to the extracting circuit 51A.

Actually, the data outputted from the the ROM 41A or the ROM 41B include the data with respect to the sync-pattern etc other than the record data. Therefore, the extracting circuit 51A removes the data with respect to the sync-pattern, and extracts only the record data, and thus, the decode signal S.sub.DCD including the record data constructed 8 bits is obtained.

Then, the decode signal S.sub.DCD is inputted into the error correcting circuit 43, and in the error correcting circuit 43, the reproduction signal SOUT, whose form is the same as that of the record information before the 8/16 modulation is done, is generated and outputted.

As mentioned above, according to the information reproducing apparatus 300 of the embodiment, the last code data placed at the end-part of the data-sector can be demodulated and reproduced by using the PA recorded on the DVD-RAM 1. Further, the PA and the sync 23 (sync "0") placed at the top of the data-sector are connected to each other, and thus, the connection signal S.sub.DC ' having the form similar to that of the signal used for the reproduction of the DVD-ROM is generated. Therefore, the information recorded on the DVD-RAM 1 can be reproduced by a demodulation device used for the reproduction of the DVD-ROM.

Further, in case that the PA part 25 of the data-sector and the second half of the sync 23 of the next data-sector are connected to each other, the 16 bit counter is necessary for separating the second half of the sync 23 from the first half thereof. However, in case that the top bit of the PA part 25 of the data-sector and the second bit of the sync 23 of the next data-sector are connected to each other, the aforementioned 16 bit counter is unnecessary.

On the other hand, in case that the top bit of the PA part 25 of the data-sector and the second bit of the sync 23 of the next data-sector are connected to each other, the divider is necessary for extracting the top bit of the PA part 25 and the second bit of the sync 23. However, in case that the PA part 25 of the data-sector and the second half of the sync 23 of the next data-sector are connected to each other, all data is treated by the unit of the 16 bits, and thus, the aforementioned divider is unnecessary and the construction of the devices and circuits with respect to the gate circuit 61 and the connection circuit 61 etc. can be simplified.

In addition, the methods with respect to the separating operation and the connecting operation are not restricted to the aforementioned cases. In the connecting operation, the k.sup.th (K.ltoreq.16) bit, for example, the 3rd bit of the PA may be connected to the (k+1).sup.th bit, for example, the 4th bit of the first half of the sync 23.

According to the aforementioned embodiments, in case that a plurality of information unrelated to each other are recorded on the DVD-RAM 1, the last code data, which is placed at the end-part of the last data-sector 22 placed at the end-portion included in these information can be demodulated by using the 8/16 demodulation. Therefore, all code data recorded on the DVD-RAN 1 can be correctly demodulated by using the 8/16 demodulation, and all information recorded on the DVD-RAM 1 can be correctly reproduced.

The invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.