Chemical Vapor Deposition of Tungsten(W-Cvd) Process for Growing Low Stress and Void Free Interconnect

The present invention relates to chemical vapor deposition of tungsten(W-CVD) process and, more particularly, to a chemical vapor deposition of tungsten(W-CVD) process for growing low stress and void free interconnect.

In semiconductor industry, interconnection process is performed by using a chemical vapor deposition of tungsten. Conventionally, the chemical vapor deposition of tungsten is performed in the single process chamber, because growing the tungsten film must fix the temperature of the process and can not have any temperature drift condition happened in order to keep the consistent quality of the film and the same thickness of the film. The traditional chemical vapor deposition of tungsten process for interconnection has two steps: the first step of chemical vapor deposition of tungsten is to fill a contact hole and a via hole. The second step of chemical vapor deposition of tungsten is to form an interconnect layer to fabricate interconnect lines. The first step of chemical vapor deposition of tungsten is required to form a void free and good step coverage tungsten film in order to fill in a contact hole and a via hole, but this tungsten film has high stress. The second step of chemical vapor deposition of tungsten is required to form a low stress tungsten film in order to fabricate interconnect lines.

FIG. 1 is a cross section view of a semiconductor wafer illustrating a conventional method for fabricating interconnect. A conductive area 12 is formed in a substrate 10. In this embodiment, forming the conductive area 12 is performed by any suitable process. The conductive area 12 can be a metal layer, a polysilicon layer or a source/drain/gate. A dielectric layer 14 is then deposited on the substrate 10 and the conductive area 12. Patterning the dielectric layer 24 and etching the dielectric layer 14 are to form a contact hole or a via hole exposing the conductive area. In this embodiment, patterning the dielectric layer 14 and etching the dielectric layer 14 are performed by any suitable suitable process. The dielectric layer 14 can be a BPSG layer, a TEOS layer, or an oxide layer. The thickness of the dielectric layer 14 is about 10000-50000 angstroms. A first tungsten film 16 is then formed on the dielectric layer 14 and filling in the contact hole. The first tungsten film 16 is performed by using the first step of chemical vapor deposition of tungsten. After that, a second tungsten film 18 is formed on the first tungsten film 16. The second tungsten film 18 is performed by using the second step of chemical vapor deposition of tungsten.

Unfortunately, a tungsten etching process is absent in this conventional process, so the second tungsten film 18 has high stress. The second tungsten film 18 with high stress causes the wafer bending. The bending wafer will effect the exposure of the subsequent photolithography process. If the bending phenomenon of the wafer is severe, then it may result in the stepper machine out of order. If the bending phenomenon of the wafer is light, then it also causes the defocus problem. Thus, the stress problem in conventional process has become the most big challenge.

In accordance with the present invention, a chemical vapor deposition of tungsten(W-CVD) process for growing low stress and voids free interconnect is disclose. In one embodiment, the method comprises forming a dielectric layer on a substrate with a conductive area. The dielectric layer covers the conductive area. The dielectric layer is then patterned and etched to form a hole exposing the conductive area.

A first conductive layer is then formed over the dielectric layer and completely fills in the hole. The formation of the first conductive layer is performed in a first chamber. The first conductive layer is for fabricating contact. A second conductive layer is then formed on the first conductive layer. The formation of the second conductive layer is performed in a second chamber. The temperature of the second chamber is different from the temperature of the first chamber. The second conductive layer is for fabricating interconnect lines. Consequently, unlike conventional process, the second conductive layer has low stress and low resistivity and the first conductive layer has no void and good step coverage.

The forgoing aspects and many of the attendant advantages of this invention will become more readily appreciated as the same becomes better understood by reference to the following detailed description, when taken in conjunction with the accompanying drawings, wherein:

FIG. 1 is a cross section view of a semiconductor wafer illustrating a conventional method for fabricating interconnect;

FIG. 2 is a cross section view of a semiconductor wafer illustrating the step of forming a hole according to one embodiment of the present invention;

FIG. 3 is a cross section view of a machine for chemical vapor deposition according to one embodiment the present invention;

FIG. 4 is a cross section view of a semiconductor wafer illustrating the step of forming a first conductive layer according to one embodiment of the present invention;

FIG. 5 is a cross section view of a semiconductor wafer illustrating the step of forming a second conductive layer according to one embodiment of the present invention.

FIG. 2 shows a cross section view of a semiconductor wafer with a contact hole. A conductive area 22 is formed in a substrate 20. In this embodiment, forming the conductive area 22 is performed by any suitable process. The conductive area 22 can be a metal layer, a polysilicon layer or a source/drain/gate. A dielectric layer 24 is then deposited on the substrate 20 and the conductive area 22. Patterning the dielectric layer 24 and etching the dielectric layer 24 are to form a contact hole or a via hole exposing the conductive area. In this embodiment, patterning the dielectric layer 24 and etching the dielectric layer 24 are performed by any suitable suitable process. The dielectric layer 24 can be a BPSG layer, a TEOS layer, or an oxide layer. The thickness of the dielectric layer 24 is about 10000-50000 angstroms.

After that, the wafer is send into a first chamber 26 by a robot 25 (shown in the FIG. 3) to form a first conductive layer 30 on the dielectric layer 24 and on the conductive area 22. FIG. 4 is a cross section view of a semiconductor wafer illustrating the step of forming a first conductive layer according to one embodiment of the present invention. The first conductive layer 30 is to fill the contact hole or the via hole. In this embodiment, the formation of the first conductive layer 30 is performed a first chemical vapor deposition of tungsten. The temperature of the process is controlled in a particular fixed temperature. The particular fixed temperature is in the range of 400.degree. C. to 450.degree. C. The chemical vapor deposition of tungsten is done by using a WF.sub.6 vapor with a gas flow of about 50-90 sccm. Generally, the time of the process is controlled about 10-100 second. The thickness of the first conductive layer 30 has 500-9000 angstroms thick. Because the condition of the second chemical vapor deposition of tungsten is in lower temperature of the process and higher gas flow of WF.sub.6 vapor of the process, the first conductive layer 30 formed in this process has the properties of high stress, good step coverage, and void-free. The resulting structure is shown in the FIG. 4.

Thereafter, the wafer is send into a first chamber 28 by a robot 25 (shown in the FIG. 3) to form a second conductive layer 32 on the first conductive layer 30. FIG. 5 is a cross section view of a semiconductor wafer illustrating the step of forming a first conductive layer according to one embodiment of the present invention. The second conductive layer 32 is to fabricate interconnect lines. In this embodiment, the formation of the second conductive layer 32 is performed a second chemical vapor deposition of tungsten. The temperature of the process is controlled in a particular fixed temperature. The particular fixed temperature is in the range of 450.degree. C. to 490.degree. C. The chemical vapor deposition of tungsten is done by using a WF.sub.6 vapor with a gas flow of about 15-60 sccm. Generally, the time of the process is controlled about 10-100 second. The thickness of the second conductive layer 32 has 300-8000 angstroms thick. The second conductive layer 32 formed in this process has the property of low stress, because the condition of the second chemical vapor deposition of tungsten is in higher temperature of the process and lower gas flow of WF.sub.6 vapor of the process. The resulting structure is shown in the FIG. 5.

Because of using two different chambers, the method of this invention can adjust the temperature of the process and the gas flow of the WF.sub.6 vapor of the process. The second chemical vapor deposition of tungsten by adjusting the temperature and the gas flow has reduced greatly the stress of the second conductive layer 32. Moreover, the first chemical vapor deposition of tungsten by adjusting the temperature and the gas flow prevents voids in the contact hole or in the via hole. Thus, growing low stress and void free interconnect is accomplished by the method of this invention.

Although specific embodiment has been illustrated and described, it will be obvious to those skilled in the art that various modifications may be made without departing from the which is intended to be limited solely by the appended claims.