Process for Manufacturing a Sensor With a Metal Electrode in a Metal Oxide Semiconductor (MOS) Structure

This invention relates to a process for manufacturing a sensor with a metal electrode in an MOS structure.

Processes for manufacturing metal oxide semiconductor (MOS) devices, such as field effect transistors (MOSFETS) are well known. However, manufacturing problems arise when attempting to form sensors having metal electrodes using a MOS structure. The manufacture of such sensors has failed in practice because conventional processes for forming a metal electrode cannot be combined with the conventional MOS process. With the conventional MOS process, additional process steps are necessary to deposit the metal electrode, particularly photolithographic, etching, and resist-stripping steps. If the metal electrodes are formed from the materials commonly used for them, namely noble metals, such as gold or platinum, the MOS structure is contaminated by the metal when the above process steps are carried out. This adversely affects the properties of silicon oxide, and particularly the properties of the gate oxide and the underlying channel in the case of MOS transistors. Furthermore, the apparatus used in the semiconductor factory to carry out the process steps will also be contaminated, which is not permissible in MOS fabrication. If a metal electrode of a base metal, such as aluminum or titanium, is deposited, these metals will change their properties during deposition and on contact with other materials. As a result, the properties of the sensor will change as well. If platinum is used for the metal electrode, a bonding agent is required, for which titanium is often employed. In that case, the above-described unfavorable properties will combine. In addition, the process, because of the additional steps required to deposit the metal electrode, become increasingly complex and expensive.

Accordingly, a more economical method for providing a sensor with a metal electrode in an MOS structure which delivers reliable sensor signals is greatly desired.

A process for manufacturing a sensor with a metal electrode in an MOS structure wherein the MOS structure is fabricated with a conventional MOS process up to the formation of a passivating layer, a sensing region with a structure for the metal electrode being formed during the MOS process, the structure for the metal electrode being made of a material having predetermined adhesion properties for metals, the sensing region being uncovered by etching the passivating layer and any layers located between the sensing region and the passivating layer, and a metallization of the surface of the MOS structure being carried out in which the metal layer adheres only to the structure for the metal electrode.

In a first embodiment of the invention, the metallizing is done by plating, particularly by electroless plating. In that case, the material of the structure for the metal electrode and the metal to be deposited must be suitably chosen.

In a second embodiment, the metal is deposited by evaporation over the entire surface of the MOS structure provided with the patterned passivating layer. The metal layer thus produced must then be selectively removed. This is done by subjecting the MOS structure to an ultrasonic treatment

The invention will now be explained in more detail with reference to the accompanying drawings.

FIGS. 1 to 3 show cross sections of an embodiment of an MOS structure fabricated with the process according to the invention, after different process steps;

FIGS. 4 and 5 show a second embodiment of a sensor fabricated with the process according to the invention, after different process steps.

FIG. 1 shows a semiconductor substrate 1 on which a field oxide layer 2 was deposited. Semiconductor substrate 1 may be of silicon or polysilicon, for example, and field oxide layer 2 may be of silicon dioxide. Field oxide layer 2 has an opening 3 in the place where an MOS transistor is to be provided. FIG. 1 shows the source region 20, drain region 22 and a gate region comprising the gate electrode 8 and gate oxide layer 4. In opening 3, a gate oxide layer 4 was deposited which is substantially thinner than field oxide layer 2. A polysilicon layer 5 deposited on field oxide layer 2 and gate oxide layer 4 is patterned in such a way as to form a gate electrode 8 on gate oxide layer 4, and a bonding region interconnection 6 and a sensing region 7 on portions of field oxide layer 2. Sensing region 7 has structure for the metal electrode to be formed thereon. In the embodiment shown, the sensing region serves to support a flat metal electrode. It is advantageous that the sensing region is made of silicon or polysilicon, with the area outside the structure for the metal electrode being covered with a material which adheres to metal less well than polysilicon. If one starts with a silicon wafer, silicon layers suitable for forming a sensing region are already present as a result of the process for fabricating an MOS structure containing at least one MOS transistor. The polysilicon of sensing region 7 may also have a spatially different structure, such as a comb structure for forming an interdigitated capacitor. To accomplish this, the polysilicon of sensing region 7 may be patterned in such a way as to uncover field oxide layer 2 in the places not to be covered with the metal electrode. Note that the sensing region may be formed either on the substrate itself or on a silicon layer produced during the MOS process. For example, it may be formed simultaneously with the deposition of polysilicon on the gate regions of the MOS transistors for forming gate electrodes. Furthermore, it is advantageous to cover the area outside the structure for the gate electrode 8 with an oxide, such as silicon oxide, since the process steps necessary for this are typically carried out during the fabrication of an MOS structure in a silicon semiconductor.

The process steps involved in producing the structure described so far correspond to conventional MOS process steps. The details necessary to carry out these steps are familiar to those skilled in the art. It must be ensured that sensing region 7 is defined during the fabrication of the structure, particularly of the MOS transistor. In the embodiment shown, sensing region 7 is formed simultaneously with silicon gate electrode 8 and interconnection 6.

As shown in FIG. 2, an insulating layer 9 is subsequently deposited in which openings are formed above the desired contact areas, particularly above MOS transistor 10 and interconnection 6. In the preferred embodiment, the insulating layer 9 is a layer of silicon dioxide, which is disposed over the field oxide layer 2 and each of the sensing region 7, gate electrode 8 and bonding region interconnection 6. A conductor layer 11 is deposited on insulating layer 9 such that the openings in insulating layer 9 are filled with the material of conductive layer 11 to form the electric contacts with the gate oxide layer 4 of the MOS transistor 10, thereby permitting electrical communication between the bonding region interconnection and the MOS transistor 10. The entire MOS structure is then covered with a protective layer 12 to form a planar passivating layer. Conductor layer 11 is, as a rule, an aluminum layer.

Openings are then etched into passivating layer 12 and insulating layer 9 to uncover portions of sensing region 7 in the area where a metal electrode 13 is to be deposited. At the same time, regions of interconnection 6 are uncovered for the formation of bonding pads. Then, the surface of the MOS structure is metallized such that the metal layer adheres only to the structure of the sensing region for the metal electrode and to the uncovered regions of the interconnection 6 for the bonding pads. In this manner, metal electrode 13 and bonding pad 14 are formed, as shown in FIG. 3.

The formation of metal electrode 13 and bonding pads 14 is made possible by the fact that the structure of sensing region 7 for metal electrode 13 and the regions for bonding pads 14 are formed of a material which adheres well to the metal, whereas passivating layer 12 and insulating layer 9 are formed of a material to which the material of the structure for metal electrode 13 and for bonding pads 14 adheres less well. Suitable materials are polysilicon for bonding region interconnection 6 and sensing region 7, palladium for metal electrode 13 and bonding pads 14, silicon dioxide for insulating layer 9, and silicon nitride and/or silicon oxide for passivating layer 12.

In one embodiment of the invention, the selective metallizing is done by plating, particularly by electroless plating. In that case, the metal to be deposited must be a more noble material than that of the base (i.e. sensing region 7 and bonding region interconnection 6), as is the case with the above-described choice of materials.

In an alternative embodiment of the invention, the metallizing is done by vapor deposition of a metal and subsequent selective, material-dependent removal of the metal layer using ultrasonic energy. If the material of the structure for the metal electrode and bonding pad, the material surrounding this structure, and the metal are suitably chosen, the deposited metal outside the structure can be reliably and easily removed by the ultrasonic treatment. No process steps which adversely affect the MOS structure or no costly process steps associated with a masking operation are necessary. Advantageously, a noble metal, particularly palladium, is used for the metallization. Selective adherence of the palladium to the sensor structure is ensured. It is also advantageous to treat the metal layer with a hydrogen-containing gas prior to its removal. The selective removal of the metal layer will then be more reliable and faster.

In the second embodiment described above, the metal is deposited by evaporation over the entire surface of the MOS structure provided with the patterned passivating layer 12. The metal layer thus produced must then be selectively removed. This is done by subjecting the MOS structure to an ultrasonic treatment during which the metal layer separates from passivating layer 12 and insulating layer 9. Prior to the ultrasonic treatment, the MOS structure may be treated with a hydrogen-containing gas. Since the metal layer, if made of palladium, takes up hydrogen, this results in easier separation of the metal layer from passivating layer 12. The adhesion properties of polysilicon and palladium are such that the palladium layer will not separate from the polysilicon even during an ultrasonic treatment. In the embodiment shown in FIG. 3, the structure of the sensing region includes an inner area to which a flat metal electrode will adhere. It is also possible to form other structures, particularly interdigitated capacitor structures, with this process.

As previously described, simplification of the process is achieved if during the etching of the passivating layer and any other layers for uncovering the sensing regions, regions for bonding pads are uncovered. No additional masking and etching steps are needed for this. The regions for the bonding pads may be of silicon and be formed in the same masking step as the sensing regions. In this manner, no aluminum, which is commonly used for forming conductive paths and for making contact, is brought out of the interior of the semiconductor. If the sensor is used as a biosensor or a chemical sensor, the entire MOS structure may be covered with a liquid to be examined, since the liquid cannot come into contact with the aluminum; aluminum and aluminum alloys dissolve in liquids and are poisonous to living organisms, such as cells. This embodiment involves no changes in the MOS fabrication process and in the properties of the MOS structure in principle.

In another embodiment of the invention, shown in FIGS. 4 and 5, the electric interconnections of the MOS structure are formed of silicon. A thinner MOS structure can thus be fabricated, since the passivating layer can be made substantially thinner than in the case where the interconnections are of aluminum and a thicker passivating layer is needed. The structure also becomes thinner because the aluminum layer and additional insulating layers required for the latter are avoided. The avoidance of the use of aluminum makes it possible to carry out process steps at higher temperatures.

Referring now to FIGS. 4 and 5, there is illustrated the fabrication of another embodiment of an MOS structure with the process according to the invention. Unless otherwise described in the following, this structure is fabricated with the process described in connection with FIGS. 1 to 3, wherein like parts are indicated by like reference numerals. FIG. 4 shows the structure after field oxide layer 2 with opening 3 was deposited on semiconductor substrate 1. To form an MOS transistor in opening 3, a gate oxide layer 4 is deposited there, which, in this embodiment, is patterned in such a way that contact openings are provided between field oxide layer 2 and gate oxide layer 4 which expose the surface of the semiconductor substrate. In this manner, direct contact is made possible between MOS transistor 10 formed on substrate 1 and polysilicon layer 5 deposited on field oxide layer 2. In the embodiment shown, polysilicon layer 5 is patterned to form sensing region 7, gate electrode 8, and interconnections 6, 6'. Interconnections 6, 6' can be used both to make contact to MOS transistor 10 and to form bonding pad 14 (FIG. 5).

As shown in FIGS. 4 and 5, a layer of material, preferably polysilicon, is deposited onto a first portion of the field oxide layer 2 to form sensing region 7; depositing onto a second portion of the field oxide layer and extending to contact a first portion of the gate oxide layer 4 and substrate forms bonding region interconnection 6; depositing onto a second portion of the gate oxide layer 4 forms gate electrode 8; and depositing onto a third portion of the field oxide layer 2 and extending to contact a third portion of the gate oxide layer 4 and substrate forms interconnect region 6'. Cavities are thus formed between gate electrode 8 and bonding region interconnections 6 and 6', as well as between interconnection 6' and sensing region 7. Protective layer 12 is then formed over all of these regions to form a planar passivating layer of silicon nitride or silicon dioxide over the entire structure. The passivation layer 12 is then etched to uncover portions of the sensing region 7 for forming a metal electrode thereon, and bonding region interconnection 6 for forming bonding pads 14.

FIG. 5 shows this structure after passivating layer 12 with openings for the structure of sensing region 7 for metal electrode 13 and for bonding pad 14 were formed and after a metal layer was selectively deposited in the openings onto the uncovered silicon areas, i.e., onto the structure of sensing region 7 and onto the areas for bonding region interconnection 6, with one of the processes described above. Since this embodiment uses silicon interconnections, the deposition of additional aluminum interconnections (11 in FIG. 2) and intermediate insulating layers (9 in FIG. 2), shown in FIGS. 2-3, is avoided, so that the process becomes simpler and a thinner MOS structure can be achieved. Moreover, since the use of aluminum is avoided, the structure is resistant to treatments at high temperatures, so that high-temperature processes can be carried out during its fabrication. Compared to a conventional MOS structure with aluminum interconnections, the other electrical properties due to the higher electrical resistance of the interconnections must be taken into account.

From the foregoing discussion, one can ascertain that in the process according to the invention, the MOS structure fabricated with the conventional process steps up to the formation of the passivating layer, serves to protect the MOS structure. During this standard MOS process, a sensing region with a structure for the metal electrode is formed. For the sensing region and the structure for the metal electrode, materials can be chosen which are necessary for the MOS structure. No additional masks are needed for the formation of the sensing region and the structure for the metal eletrode. The sensing region and the structure for the metal electrode can be formed during the generation of masks which are used in the MOS process. After the fabrication of the MOS structure with the passivating layer, the latter is etched to uncover the sensing region. If any other layers are provided between the passivating layer and the sensing region, they will be etched correspondingly. This etching step can be carried out together with other etching steps and requires no additional mask, either. To form the metal electrode, the structure for it is metallized. This requires no additional mask, either, since a metallizing process is used in which the entire surface of the MOS structure is treated while the metal adheres only to the structure for the metal electrode. The material of the structure for the metal electrode and the metal are chosen to have suitable adhesion capabilities. Thus, the process according to the invention is very simple, since it eliminates the need for additional process steps in the formation of the metal electrode. In particular, however, only this makes it possible to combine the formation of a metal electrode with an MOS process. Since the formation of the metal electrode requires no photolithographic, etching, or resist-stripping steps, the metal electrode can be made of noble metals, without the MOS structure or the apparatus for carrying out the MOS process being contaminated.