Method and Apparatus for the Synchronization of a Signal Receiving Station

Priority Application : France No. 9600414, filed Jan. 16, 1996

This invention relates generally to signal packet communication networks and more especially to multi-user communication systems, e.g. TDMA/FDMA satellite communication systems, where each user is assigned a time slot and a frequency slot at which he is allowed to transmit.

In a multi-user TDMA/FDMA satellite communication system, for instance, where several users access the satellite channel and send through signal packets according to some slotted access scheme, a hub ground station at the receiving end receives the stream of signal packets from many users and it recovers the original user information messages by demodulating and detecting the packets. In order to perform demodulation and detection, the hub station needs to estimate the signal timing and the frequency offset for each received signal packet.

The conventional techniques for timing and frequency estimation are based on tracking loops performing a closed-loop estimation. However, when the number of users is larger than the number of frequency slots and when the traffic is bursty, i.e. when the time between two consecutive packets from the same user is long with respect to the duration of a packet, it is difficult, if not impossible, for the hub station to track the timing and frequency offsets for each user, from packet to packet. Then, the hub station must be able to estimate the timing and frequency offsets independently for each received packet by some open-loop processing. In order to accomplish this task, the hub station receiver must be equipped with a synchronization sub-system which implements a fast, real-time and reliable open-loop timing and frequency estimation process.

A first approach consists in performing the timing and frequency estimations separately for each signal packet. First, the signal is oversampled (the number of symbols Ns is greater than the number M of samples per symbol) over a window of L symbols. Thereafter, the whole packet is decimated by a factor M/Ns and the frequency offset is estimated on the resulting decimated signal.

This method has the following drawbacks:

(a) in order to achieve a timing estimation error variance sufficiently small, the oversampling factor Ns/M must be at least 4,

(b) the computational load for the timing estimation is of the order of N.sup.2.sub.s log Ns,

(c) the processing can be applied with a reasonable complexity only for binary or quaternary FSK modulation (M.ltoreq.4),

(d) the frequency estimation process has a threshold value of signal-to-noise ratio for which the estimation error variance approaches its ideal value, at roughly 10 dB of Eb/No in the absence of timing errors.

The invention aims at overcoming the drawbacks mentioned above.

An object of the present invention is to provide a novel synchronization method for non-coherent orthogonal FSK modulated signals, which is capable of open-loop operation with a low signal-to-noise ratio operating point.

Another object of this invention is to provide a novel method for open-loop time recovery and frequency offset estimation of non-coherent M-FSK modulated signals, which is suitable for all-digital, VLSI or DSP implementation.

Yet another object of this invention is to provide an open-loop timing and frquency offset estimation method for non-coherent M-FSK modulated signals, which can be implemented with a low computational complexity that grows linearly with the number of samples per symbol.

Still another object of the invention is to provide a novel architecture suitable for VLSI implementation of a synchronization sub-system for a non-coherent M-FSK demodulator.

In accordance with this invention, instead of performing the timing and frequency estimation on the over-sampled signal, the signal samples are first decimated by decimating each sample with a different epoch thereby to produce several versions of the sampled signal. Then, these different versions of the sampled signal are processed in parallel.

The timing information is recovered by selecting the signal which has the largest spectral peak while the frequency offset information is recovered by estimating the position of the peak on the frequency axis. Thereafter, once both the timing and frequency offsets have been determined, the sampled signal which has been previously stored in a RAM buffer, can be decimated, frequency corrected and detected by a Fourier Transform-based detector (FFT-based detector).

The main advantages of the method according to the invention are summarized herebelow.

The estimation of timing and frequency offset can be performed jointly with a computational load which depends linearly on the number of samples per symbol.

Since the decimated signals are processed in parallel, independently of each other, the estimation method is suitable for a fast parallel and pipelined VLSI hardware implementation. This allows the realization of very high speed modems operating with high-dimensional M-FSK modulation (M>4).

The threshold shown by the frequency estimate in the absence of timing errors is below 4 dB of Eb/No. It follows that the estimation process is well suited also for coded signals which are supposed to work at a low signal-to-noise ratio.

Extensive evaluation of the process of the invention performed with both theoretical analysis based on the Cramer-Rao bound and with computer simulations have shown that the performances in terms of bit-error rate of a system using the invention are almost high even with short observation lengths.

The advantages of the invention make it suitable for TDMA systems based on orthogonal M-FSK modulation with non-coherent detection, with short and bursty transmission, large frequency offsets, low signal-to-noise ratio operating point (typical of coded systems) and high modulation order M.

Typical applications of this invention include for example: indoor wireless communication, mobile communication with large Doppler frequency shift (e.g. in the avionic channel), satellite communication with small and cheap terminals in the Ka band.

Moreover, the process of the invention removes automatically the ambiguity arising in the frequency estimation process when the frequency offset is larger than the frequency deviation 1/2T with a small power efficiency penalty (less than 0.5 dB). This can be particularly indicated for mobile communication with very large Doppler frequency shift.

FIG. 1 is a diagram showing a typical frequency spectrum of a signal produced according to the invention for serving as a base for the estimation process.

FIG. 2 is a block diagram of an embodiment of an exemplary structure implementing the estimation process of this invention.

The invention relates to the demodulation of a continuous-phase FSK modulated signal currently generated by an orthogonal M-FSK modulator (known per se). Such a signal has frequencies that are spaced by 1/T, where T denotes the symbol period. The complex envelope of the modulated signal is given by

where t denotes the time, .epsilon. denotes a timing offset (between 0 and 1) and .DELTA.f denotes a frequency offset.

The complex envelope of the received signal in case of additive white Gaussian noise, is given by:

where z(t) denotes a complex white Gaussian process with power spectral density No on the demodulator bandwidth.

In any digital demodulator, the received signal is first sampled at a rate Ns/T and then processed in order to recover the information data. If both the timing and the frequency recovery are perfect (i.e. .epsilon.=.DELTA.f=0), it is sufficient to sample the signal with Ns=M. On the contrary, when the symbol timing and the frequency offsets are not zero, the demodulator needs to proceed to estimating both .epsilon. and .DELTA.f from the received signal.

In the demodulator according to the invention it is the synchronization sub-system that is assigned the task of proceeding to the .epsilon. and .DELTA.f estimation from a finite length observation of the discrete-time received signal.

Instead of applying a conventional prior art approach to the received signal, according to the invention the received signal is first modified and then an estimation of the parameters .epsilon. and .DELTA.f is applied on the modified signal.

Because of the particular nature of orthogonally FSK modulated signals, the synchronization sub-system of the invention produces an interesting new signal by decimating the observed signal Y.sub.n (.epsilon., .DELTA.f) by a factor Ns>M, i.e. just one sample is taken per symbol at the instants iN.sub.s +n.sub.o, where n.sub.o denotes the sampling epoch (o.ltoreq.n.sub.o .ltoreq.N.sub.s -1). This operation produces a modified signal Y.sub.i (n.sub.o) that is a single tone in additive noise.

If we assume that .DELTA.f does not exceed the frequency deviation of orthogonal FSK, i.e. .vertline..DELTA.f.vertline.<T/2, the observed signal y.sub.n (.epsilon., .DELTA.f) can be filtered before decimation by a low-pass filter with a cut-off frequency M/2 N.sub.s without distorting the modulated signal. In this way, the resulting noise samples are white noise.

If n.sub.o =.epsilon.N.sub.s, the modified signal Y.sub.i (n.sub.o) is a pure complex tone. On the other hand, if n.sub.o .noteq..epsilon. N.sub.s, the pure complex tone contains more than one frequency component because the data sequence is not completely removed. As a result, for sufficiently high signal-to-noise ratio, the spectrum of Y.sub.i (n.sub.o) for n.sub.o .apprxeq..epsilon.N.sub.s exhibits a large peak around the frequency .DELTA.FN.sub.s, while the spectra of Y.sub.i (n.sub.o) for n.sub.o far from .epsilon.N.sub.s, have a flat shape as shown in FIG. 1.

The decimation operation is applied on the sample signal received through a detection window having a length of L symbols located in the middle of the received TDMA burst. The decimation process produces N.sub.s versions of the received (filtered) sampled signal. It is on these N.sub.s versions of the signal that, in accordance with this invention, the timing and frequency offset estimation is applied in parallel.

The estimation process is set forth hereafter with reference to FIG. 2 which illustrates an exemplary synchronization structure suitable for implementing the process of the invention. Each decimated signal Y.sub.i (n.sub.o) is processed in an FFT processor to provide the square magnitude of its discrete-time Fourier transform Y(F,n.sub.o) of length rL, where r is the FFT interpolation factor. A maximum computing cell MAX determines the maximum value of the square magnitude of signal Y(F,n.sub.o).sup.2 and provides two values: ##EQU1##

These two values serve to determine the estimated values of the parameters .epsilon. and .DELTA.f.

Comparator CP chooses n.sub.o as the value n.sub.o corresponding to the largest value M(n.sub.o). The value n.sub.o is given by: ##EQU2##

The MUX cell is arranged to select the value F(n.sub.o) among the values F(n.sub.o) which are available, and computes the frequency offset estimation given by: ##EQU3##

The values n.sub.o and F(n.sub.o) are buffered in a buffer memory (not shown). The value n.sub.o is used to compute the estimate of value .epsilon. by:

On the other hand, the received signal y.sub.n (.epsilon.,.DELTA.f) is applied to a delay line for instance, and then down-sampled at rate M/T to retain only M samples per symbol with the sampling epoch n.sub.o. The downsampled signal is then frequency corrected by multiplication with the complex tone exp(j2.pi.nF(n.sub.o)/M), generated by a numerically controlled oscillator NCO before being coupled to a non-coherent demodulator (known per se) for non-coherent demodulation.

It is to be noted that while the current data block is being downsampled, frequency-corrected and demodulated, the estimation process can be applied on the next received block, so that the operations are pipelined and the demodulator can work at a very high speed.