Gas Discharge Lamp Inverter With a Wide Input Voltage Range

1. Field of the Invention

An electronic ballast converts a low frequency AC current as input to a high frequency current to the gas discharge lamp so that the lamp operates efficiently. Such ballast or converter is required to have low line input current harmonics as well as a high power factor in order to satisfy the stringent requirement regarding operating parameters. Many configurations have been proposed to achieve low input current distortion. Among them, so-called boost converter is a typical power factor correction converter. A boost converter, followed by a DC/AC inverter is able to provide a high frequency current fed to the lamp with power factor correction and low input current harmonics. However, the energy is processed in two separate conversion stages. As a result, the component count increases, which in turn causes the converter to be bulky and causes an increase in cost. In order to reduce costs, many integrated power factor correction stages with DC/AC inverters have been proposed.

2. Description of the Related Art

U.S. Pat. No. 5,274,540, hereby incorporated by reference, discloses a circuit shown in FIG. 1. Capacitor Cin is used to achieve power factor correction. Capacitor Cin integrates a power factor correction converter with a DC/AC inverter, composed of a half-bridge switches S1 and S2, and a series resonant tank of inductor Lr and capacitor Cr so that the component count is reduced, thereby reducing costs. The equivalent circuit of FIG. 1 is shown in FIG. 2, where the lamp voltage is considered as a high frequency voltage source. Charge capacitor Cin is in series with a high frequency voltage to charge capacitor Cin through the line input and to discharge the capacitor energy to bulk capacitor C.sub.B so that power factor correction can be achieved. There are four mode operations over one switching cycle. The switching waveforms are shown in FIG. 3.

Mode 1 ›t.sub.0, t.sub.1 !: Before time t.sub.0, voltage .nu..sub.m is clamped to voltage V.sub.dc, and diode Dy is on. After time t.sub.0, voltage .nu..sub.a decreases with a sinusoidal waveform. Since the charge capacitor voltage .nu..sub.c can not change abruptly, diode Dy is in reverse bias, and voltage .nu..sub.m also decreases with the same form. Voltage .nu..sub.m at this time is still higher than the rectified line voltage, diode Dx is reverse biased, voltage .nu..sub.c keeps constant because there is no current through capacitor Cin and both diodes Dx and Dy are off. This mode ends at time t.sub.1, where the voltage .nu..sub.m is equal to the rectified line voltage. Diode Dx becomes forward-biased, and begins to conduct.

Mode 2 ›t.sub.1, t.sub.2 !: At time t.sub.1, diode Dx is turned on, and voltage .nu..sub.m is clamped to the rectified line voltage. Since voltage .nu..sub.a continues to decrease, the charge capacitor voltage .nu..sub.c increases to V.sub.a +.vertline..nu..sub.in .vertline. at time t.sub.2. During this time interval, the charge capacitor absorbs energy from the line input. Its voltage and charging current are determined by: ##EQU1## where .omega.s and Va are the frequency and the peak voltage of the voltage source .nu..sub.a, respectively. At time t.sub.2, current i.sub.x becomes zero, and diode D.sub.x is naturally turned off. The maximum charge capacitor voltage V.sub.c, max is

Mode 3 ›t.sub.2, t.sub.3 !: At time t.sub.2, diode Dx is turned off. Because voltage .nu..sub.m is lower than the DC bus voltage, diode Dy is in the reverse bias. No current flows through the charge capacitor Cin and voltage .nu..sub.c keeps constant. On the other hand, voltage .nu..sub.m continuously increases with the increase of voltage .nu..sub.a until time t.sub.3, where voltage .nu..sub.m reaches the DC bus voltage, and diode Dy is turned on.

Mode 4 ›t.sub.3, t.sub.4 !: At time t.sub.3, voltage .nu..sub.m is clamped to the DC bus voltage, and diode Dy is turned on. Charge capacitor Cin discharges, and its energy is pumped to capacitor C.sub.B due to the continuous increase of voltage .nu..sub.a. The charge capacitor voltage and its charging current are ##EQU2## Voltage .nu.c reaches its minimum value at time t.sub.4, which is given by

At time t.sub.4, voltage .nu..sub.a increases to its peak voltage. Diode Dy will be turned off; and next switching cycle begins.

From the above analysis, it can be seen that the rectified AC line current is equal to the capacitor charging current during the time period from time t.sub.1 to time t.sub.2. Therefore, the average C line current over one switching cycle equals the average capacitor charging current, which is the total charge variation from time t.sub.1 to time t.sub.2. The charge variation of capacitor Cin is

Substituting voltages V.sub.c,max and V.sub.c,min into equation (5) yields the rectified line current in a switching cycle, given by ##EQU3##

The input power P.sub.in is the average value of the product of voltage .nu..sub.in and current i.sub.in over one line cycle, which is ##EQU4## where V.sub.in,p is the line peak voltage. During the preheat and start-up operations, the lamp is not turned on. The output power P.sub.0 of the circuit is smaller than that of the normal operation. The switching frequency at preheat mode is higher than that of normal lighting frequency, and the lamp voltage 2V.sub.a at start-up mode is much higher than that of normal lighting operation. In order to maintain the relationship shown in equation (7), the DC bus voltage V.sub.dc has to increase at preheat and start-up modes. Therefore, one of the main disadvantages is high DC bus voltage stress at preheat and start-up mode operations. As a result, high voltage bulk capacitor and high voltage rating power devices must be used, which increase the cost of the device. Another main disadvantage is the high lamp crest factor. Usually, the higher the lamp crest factor, the shorter the lamp life. The high crest factor of the circuit of FIG. 1 is mainly due to a modulation of capacitor Cin on the resonant tank. Capacitor Cin is equivalently in parallel with the resonant capacitor Cr when either diode Dx or diode Dy is on. The equivalent resonant tank of FIG. 1 is shown in FIG. 4A. The equivalent resonant capacitor is Cr, and capacitors Cr+Cin near the zero crossing of the line input voltage and near the line peak voltage, respectively. Since capacitor Cin is much higher than capacitor Cr, the equivalent resonant capacitor of FIG. 1 significantly changes over the line cycle. As a result, the lamp crest factor becomes high at constant frequency and constant duty ratio control. Another disadvantage is that the rectified line current through diode Dx is discontinuous, thereby requiring a large line input filter to be used.

U.S. Pat. No. 5,410,466, also hereby incorporated by reference, discloses the same basic circuit as shown in FIG. 1 by adding a new control for controlling the switching frequency and duty ratio of two switches S1 and S2 to achieve smooth lamp current with a constant envelope and low crest factor. However, the circuit of U.S. Pat. No. 5,410,466 still suffers from high DC bus voltage stress at preheat and start-up modes and discontinuous line input current so that a large line input filter has to be used.

To reduce the DC bus voltage stress at start-up for the circuit of FIG. 1, one alternative is to reduce voltage .nu..sub.a at preheat and start-up modes. The method is disclosed in a paper entitled "Reduction of voltage stress in charge pump electronic ballast," published in IEEE Power Electronics Specialist Conference Proceedings, pp. 887-893, 1996. The circuit is shown in FIG. 5, where a second resonance, composed of inductor Lr.sub.2 and capacitor Cr.sub.2, is inserted to the circuit of FIG. 1. During preheat and start-up modes, the switching frequency is close to the second resonant frequency of inductor Lr.sub.2 and capacitor Cr.sub.2 so that a low impedance is connected and voltage .nu..sub.a is reduced, while still obtaining enough lamp voltage to ignite the lamp. Therefore, the DC bus voltage V.sub.dc can be reduced. By adding two clamping diodes Dr.sub.1 and Dr.sub.2, unity power factor can be achieved and also a low lamp crest factor can be simultaneously achieved. However, two resonant inductors must be used, which increases the cost of the device. Furthermore, the switch suffers from high current stress. This switching current is about one and one-half times the switching current of the circuit of FIG. 1. Therefore, devices having a high current rating must be used, which also increases the cost of the device.

Other known devices are disclosed in U.S. Pat. Nos. 5,404,082 and 5,410,221. The circuits of these two patents are shown in FIG. 6A. Capacitor Cin is in parallel with diode Dy to suppress the input current distortion and achieve a high power factor. The construction of FIG. 6A is different from FIG. 1. The equivalent circuit of FIG. 5 can be expressed as FIG. 7, where the series resonant tank is considered a high frequency current source with a constant amplitude. There are four operational modes for the circuit of FIG. 6A, as illustrated in FIGS. 6B-6E. The four equivalent topological stages and switching waveforms are shown in FIGS. 6B-6E.

Mode 1 ›t.sub.0 .about.t.sub.1 !: As shown in FIGS. 6B and 8, before time t.sub.0, the source current i.sub.s has a negative value, and it flows through the diode Dy. The voltage at node m is clamped to the bus voltage V.sub.dc. At time t.sub.0, source current i.sub.s becomes positive and begins to charge capacitor Cin The charge capacitor voltage .nu..sub.c begins to rise while voltage .nu..sub.m decreases. So, charge capacitor Cin accumulates energy from the DC bus. This mode terminates at time t.sub.1, where the voltage at node m decreases to the line input voltage, and diode Dx starts to conduct. The time interval t.sub.1 is determined by: ##EQU5## where .omega..sub.s is the frequency of source current i.sub.s, and V.sub.dc is the voltage across the bulk capacitor C.sub.B. The total charge variation in capacitor Cin is given by:

There is no input line current during this stage.

Mode 2: ›t.sub.1, t.sub.2 !: Referring to FIGS. 6C and 8, at time t.sub.1, diode Dx begins to turn on and voltage .nu..sub.m is clamped to the rectified line input voltage. Source current i.sub.s flows through the line input and diode Dx. Therefore, the high frequency source current i.sub.s flows through the line input and diode Dx. Therefore, the high frequency source current i.sub.s absorbs energy directly from the AC line. At t.sub.2 =T.sub.s /2, source current i.sub.x becomes negative, while diode Dx is naturally turned off, and this mode ends. During this time interval, the rectified line current i.sub.x is given by:

Mode 3 ›t.sub.2, t.sub.3 !: As illustrated in FIGS. 6D and 8, at time t.sub.2, source current i.sub.s becomes negative and diode Dx is naturally off. Since voltage .nu.m is still lower than the DC bus voltage V.sub.dc, diode Dy cannot be turned on at this time. Source current i.sub.s is discharging capacitor Cin and the voltage at node m increases. Voltage .nu..sub.m rises to the DC bus voltage, where diode Dy starts to conduct at time t.sub.3.

Mode 4 ›t.sub.3, t.sub.4 !: As shown in FIGS. 6E and 8, at time t.sub.3, diode Dy begins to flow the current source i.sub.s, and the voltage at node m is clamped to the DC bus voltage until i.sub.s becomes positive, and diode Dy is naturally turned off at time t.sub.4 =Ts. The rectified input line current equals the average diode current i.sub.x over one switching cycle, which is given by: ##EQU6## where Ts is the switching period. After substituting i.sub.s into the above equation, we have ##EQU7## where .DELTA.Q is the charge variation of capacitor Cin and .DELTA.Q=Cin(V.sub.dc -.vertline..nu..sub.in .vertline.. Therefore, the rectified line current i.sub.x in one switching period is ##EQU8##

In order to achieve the unity power factor, the average input current should be proportional to the line input voltage. The first term of the above equation should be zero, which is given by

This equation (14) is the unity power factor condition. The equation (13) becomes

Equation (15) shows that the unity power factor can be obtained as long as equation (14) can be satisfied. The input power is the average value of the product of voltage .nu..sub.in and current i.sub.in over one line cycle, which is ##EQU9##

During the preheat and start-up operations, the lamp is not turned on. The output power P.sub.0 of the circuit is smaller than that of the normal operation. The switching frequency at preheat mode is higher than that of normal lighting frequency, and the circulating current at light load during the start-up mode is much higher than that of normal lighting operation. In order to maintain equation (16), the DC bus voltage V.sub.dc must increase at preheat and start-up modes. Therefore, one of the main disadvantages is a high DC bus voltage stress at preheat and start-up mode operations. This basic problem is the same as the circuit of FIG. 1. For the circuit of FIG. 6A, when diode Dy is conductive, capacitor Cin is shorted. The resonant tank consists of inductor Lr, capacitors Cr and Cin when both diodes Dx and Dy are non-conductive. Therefore, this circuit also has two resonant modes in one switching cycle, which causes the same problem that an envelope of the lamp current varies with the line input voltage. As a result, the lamp crest factor increases and the lamp life becomes shorter. Although U.S. Pat. Nos. 5,404,082 and 5,410,021 proposes a control scheme to suppress the lamp crest factor, the DC bus voltage stress at the preheat and start-up mode still exists, which requires high voltage rating bulk capacitor C.sub.B and power switches S1 and S2. Besides, the input current is discontinuous so that a large line input filter must be used.

U.S. Pat. No. 4,511,832 discloses a circuit as shown in FIG. 9. The input inductor Li and capacitor Ci are used to suppress line input current harmonics and reduce the input current ripple. Capacitor C1 provides a path to absorb energy from the line input every switching cycle, while capacitor C2 provides another path to the bulk capacitor for the series resonant parallel-loaded tank composed of inductor Lr and capacitor Cr. The DC bus voltage V.sub.dc across the bulk capacitor C.sub.B is suppressed by conducting the thyristor T when the DC bus voltage exceeds a certain value. Thus, the cost increases and the control circuit becomes complicated.

Japanese Patent No. P0-222469 discloses a lamp driving circuit shown in FIG. 10. The main purpose of adding inductor Li is to improve a total harmonic distortion (THD), reduce line input current harmonics. Inductor Li is used as a boost inductor. The current through inductor Li can flow through diode Dy to charge the bulk capacitor C.sub.B, without flowing through the power switch. So, the switching current stress of switches S1 and S2 becomes small. But, there is still a high DC bus voltage stress across the bulk capacitor C.sub.B at start-up mode so that high voltage rating bulk capacitor and power switches must be used, which significantly increases cost. Besides, the high crest factor also still exists.

Another prior art is disclosed in Japanese Patent No. P06-284748, the circuit of which is shown in FIG. 11. This circuit is basically the same as the circuit of FIG. 6A except for the addition of an input inductor Li. Input inductor Li is used to minimize the input line current ripple so that a small input filter can be used. Diode D1 is used to improve THD. However, this circuit still suffers from high DC bus voltage across C.sub.B at the start-up mode and also from high lamp crest factor at normal light operation.

U.S. Pat. No. 5,521,467 discloses the use of an inverter for supplying a high frequency energy to the lamp. The circuit is shown in FIG. 12. An inductor Li and a full wave rectifier composed of diodes D.sub.1 -D.sub.4 are provided to achieve high power factor. Capacitor C1 and inductor Li form a low pass filter so that the input rectified current through inductor Li is continuous. The function of capacitor C.sub.g is like capacitor Cin in the circuit of FIG. 1, while the function of capacitor C.sub.s is similar to capacitor Cin in the circuit of FIG. 6A. The main disadvantage is that high DC bus voltage across capacitor C.sub.B at the start-up mode. For the circuit FIG. 12, the circuit is shut down once the DC bus voltage exceeds a set value through the control circuit. Another drawback is that the component count is not reduced, compared with those of the two-stage approach. As a result, the cost cannot be reduced.

All these prior circuits are designed only with +10% line input voltage variation. They suffer from a large lamp power variation, high lamp crest factor, high THD, and high DC bus voltage stress at the start-up over a wide range line input voltage. Therefore, different designs must be taken for the different line input voltages. As a result, the circuit components are made different. The research and product development cycle becomes longer, which also increases the cost of the device.

The present invention has been accomplished in view of the above problems and insufficiencies. The main objective is to develop a gas discharge lamp inverter which is capable of suppressing the DC bus voltage stress at the start-up mode, providing constant lamp power, low lamp crest factor of the lamp current, less circulating current, less switching current stress, and a continuous line input current over a wide range line input voltages from 180V to 265V. The present invention circuit comprises a rectifier for rectifying an AC voltage from an AC voltage source to give a DC voltage, a smoothing capacitor for smoothing the DC voltage from rectifier into a smoothed DC voltage, and an inverter including switches turning on and off at a high frequency for converting the smoothed DC voltage to a high frequency square voltage waveform. The inverter is connected to the load circuit which is composed of a gas discharge lamp and a resonant circuit. The resonant circuit is composed of an inductor and a capacitor, and the lamp is connected in parallel with the resonant capacitor so that the lamp absorbs a high frequency energy from the resonant circuit. A control circuit gives a control signal to turn on and off the switches of the inverter and controls the constant lamp power over a wide range line input voltage. An input inductor is connected to a line rectifier to get the continuous line input current near the line peak voltage and a discontinuous line input current near the zero crossing of the line voltage. Two capacitors are in parallel with two diodes to suppress the DC bus voltage at the start-up and to achieve a low lamp crest factor at normal lighting operation.

Therefore, the main objective of the present invention is to reduce the DC bus voltage at the start-up mode, and to provide a constant lamp power, low crest factor and less circulating current, and less switching current with a small input filter over a wide range line input voltage.

For a more detailed description of the embodiments of the present invention, reference should be made to the appended drawings, wherein:

FIG. 1 is a circuit diagram of a known circuit;

FIG. 2 is a simplified circuit diagram equivalent to the circuit of FIG. 1;

FIG. 3 is a graph illustrating the operations of the above known circuit;

FIGS. 4A to 4C are diagrams illustrating equivalent resonant tanks of the circuit of FIG. 1;

FIG. 5 is a circuit diagram of another known circuit;

FIG. 6A is a circuit diagram of a further known circuit;

FIGS. 6B to 6E illustrate operation modes of the circuit of FIG. 6A;

FIG. 7 is a simplified circuit diagram equivalent to the circuit of FIG. 6A;

FIG. 8 is a chart illustrating operations of the circuit of FIG. 6A;

FIGS. 9 to 12 are circuit diagrams of still further known circuits;

FIG. 13 is a circuit diagram of an embodiment of the present invention;

FIGS. 14 and 15 are charts illustrating waveforms of an input current and an inductor current in the circuit of FIG. 13, respectively at the start-up and at the normal lighting operation;

FIG. 16 is a circuit diagram of a control circuit for the circuit of FIG. 13;

FIG. 17 is a circuit diagram of another embodiment of the present invention;

FIG. 18 is a circuit diagram of a further embodiment of the present invention; and

FIGS. 19A-19F are circuit diagrams of other embodiments of the present invention.

Referring now to FIG. 13, there is shown a circuit in accordance with a preferred embodiment of the present invention. The circuit comprises a fullwave rectifier RF connected to a source voltage through a high-frequency blocking filter FL to provide a rectified DC voltage, a smoothing capacitor C.sub.B connected across the rectifier RF through diodes Dx and Dy, and an inverter composed of a series connected pair of switches S1 and S2, a capacitor Cd, and a resonant tank of a resonant inductor Lr and a resonant capacitor Cr. A discharge lamp is connected across the resonant capacitor Cr. The inverter is energized by a voltage V.sub.dc across the smoothing capacitor C.sub.B to alternately turn on and off the switches S1 and S2 at a high frequency for providing an high frequency alternating current to drive the discharge lamp. Switches S1 and S2 are controlled in a feedback manner by a constant lamp power control circuit of FIG. 16 to turn on and off at varying frequencies, as will be discussed later.

Capacitor Cin is connected in series with resonant capacitor Cr across the rectifier RF through an inductor Li for reducing distortion of an input current. A DC bus voltage V.sub.dc across capacitor C.sub.B is determined by an unbalance between input power and output power. If the input power is higher than needed at a load, the DC bus voltage increases, while the DC bus voltage is low when the input power is low in response to less load. The input power delivered to the bulk capacitor C.sub.B will go through diodes Dx and Dy. To reduce a DC bus voltage stress at a start-up mode, two capacitors Cx and Cy are added in parallel with the diodes Dx and Dy, respectively. Because an average current through two capacitors Cx and Cy is equal to zero over one line cycle, a net power delivered to the bulk capacitor C.sub.B through capacitors Cx and Cy equals zero. Capacitors Cx and Cy have to be totally discharged before the diodes Dx and Dy are turned on. The total charge stored in these capacitors reach the maximum near the zero crossing of the line input voltage. This stored charge in capacitors Cx and Cy is discharged by the resonant inductor current i.sub.Lr in a resonant tank including inductor Lr and capacitor Cr.

In the circuit of FIG. 13, the resonant capacitor Cr can be designed to be very small since the input current is continuous. Therefore, the discharging resonant inductor current is very small even at start-up. Start-up, or start-up mode, is a condition wherein current is provided to filaments of the lamp which is sufficient to raise the filament temperature while providing a lamp voltage which is less than an ignition voltage across the lamp, and subsequently providing ignition voltage across the lamp to illuminate the lamp. During the start-up mode, the lamp is not illuminated, and the filaments are dissipating energy. This results in the circuit operating in a light load. After the lamp is illuminated, the lamp enters a dimming mode wherein lamp power is less than full lamp power, and then in a steady state wherein the lamp operates in a full output power by reducing the switching frequency. The charge stored in the capacitors Cx and Cy are not able to be totally discharged near the zero crossing of the line input voltage. Consequently, diodes Dx and Dy cannot be turned on at this time, and the conduction angle a of diodes Dx and Dy becomes smaller, as shown in FIG. 14. There is no input current near a wide range of the zero crossing of the line input voltage. Therefore, the input power is reduced at the start-up mode, which is desirable since the lamp is not on, which means that the output power is also small. Therefore, the DC bus voltage is suppressed. In addition, a variation range of voltage .nu..sub.m, the bigger the absorbed energy from the line input in inductor Li. However, the resonant inductor current i.sub.Lr can be designed to be very small at start-up. So, a peak-to-peak voltage of voltage .nu..sub.m is also small so that the inductor Li absorbs less energy from the line input over one switching cycle, compared with the prior art circuits with a high circulating current. Thus, the DC bus voltage also can be reduced. Besides, the switching frequency at a preheat and the start-up modes are higher than that of the normal light operation. The input inductor Li gives a high impedance at high frequencies. So, this inductor is also able to help to reduce the DC bus voltage V.sub.dc across capacitor C.sub.B.

Two capacitors Cx and Cy are added in order to improve the lamp crest factor. As discussed before, the high lamp crest factor is mainly due to a modulation of capacitor Cin on the resonant tank. Capacitor Cin is a part of the resonant tank when diode Dx or diode Dy is on. Since the conduction angle of the diodes becomes small, modulation of capacitor Cin on the resonant tank is reduced so as to improve the lamp crest factor.

The input current is designed to be continuous near the line peak voltage, and discontinuous near the zero crossing of the line voltage so that the conduction angle .alpha. easily becomes small at the start-up mode to reduce the DC bus voltage stress. The input inductor Li, capacitors Cin, Cx and Cy are also used to achieve high power and reduce the line input current harmonics. The current through inductor Li at normal lighting operation is shown in FIG. 15. Since the current through inductor Li has continuous input current, a small line input filter can be used, which further reduces the cost of the device. The resonant capacitor is much smaller than that of other mentioned circuits in the prior arts. The circulating resonant current is low, which is about 70% circulating resonant current of FIG. 1 and FIG. 6A, 50% circulating resonant current of FIG. 5. So, the switching current stress is reduced, and therefore small current rating devices such as switches of the inverter can be used, which also reduces the cost.

As shown in FIG. 16, the constant lamp power control circuit comprises a detector for detecting at least one of an input voltage to an inverter and a load output from the inverter. The input voltage to the inverter could be an input current to the line rectifier, an input voltage to the rectifier or the output voltage to the inverter. The load output from the inverter may include a lamp current, a lamp voltage, a lamp power, or a resonant inductor current. The detected output voltage is used in a feedback circuit which modulates the control signal for achieving a constant lamp power and further reducing the low frequency ripple of the lamp current to improve the lamp crest factor. FIG. 16 shows one example of the control circuit using the lamp current as the detected signal.

The control circuit for providing the constant lamp power and reducing lamp current ripple comprises an error amplifier EA, which amplifies an error between the lamp current being detected and the reference voltage V.sub.ref. The output voltage of the error amplifier Ea will control the switching frequency to modulate the lamp power and lamp current with a constant value. For example, when the line input voltage .nu..sub.in is high, a lamp current i.sub.lamp tends to be big. Thus, a detecting circuit provides a high output voltage V.sub.1. Voltage V.sub.1 is fed to the error amplifier EA and compared with the reference voltage V.sub.ref threat to output a low voltage V.sub.2. Since voltage V.sub.2 becomes small, the base current through the transistor T becomes big, and a resistance across collector and emitter of the transistor T becomes small, in response to which a gate driver and control unit GC operates to modulate control signals to switches S1 and S2 of the inverter in a direction of increasing the switching frequency thereof. With this result, the lamp current cannot increase with the line input voltage increase. The lamp power and lamp crest factor are thus controlled as a constant even over a wide range line input voltage.

FIG. 17 illustrates another preferred embodiment of the present invention which is identical to the circuit of FIG. 13 except for removal of the input inductor Li. Removing inductor Li does not affect the normal lighting operation. Constant lamp power and low crest factor over a wide range line input voltage still can be achieved. Since two capacitors Cx and Cy are capable of reducing the modulation of capacitor Cin on the resonant tank, the low lamp crest factor and constant lamp power can be obtained even without any feedback control over .+-.10% line voltage variation. But, feedback control circuit of FIG. 16 is still needed to keep constant lamp power and low crest factor for a wide range line voltage. The line input current harmonics can be further reduced, as compared with the circuit of FIG. 13. However, the DC bus voltage V.sub.dc could be higher than that of FIG. 13 because the resonant capacitor Cr has to be larger. So, the circulating resonant current i.sub.Lr becomes large so that the conduction angle is large and DC bus voltage V.sub.dc increases. This DC bus voltage is still lower than that of the mentioned prior art circuits.

FIG. 18 illustrates a further embodiment of the present invention which is identical to the circuit of FIG. 17 except for removal of capacitor C1 therefrom in order to further reduce the component counts. This circuit maintains low lamp crest factor and constant lamp power operation against a possible line voltage variation since two capacitors Cx and Cy are in parallel with the diodes Dx and Dy, respectively and the conduction of diodes Dx and Dy becomes small. Therefore, modulation of capacitor Cin on the resonant tank is minimized so as to improve the lamp crest factor. Besides, since the voltage .nu..sub.a and current i.sub.Lr give a phase difference, the conduction angle of the line input current can be extended, as compared with the prior art circuits of FIGS. 1 and 6A. As a result, the circulating current in the resonant tank is reduced. The switches S1 and S2 actually conduct the resonant inductor current, so the switching current is also reduced, as compared with FIGS. 1 and 6A. However, the circulating current is still higher than that of FIG. 13. The DC bus voltage V.sub.dc at the start-up mode is also little higher than that of FIGS. 13 and 17. So, it is suitable for a lamp instant start application. This circuit can be produced less expensively than the circuits of FIGS. 13 and 17.

FIG. 19A illustrates another embodiment of the invention. The input inductor Li serves to achieve continuous line input current. As a result, the circulating current can also be minimized so that the voltage stress across the smoothing capacitor C.sub.B is reduced, compared to the prior art in U.S. Pat. No. 5,274,540. Capacitor C.sub.in is used to achieve power factor correction and low line input current distortion. This embodiment can be achieved by removing four components, these are capacitors C.sub.1, C.sub.x and C.sub.y and diode D, thereby reducing the component count. However, the negative effect is that the DC bus voltage stress across the bulk capacitor may be slightly higher than that of the embodiment of FIG. 13.

FIG. 19B illustrates yet another embodiment of the invention. The function of inductor L.sub.i the same as that of the other embodiments. Since the line input current is continuous, the charge capacitor C.sub.in could be small. Because of the smaller capacitor C.sub.in, the lower the DC bus voltage. Additionally, small capacitor C.sub.in requires small resonant current in the resonant tank to discharge capacitor C.sub.in. Therefore, the circulating current and switching current stress could be smaller. These advantages are similar to the other invented circuits. The negative effect is that there is dead time required between two switches, and it may not be suitable for dimming applications.

FIG. 19C is another embodiment of the invention, where inductor L.sub.i is used to achieve continuous line input current, incorporated with capacitor C.sub.in1 and C.sub.in2 to achieve low line input current harmonics and high power factor. This circuit also has low circulating current in the resonant tank even at the lamp start-up mode. As a result, the DC bus voltage at lamp start-up is reduced to some extent. However, it would be higher than the voltage at start-up of the circuit in FIG. 13.

FIG. 19D is equivalent to the circuit in FIG. 19C. Capacitor C.sub.in2 in circuit of FIG. 19C can be shifted through the bulk capacitor C.sub.B in high frequency sense. So, the performance is the same as that of circuit in FIG. 19C.

FIG. 19E illustrates a further embodiment of the invention. This circuit actually can be obtained by shifting the load connection from the circuit in FIG. 13. Inductor L.sub.i is also used to achieve continuous line input so that the resonant current can be designed to be very small even at the lamp start-up mode to reduce the bulk capacitor voltage at start-up mode. Two capacitors C.sub.y1 and C.sub.y2 are used to delay turn-on time of their two parallel diodes to further suppress the DC bus voltage stress during the lamp start-up mode. Therefore, this circuit has similar performance of the circuit in FIG. 13.

FIG. 19F illustrates another embodiment of the current invention. In this circuit, one capacitor C.sub.y1 is removed from the circuit in FIG. 19E. One capacitor C.sub.y2 is used to delay the turn-on time of the diode D.sub.y2. Actually there is capacitor loop in circuit in FIG. 19E, which is composed of C.sub.in1, C.sub.in2, C.sub.B and C.sub.y1. Therefore, C.sub.y1 could be equivalent of the combination of C.sub.in1, C.sub.in2, and C.sub.B. So, this circuit also has low DC bus voltage at lamp start-up, low circulating current, but is higher than that of the circuit in FIG. 19E.

The above-discussed embodiments of the invention are illustrative in nature, and should not be interpreted as being limiting in any way. Various modifications, improvements, and combinations of the disclosed invention would be apparent to those skilled in the art, and remain within the spirit and scope of the invention. The scope of the invention is defined by the appended claims.