US 5,914,570 AGrant
Compact Lamp Circuit Structure Having an Inverter/Boaster Combination That Shares the Use of a First N-Channel MOSFET of Substantially Lower on Resistance Than Its P-Channel Counterpart
Issue Date:1999-06-22
•5 Claims
•1 Drawing Sheets
Abstract
A gas discharge lamp ballast comprises a load circuit including circuitry for connection to a gas discharge lamp. A circuit supplies d.c. power from an a.c. voltage. A d.c.-to-a.c. converter circuit is coupled to the load circuit for inducing a.c. current therein. The converter circuit comprises first and second converter switches serially connected in the foregoing order between a bus node at a d.c. voltage and a reference node, and being connected together at a common node through which the a.c. load current flows. The first and second converter switches each have a control node and a reference node, the voltage between such nodes determining the conduction state of the associated switch. The respective control nodes of the first and second converter switches are interconnected. The respective reference nodes of the first and second converter switches are connected together at the common node. A boost converter comprises a boost capacitor connected between the bus and reference nodes and whose level of charge determines the bus voltage on the bus conductor. A boost inductor stores energy from the circuit that supplies d.c. power, the boost inductor being connected by at least one diode to the boost capacitor, for discharging its energy into the boost capacitor. A boost switch periodically connects the boost inductor through a low impedance path to the bus node to thereby charge the boost inductor. The boost switch comprises the first switch of the converter circuit. The ballast achieves a high degree of power factor correction.
Metadata
Assignee
- General Electric Company
Inventors
- Louis R. Nerone
- David J. Kachmarik
Application Information
Application Number:US 9222030
Filing Date:1997-09-02
Priority Date:1997-09-02
Art Unit:281
Classifications
IPC:
H05B 3702
Field of Search:
315363247;209 R;307;224;DIG. 716;60;17
Patent Drawings (1 sheets)
Description
Field of the Invention
This invention relates to a ballast, or power supply circuit, for powering a gas discharge lamp with a.c. current and while achieving a high degree of power factor correction.
Background of the Invention
It is known from U.S. Pat. No. 5,408,403, assigned to the present assignee, to employ a ballast for a gas discharge lamp incorporating a d.c.-to-a.c. converter using a pair of serially connected converter switches. A boost circuit is incorporated into the ballast to achieve a high degree of power factor correction. However, the converter switches are both of the same conduction type; e.g., both n-channel enhancement mode MOSFETs.
A lamp ballast incorporating a d.c.-to-a.c. converter using serially connected switches of complementary conduction types is disclosed and claimed in co-pending and commonly assigned application Ser. No. 08/709,062, filed Sep. 6, 1996, by Louis R. Nerone, one of the present inventors. For instance, one switch may be an n-channel enhancement mode MOSFET, while the other is a p-channel enhancement mode MOSFET.
It would be desirable to increase power factor correction in a ballast incorporating a d.c.-to-a.c. converter using switches of the same conduction type.
Summary of the Invention
An exemplary embodiment of the invention provides a gas discharge lamp ballast. The ballast comprises a load circuit including circuitry for connection to a gas discharge lamp. A circuit supplies d.c. power from an a.c. voltage. A d.c.-to-a.c. converter circuit is coupled to the load circuit for inducing a.c. current therein. The converter circuit comprises first and second converter switches serially connected in the foregoing order between a bus node at a d.c. voltage and a reference node, and being connected together at a common node through which the a.c. load current flows. The first and second converter switches each have a control node and a reference node, the voltage between such nodes determining the conduction state of the associated switch. The respective control nodes of the first and second converter switches are interconnected. The respective reference nodes of the first and second converter switches are connected together at the common node. A boost converter comprises a boost capacitor connected between the bus and reference nodes and whose level of charge determines the bus voltage on the bus conductor. A boost inductor stores energy from the circuit that supplies d.c. power, the boost inductor being connected by at least one diode to the boost capacitor, for discharging its energy into the boost capacitor. A boost switch periodically connects the boost inductor through a low impedance path to the bus node to thereby charge the boost inductor. The boost switch comprises the first switch of the converter circuit.
The foregoing embodiment achieves a high degree of power factor correction in a ballast incorporating a d.c.-to-a.c. converter with switches of the same conduction type.
Description of the Drawings
FIG. 1 is a schematic diagram of a ballast for achieving a low power factor.
FIG. 2 is waveform of current in the boost inductor of FIG. 1.
Detailed Description of the Invention
FIG. 1 shows a ballast 10 for powering a gas discharge lamp 12, indicated as a resistance. A source 14 supplies a.c. power to a full-wave rectifier 16. A high frequency by-pass capacitor 18 is used for by-passing currents at the frequency of operation of the ballast 10 (as opposed to the line frequency of the power source 14). Optional p-n diode 19 minimizes parasitic voltage caused by a resonant interaction between a boost inductor 50 (described below) and a parasitic capacitance (not shown) between the output electrodes of switch 20.
Ballast 10 includes an d.c.-to-a.c. converter including a pair of switches 20 and 22 serially connected between a bus node 24 and a reference node 26. Switches 20 and 22 preferably comprise n-channel and p-channel enhancement-mode MOSFETs, respectively, as shown, with their sources interconnected at common node 28. The gates, or control nodes, of the switches are interconnected at control node 30.
In operation, node 28 is alternately connected between a bus potential on node 24, and a reference potential on node 26. In this way, an a.c. current is supplied to a load circuit including a resonant inductor 32, a d.c. blocking capacitor 33, a resonant capacitor 34, and lamp 12. Before discussing the circuitry used for achieving a low power factor, preferred circuitry for regeneratively controlling operation of switches 20 and 22 is described.
Regenerative control is provided in part by a driving inductor 36 mutually coupled to resonant inductor 32 with polarity dots as shown, a further inductor 38, and a capacitor 40. Regenerative control is also provided by a network preferably including resistor 42, resistor 44 and either resistor 46a shown in solid lines or alternate resistor 46b shown in dashed lines. Additionally, back-to-back Zener diode pair 48 is used for regenerative control. Upon initial energization of ballast 10, when a.c. source 14 is activated, capacitor 40 becomes charged until switch 22 turns on. Thereafter, through feedback supplied to driving inductor 38 from resonant inductor 32, the voltage of control node 30 alternatively becomes positive and then negative with respect to common node 26 so as to alternately turn on switches 20 and 22.
Although both resistors 42 and 44 are preferably used in the foregoing-described circuitry for regenerative control, resistor 44 may be deleted where resistor 46a is used, and resistor 42 may be deleted where resistor 46b is used.
Power factor correction is obtained by use of a boost converter including a boost inductor 50, a boost capacitor 52, and switch 20 used, in addition to its role in the mentioned d.c.-to-a.c. converter, as a boost switch. In operation, when switch 20 conducts, common node 28 is raised to the potential of bus node 24. At this time, boost inductor 50 conducts current from node 28 via p-n diode 54. As such, that inductor stores energy and, consequently, continues to conduct current when switch 20 stops conducting. Then, inductor 50 conducts current through either inherent p-n diode 22a of MOSFET switch 22, or through optional p-n diode 56, such current being mainly supplied by boost capacitor 52. This charges the capacitor so as to increase its voltage, and hence the potential of bus node 24.
The use of optional p-n diode 56 reduces the number of p-n diode voltage drops to only one in the conduction path from capacitor 52 to inductor 50, making energy storage in the inductor less lossy.
Thereafter, switch 22 begins to conduct, preferably after p-n diode 22 has started conducting, for instance, residual current from either inductor 32 or 50. This brings the potential of node 28 down to that of reference node 26, and causes current through the boost inductor 50 to decrease, preferably to zero.
The amount of energy stored in boost inductor 50 depends on where in the cycle of the source 14 of a.c. power, current is made to flow through the inductor. If this occurs at the peak of the a.c. power, the energy stored will be greatest; if near the zero crossings of the a.c. power, the energy stored will be lowest.
When current has been flowing from resonant inductor 32 into node 28, and both switches 20 and 22 are off, the energy stored in inductor 32 may cause current flow both into boost inductor 50, via diode 54, and through inherent p-n diode 20a of switch 20. Then, switch 20 begins to conduct, causing a reversal of current flow in resonant inductor 32 and increasing any current flow into boost inductor 50.
Preferably, switch 20, which carries the boost converter current in addition to the current used in the d.c.-to-a.c. conversion, has a substantially lower on-resistance than the other switch 22. This is realized in the ballast 10, wherein switch 20, preferably an n-channel enhancement mode MOSFET, has a lower on-resistance than switch 22, preferably a p-channel enhancement mode MOSFET.
FIG. 2 shows waveform 60 of current in boost inductor 50 (FIG. 1). Waveform 60 comprises triangular components 60a, 60b, 60c, etc., which are separated from each other by time intervals 62, 64, etc. This indicates energy storage in a discontinuous mode, which is preferable for increasing the power factor of the ballast. However, the time intervals between successive triangular components at the peak of the waveform (not shown) of the source 14 of a.c. power can approach and even reach zero while still maintaining a discontinuous mode of energy storage.
Exemplary component values for ballast 10 are as follows for a fluorescent lamp 12 rated at 16.5 watts, with a d.c. bus voltage of 330 volts:
Typically, a capacitor of about 5.6 nano farads (not shown) will be connected between nodes 28 and 30 to increase the so-called "dead" time wherein both switches 20 and 22 are off. Switch 20 may be an IRFR310, n-channel, enhancement mode MOSFET, sold by International Rectifier Company, of E1 Segundo, Calif.; and switch 22, an IRFR9310, p-channel, enhancement mode MOSFET also sold by International Rectifier Company.
A power factor of greater than 0.95 has been achieved with a ballast as described herein, with 20 percent or less total harmonic distortion of a.c. current supplied by a line source of a.c. power. With optimization, e.g., a boost of 2-to-1, the total harmonic distortion can often be reduced to under 13 percent.
While the invention has been described with respect to specific embodiments by way of illustration, many modifications and changes will occur to those skilled in the art. It is, therefore, to be understood that the appended claims are intended to cover all such modifications and changes as fall within the true scope and spirit of the invention.
Claims
What is claimed is:
1. A gas discharge lamp ballast, comprising: (a) a load circuit with means for connection to a gas discharge lamp; (b) means for supplying d.c. power from an a.c. voltage; (c) a d.c.-to-a.c. converter circuit coupled to said load circuit for inducing a.c. current therein, said converter circuit comprising: (i) an n-channel enhancement mode first MOSFET and a p-channel enhancement mode second MOSFET connected in the foregoing order between a bus node at a d.c. voltage and a reference node, and having their sources connected together at a common node through which said a.c. load current flows; and (ii) the respective gates of said first and second MOSFETs being interconnected; and (d) a boost converter comprising: (i) a boost capacitor connected between said bus and reference nodes and whose level of charge determines the bus voltage on said bus conductor; (ii) a boost inductor for storing energy from said means for supplying d.c. power, said boost inductor being connected by at least one diode to said boost capacitor, for discharging its energy into said boost capacitor; and (iii) a boost switch for periodically connecting said boost inductor through a low impedance path to said bus node to thereby charge said boost inductor; (e) said boost switch comprising said first MOSFET; (f) said first MOSFET having a substantially lower on resistance than said second MOSFET.
2. The ballast of claim 1, wherein said low impedance path includes a p-n diode allowing current flow from said boost switch to said boost inductor.
3. The ballast of claim 1, wherein the inductance of said boost inductor and the frequency of operation of said d.c.-to-a.c. converter circuit are selected to cause said boost inductor to operate with discontinuous energy storage throughout substantially the entire period of said a.c. voltage.
4. The power supply circuit of claim 1, wherein said d.c.-to-a.c. converter circuit includes a regenerative switch control circuit for controlling the switching state of said first and second MOSFETs.
5. The power supply circuit of claim 4, wherein said load circuit includes a fluorescent lamp.
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