Topographical Structure of an Electrostatic Chuck and Method of Fabricating Same

1. Field of the Invention

The invention relates generally to electrostatic chucks for holding a workpiece and, more specifically, to an improved topographical structure of a support surface of an electrostatic chuck to improve heat transfer gas distribution along the bottom surface of the workpiece.

2. Description of the Background Art

Electrostatic chucks are used for holding a workpiece in various applications ranging from holding a sheet of paper in a computer graphics plotter to holding a semiconductor wafer within a semiconductor wafer process chamber. Although electrostatic chucks vary in design, they all are based on the principal of applying a voltage to one or more electrodes in the chuck so as to induce opposite polarity charges in the workpiece and electrodes, respectively. The electrostatic attractive force between the opposite charges pulls the workpiece against the chuck, thereby retaining the workpiece.

In semiconductor wafer processing equipment, electrostatic chucks are used for clamping wafers to a pedestal during processing. The pedestal may form both a cathode and a heat sink. Electrostatic chucks find use in etching, chemical vapor deposition (CVD), and physical vapor deposition (PVD) applications. More specifically, the electrostatic chuck has a flex circuit covering a support surface of the pedestal. The flex circuit is comprised of a top layer of dielectric material covering a conductive electrode. Below the electrode is a bottom layer of dielectric material. The top and bottom dielectric layers encapsulate the conductive electrode.

In a "unipolar" electrostatic chuck, voltage is applied to the conductive electrode relative to some internal chamber ground reference. Electrostatic force is established between the wafer being clamped and the electrostatic chuck. When the voltage is applied, the wafer is referred back to the same ground reference as the voltage source by a conductive connection to the wafer. Alternatively, a plasma generated proximate the wafer can reference the wafer to ground, although some voltage drop occurs across plasma sheaths that form at both the wafer being clamped and the reference electrode.

The materials and processes used to process a wafer are extremely temperature sensitive. Should these materials be exposed to excessive temperature fluctuations due to poor heat transfer from the wafer during processing, performance of the wafer processing system may be compromised resulting in wafer damage. To optimally transfer heat between the wafer and chuck, a very large electrostatic force is used in an attempt to cause the greatest amount of wafer surface to physically contact the support surface. However, due to surface roughness of both the wafer and the chuck, small interstitial spaces remain between the chuck and wafer that interfere with optimal heat transfer.

To achieve further cooling of the wafer during processing, an inert gas such as Helium is pumped into the interstitial spaces formed between the wafer and the support surface of the chuck. This gas acts as a thermal transfer medium from the wafer to the chuck that has better heat transfer characteristics than the vacuum it replaces. To further enhance the cooling process, the chuck is typically water-cooled via conduits within the pedestal. This cooling technique is known as backside gas cooling.

Since the distribution of Helium to the interstitial spaces is osmotic and the interstitial spaces may not be interconnected, some spaces do not receive any Helium. This condition can lead to a non-uniform temperature profile across the wafer during processing and result in wafer damage. Since effective and uniform heat conduction away from the wafer is an important aspect of the manufacturing process, establishing a uniform Helium layer within the wafer to chuck interface should contribute to uniform heat transfer from the wafer. As such, backside gas cooling art developed based on this premise.

However, the physical limitations of existing technology used to electrostatically clamp large diameter (e.g., 200 mm or more) wafers do not provide the necessary conditions for a uniform distribution of Helium in all of the interstitial spaces beneath the wafer. Existing pedestal topographies limit the effectiveness of the heat transfer process because they have a generally flat top support surface and the wafers have a generally flat bottom surface. Ideally, these flat surfaces would have no defects or deviations so that 100% of the bottom surface of the wafer would contact the top support surface of the pedestal to allow for maximum heat transfer from the wafer to the pedestal. Topographical anomalies create a condition where not all of the wafer is in contact with this support surface. As such, the aforementioned interstitial spaces could form and distribution of the heat transfer gas becomes uneven and uniformity of wafer temperature is compromised. Consequently, during processing, the temperature non-uniformity may result in non-uniform processing and wafer damage.

Therefore, there is a need in the art for an improved topographical structure of an electrostatic chuck that improves temperature uniformity across the wafer without adding considerably to manufacturing costs.

The disadvantages heretofore associated with the prior art are overcome by an inventive topography of a workpiece support surface of an electrostatic chuck and a method of fabricating same. The inventive topography is created by forming protruded regions and non-protruded regions on the workpiece support surface. The total surface area of the protruded regions is less than that of the non-protruded regions. In use, these protruded regions provide support for a workpiece that is electrostatically clamped to the chuck. Additionally, the electrostatic chuck has at least one heat transfer gas port extending through it to the workpiece support surface. The protruded areas are arranged so that when chucked, the workpiece does not block the flow of heat transfer gas. As such, the gas uniformly penetrates across the entire underside of the wafer.

In a first embodiment of the invention, the protruded regions are formed by a sculpted (or twice etched) electrode contained within the electrostatic chuck. In a second embodiment of the invention, the protruded regions are formed by machining a surface of a pedestal that supports a flex circuit. The flex circuit conforms to the underlying pedestal surface topography providing the workpiece support surface having protruded and non-protruded regions. In the third embodiment of the invention, the protruded regions are formed using a combination of machining the pedestal support surface and formation of sculpted electrode within the chuck.

A method for fabricating the inventive topography includes the steps of etching an electrode pattern onto a layer of copper, etching a topography onto the copper layer, laminating the copper layer between first and second dielectric layers to form a flex circuit and laminating the aforementioned flex circuit to a pedestal surface of the electrostatic chuck. The topography created by the second etching contains protruded regions and non-protruded regions such that the total surface area of the protruded regions is less than the total surface area of the non-protruded regions.

An alternate method of fabricating the inventive topographical structure includes the steps of etching an electrode pattern on a layer of copper, laminating the copper layer between first and second dielectric layers, to form a flex circuit, machining a topography onto the pedestal surface of the electrostatic chuck and adhering the aforementioned flex circuit to the sculpted pedestal surface. The topography created by the machining contains protruded regions and non-protruded regions so that a total surface area of said protruded regions is less than a total surface area of said non-protruded regions. The flex circuit is adhered to the surface of the pedestal and conforms to the topography thereof.

A second alternate method of fabricating a topographical structure of an electrostatic chuck for retaining a workpiece combines the aforementioned steps of machining the pedestal surface and second etching the electrode to create the topography.

This invention fulfills the long felt need for an apparatus that can efficiently clamp a wafer to an electrostatic chuck and provide improved heat transfer characteristics. Specifically, the sculpted electrode and/or machined pedestal surface creates a topography that advantageously distributes and seals heat transfer gas to the backside of a wafer in a more uniform fashion than previously possible. In particular, a substantial and uniform volume of gas is trapped between the wafer and the non-protruded surface of the chuck. The wafer only contacts the surface at the protruded regions and a peripheral rim of the chuck. The improved heat transfer gas distribution provides more uniform cooling of the wafers during processing resulting in a better quality end product.

The teachings of the present invention can be readily understood by considering the following detailed description in conjunction with the accompanying drawings, in which:

FIG. 1 depicts a top view of an electrostatic chuck with a sculpted electrode providing a first embodiment of the inventive topography for improved heat transfer gas distribution;

FIG. 2 depicts a cross-sectional view of the electrostatic chuck with sculpted electrode taken along lines 2--2 of FIG. 1;

FIG. 3 depicts a top view of an electrostatic chuck with a sculpted support surface and sculpted electrode providing the second embodiment of the inventive topography; and

FIG. 4 depicts a cross-sectional view of the electrostatic chuck taken along lines 4--4 of FIG. 3. To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures.

FIG. 1 depicts a top view of an electrostatic chuck 100 adapted to support and electrostatically retain a workpiece to be processed, such as a semiconductor wafer, on a pedestal 102 within a high density plasma reaction chamber (not shown). FIG. 2 depicts a cross-sectional view of the electrostatic chuck of FIG. 1 taken along line 2--2 with a semiconductor wafer 111 shown in phantom. To best understand the invention, the reader should simultaneously refer to both FIGS. 1 and 2.

For a detailed understanding of the plasma reaction chamber and its operation in processing a wafer, the reader should refer to the drawings and the detailed description contained in U.S. Pat. No. 4,842,683, issued Jun. 27, 1989 and incorporated herein by reference. That patent discloses a illustrative biased, high density plasma etch reaction chamber manufactured by Applied Materials, Inc. of Santa Clara, Calif.

The electrostatic chuck 100 contains an inventive topographical surface created by a sculpted flex circuit 120 upon which the wafer 111 rests. Specifically, the chuck 100 contains a pedestal 102 with a surface 101 upon which the flex circuit 120 is adhered. The flex circuit contains a first dielectric layer 114, a conductive layer 112 and a second dielectric layer 116. The first dielectric layer 114 is attached to the pedestal surface 101 by a first adhesive layer 118.

More specifically, the flex circuit 120 is fabricated using conventional, flexible printed circuit fabrication techniques with materials available from a flexible circuit board manufacturer such as Rogers Corporation of Chandler, Ariz. Specifically, a conductive layer 112 of uniform 5.08 mm thickness copper 112 is used to form the sculpted electrode. The conductive layer 112 is masked to outline the desired electrode pattern and then etched (e.g., wet etched) to create the electrode pattern. The conductive layer 112 is then masked and etched again to create a desired topography in one surface of the electrode.

The conductive layer 112 is then embedded between a first dielectric layer 114 and a second dielectric layer 116. The conductive layer 112 is placed on top of the first dielectric layer 114. A first laminating adhesive layer 113 is then applied over the conductive layer 112. Finally, the second dielectric layer 116 is placed on top of the first laminating adhesive layer 113 and the layers are pressed together to form the flex circuit 120. A second laminating adhesive layer 118 is then applied to the pedestal surface 101. The flex circuit 120 is pressed over the second laminating adhesive layer 118 thereby affixing it to the pedestal 102. The second dielectric layer conforms to the topographical design etched into the conductive layer 112 to form a sculpted wafer support surface 107.

Preferably, the dielectric material used is a sheet of polyimide sold under the brandname UPILEX by Rogers. UPILEX is a registered trademark of UBE Industries, Ltd. of Yamaguchi, Japan. The preferred thickness of the first dielectric layer 114 is 25.4 mm and the preferred thickness of the second dielectric layer 116 is 50.8 mm. The preferred thickness of the first and second laminating adhesive layers 113 and 118 is 12.7 mm.

The pedestal 102 is provided with a raised rim 104 at its outer diameter. The diameter of the rim 104 is approximately equal to the diameter of the wafer to be processed. As such, the edge of the flex circuit 120 follows the contour of the rim 104 such that the wafer 111 is supported in part by the rim. The chuck also contains at least one port 108 for conducting heat transfer gas through the chuck to the bottom surface of the wafer. When the wafer 111 is placed on the chuck, it is supported solely by the rim 104. As such, a volume of space 109 is created below the wafer and above the wafer support surface 107. When power is applied to the electrode 112, it creates an electrostatic force which draws the wafer toward the wafer support surface 107. This electrostatic force is also known as a clamping force. Since the dielectric material of the flex circuit 120 is semi-pliant, a relatively tight seal is created at the rim to wafer contact area 103. As such, the volume of space 109 between the wafer and the flex circuit covered wafer support surface 107 is sealed from the chamber vacuum when the wafer 111 is clamped to the chuck 100.

To create a topography for the wafer support surface 107 upon which the wafer rests when clamped, the electrode 112 is preferably etched into a series of one or more rims 106 and 110 rising above a common level. The rims 106 and 110 may be continuous or broken into radial segments about the pedestal 102. After the electrode 112 is etched to a specific topographical pattern and sealed between the dielectric layers 114 and 116, the results is a topography across the wafer support surface 107 that lends additional support to the clamped wafer 111. Specifically, the wafer 111 is supported at the outer diameter rim contact area 103 and at least one other point radially inward therefrom (e.g., rims 106 and 110).

To achieve cooling of the wafer during processing, a heat transfer gas, preferably Helium, is pumped into the volume 109 between the wafer and the wafer support surface 107 via the heat transfer gas ports 108. With the addition of the rims 106 and 110, the interstitial spaces between the wafer and the wafer support surface 107 are eliminated. Thus, the surface area of the wafer exposed solely to the Helium is greatly increased. This contributes to greater and more uniform Helium distribution than experienced by the prior art. As a result, heat transfer from the wafer to the pedestal is uniform. The improved topography is capable of reducing wafer temperature nonuniformity to approximately 5.degree. C. across the wafer.

An alternate method of constructing the inventive topography is by machining the pedestal surface 101 prior to covering it with a flex circuit. Turning to FIGS. 3 and 4, a similar chuck construction 200 is shown as that depicted in FIGS. 1 and 2 including outer diameter rim 204, heat transfer gas ports 208 and a flex circuit 220. As with the previous embodiment, the flex circuit contains a conductive layer 222 that is etched at one or more locations 225 and 229 to form the electrode. The conductive layer is encased in first and second dielectric layers 224 and 226 using a first laminating adhesive layer 223 and secured to the pedestal surface 201 using a second laminating adhesive layer 228. The topographical structure of the pedestal 202 is further enhanced by machining of the pedestal surface 201 to create an additional rim 230 which supports the wafer. The pedestal surface 201 is machined to a specific topographical pattern which allows the flex circuit above it to take the shape of the pattern. Specifically, a rim of approximate height 50.8 mm. and width 2.21 cm is shown as a preferred pattern in FIG. 4. The height may be altered depending on the thickness of the dielectric material and electrode used. The width may be altered depending on the desired amount of area of the wafer to be exposed to the backside gas to provide adequate cooling. It should be noted that although the etched electrode and machined support surfaces are shown together in FIGS. 3 and 4, they may be used either separately or in conjunction with one another to form the desired topography and achieve particular gas distribution and cooling characteristics.

The wafer support surface or electrode may also be formed as a pattern of ribs (i.e., extending radially outward, a series of concentric circles or segments or a combination of both). The pattern lends additional support to the wafer beyond that provided by the outer diameter rim as well as contributing to the uniform distribution and flow of Helium to all areas of the wafer. For example, if a wafer were placed on a conventional support surface, it may block one or more of the Helium ports because of wafer flexing. The ribs of the present invention can be patterned to maintain the wafer above the ports to avoid blockage and improve gas distribution. However, in keeping with the teachings of the invention, the area of the wafer physically contacting the support surface at the chuck is substantially less than the area of the wafer that is exposed to the cooling gas.

Although various embodiments which incorporate the teachings of the present invention have been shown and described in detail herein, those skilled in the art can readily devise many other varied embodiments that still incorporate these teachings.