Low Power Temperature Compensated, Current Source and Associated Method

The present invention relates to the field of integrated circuits, and, more particularly, to an integrated circuit and method having a constant current source.

Integrated circuits are widely used in many electronic applications. Current sources for these integrated circuits are often made by using active devices both as biasing elements and as load devices for amplifier stages. The use of current sources in biasing, for example, can result in improved sensitivity of circuit performance to power-supply variations and to temperature. Current sources also are often more economical than resistors in terms of the die area needed to provide bias current of selected values. When current sources are used as load devices in transistor amplifiers, the high incremental resistance of the current source can result in high voltage gain at low power-supply voltages.

Current sources, for example, can be formed from or include a field-effect transistor and a reference voltage source that biases the gate of the transistor. The reference source voltage can be a so-called "bandgap" type which generally refers to the energy interval between the valence bands and the conduction bands of a semiconductor. Current sources of this type conventionally use a known relationship of dependency between this interval and the temperature to achieve compensations that make the reference voltage as stable as possible as a function of the temperature.

A bandgap-type voltage source generally has two diodes through which flow different currents and a looped differential amplifier amplifying the voltage difference at the terminals and supplying the diodes with current. The current through the diodes can also be the same current, but if the current is the same, then the diodes are necessary and will generally have different junction surfaces. A current source can be made from this type of voltage source, but the stability in temperature is often lost during the voltage-to-current conversion.

Another type of current source is the "Wilson mirror" sources. A source of this kind is generally based upon mutually compensating variations in the characteristics of several transistors which mutually copy one another's currents. A Wilson mirror source conventionally has two parallel branches with two transistors each, and the transistors are mounted so that each branch copies the current of the other one. Two transistors which each belong to a different branch are different in size or in threshold voltage.

Modifications to this Wilson mirror type have been developed which further attempt to stabilize the current source for temperature variations. These modifications, for example, can include adding additional transistors such as in an MOSFET cascade current source illustrated in FIG. 1 or combining the Wilson mirror type and the bandgap type sources such as seen in U.S. Pat. No. 5,103,159 by Breugnot et al. titled "Current Source With Low Temperature Coefficient." Although some stability can be obtained with these modified current sources, either the stability or the performance can be considered lacking for many low power applications such as low power clocks, low current oscillators, or controlling gain stages, dividers, level shifters, or other functions of various low power integrated circuit designs.

With the foregoing in mind, the present invention advantageously provides a low power, temperature compensated, current source and methods. The present invention also advantageously provides a current source for low power applications which generates a high current even at low temperatures. Additionally, the present invention advantageously provides an integrated circuit having a portion of the circuit which lowers the voltage as the temperature increases above a predetermined threshold and inhibits voltage as the temperature decreases below the predetermined threshold. In low power applications, for example, an integrated circuit of the present invention advantageously allows a relatively high current flow even during low temperature conditions where the performance of the application, e.g., a crystal oscillator, would otherwise be expected to deteriorate due to little or no current being supplied to the application.

More particularly, an integrated circuit according to the present invention preferably includes current generating means responsive to a supply voltage for generating an output source current. The integrated circuit also includes temperature compensating voltage control signal generating means responsive to the supply voltage for generating a temperature compensated voltage control signal during temperature variations. The temperature compensating voltage controlling means is preferably provided by a temperature compensating voltage controlling circuit connected to the supply voltage and arranged so that the voltage control signal, e.g., from the supply voltage to a gate of an output transistor, decreases as temperature increases above a predetermined threshold. The temperature compensating voltage controlling circuit also inhibits the voltage control signal as temperature decreases below the predetermined threshold so as to generate a high output source current even during low temperature conditions.

According to another aspect of the present invention, an integrated circuit preferably has current generating means responsive to a supply voltage for generating a first reference current and temperature compensating voltage control signal generating means connected to the supply voltage for generating a temperature compensated voltage control signal during temperature variations. The integrated circuit also preferably has bias controlling means responsive to the current generating means and connected to the temperature compensating voltage controlling means for biasingly controlling the temperature compensating voltage controlling means. Current output controlling means is responsive to the current generating means and the temperature compensated voltage control signal for controlling a second temperature compensated reference current so as to generate a high output source current even during low temperature conditions.

Advantageously, the current output control means preferably includes at least one output transistor which provides a temperature compensated reference current output when the temperature is above the predetermined threshold. When the temperature falls below the predetermined threshold, however, the at least one output transistor will be turned off and the second reference current will mirror the first reference current during these low temperature conditions.

The present invention also includes methods of supplying current for low power applications. A method according to the present invention preferably includes generating a reference current responsive to a supply voltage and generating a temperature compensated voltage control signal during temperature variations by decreasing the voltage control signal when temperature increases above a predetermined threshold and inhibiting the voltage control signal when temperature decreases below the predetermined threshold so as to generate a high output source current even during low temperature conditions.

Another method according to the present invention preferably includes generating a first reference current responsive to a supply voltage and generating a temperature compensated voltage control signal during temperature variations. A second temperature compensated reference current is controlled responsive to the temperature compensated voltage control signal so as to generate a high output source current even during low temperature conditions.

Further, because an integrated circuit and methods of the present invention advantageously provide two reference currents instead of only one reference current, the first or original current reference can be used to control a first portion of circuitry, such as an oscillator, and the temperature compensated current reference can be used to control other portions of the circuitry, such as dividers and level shifters. In essence, with the same battery or supply current at room temperature, the operation temperature range of at least portions of low power applications can advantageously be extended by using the integrated circuit and methods of the present invention.

Some of the features, advantages, and benefits of the present invention having been stated, others will become apparent as the description proceeds when taken in conjunction with the accompanying drawings in which:

FIG. 1 is a schematic block diagram of a prior art current source;

FIG. 2 is a schematic block diagram of an integrated circuit having a low power, temperature compensated, current source according to an embodiment of the present invention;

FIG. 3 is a schematic circuit diagram of an integrated circuit having a low power, temperature compensated, current source according to an embodiment of the present invention; and

FIG. 4 is a graphical diagram of normalized current versus temperature for a low power, temperature compensated, current source according to an embodiment of the present invention.

The present invention will now be described more fully hereinafter with reference to the accompanying drawings which illustrate a preferred embodiment of the invention. This invention may, however, be embodied in many different forms and should not be construed as limited to the illustrated embodiments set forth herein. Rather, these illustrated embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

FIG. 1 illustrates a prior art current source formed by three pairs of field effect transistors T.sub.1, T.sub.2, T.sub.3, T.sub.4, T.sub.5, T.sub.6 connected to a supply voltage V.sub.CC. The transistors T.sub.1, T.sub.2, T.sub.3, T.sub.4, T.sub.5, T.sub.6 have a cascading mirror configuration with each pair having commonly connected gates. A resistor R is connected to the source of one of the transistors T.sub.6 which also indicates a voltage V.sub.R across the resistor R. The reference current I.sub.S will relate to the size (W/L) of the transistors T.sub.1, T.sub.2, T.sub.3, T.sub.4, T.sub.5, T.sub.6 and, more particularly, four of the transistors T.sub.1, T.sub.2, T.sub.5, T.sub.6. As recognized and understood by those skilled in the art, for a given resistor type, the reference current I.sub.S will generally increase with increasing temperature. For low power applications, however, this current I.sub.S can be critical to the design and performance of the application. For example, when used with the design and operation of a low power crystal oscillator, during low temperature conditions the performance of dividers and a level shifter of the associated circuit can deteriorate due to little or no current being supplied to the oscillator.

FIGS. 2-3, on the other hand, illustrate an integrated circuit 10 having a low power, temperature compensated, current source according to the present invention which advantageously provides a current source for low power applications which generates a high current even at low temperatures. As perhaps best illustrated in FIG. 2, the integrated circuit 10 preferably has current generating means 20 responsive to a supply voltage, e.g., V.sub.cc for generating a first reference current I.sub.S and temperature compensating voltage control signal generating means 30 responsive to the supply voltage V.sub.cc for generating a temperature compensated voltage control signal during temperature variations. Bias controlling means 40 is responsive to the current generating means 20 and connected to the temperature compensating voltage controlling means 30 for biasingly controlling the temperature compensating voltage controlling means 30. Current output controlling means 50 is responsive to the current generating means 20 and the temperature compensated voltage control signal for controlling a second temperature compensated reference current I.sub.O so as to generate a high output source current I.sub.O even during low temperature conditions.

As illustrated in more detail in FIG. 3, the current generating means 20 is preferably provided by a first current source 21 which includes a cascading current mirror circuit connected to a supply voltage V.sub.CC. The cascading current mirror circuit has three pairs of field effect transistors T.sub.1, T.sub.2, T.sub.3, T.sub.4, T.sub.5, T.sub.6. One of the pairs of field effect transistors T.sub.1, T.sub.2 has a first conductivity type, e.g., PMOS, and two of the pairs of field effect transistors T.sub.3, T.sub.4, T.sub.5, T.sub.6 have a second conductivity type, e.g., NMOS. The current generating means 20 further includes a field effect transistor T.sub.7 connected to the gates of the first pair of field effect transistors T.sub.1, T.sub.2. This transistor T.sub.7 preferably has the same conductivity type, i.e., PMOS, as the first pair for providing the first reference current or reference current I.sub.S. A field effect transistor T.sub.8 is also connected to the gates of a third pair of the field effect transistors T.sub.5, T.sub.6 and has the same conductivity type, i.e., NMOS, of this third pair of transistors for providing a first sinking current I.sub.SINK1. The current generating means 20 also has a resistor R, e.g., about 2 M.OMEGA., connected to the source of the transistor T.sub.6 which also indicates a voltage V.sub.R across the resistor R.

As also illustrated in FIG. 3, the temperature compensating voltage control signal generating means 30 is preferably provided by a temperature compensating voltage controlling circuit 31 connected to the supply voltage V.sub.CC. The temperature compensating voltage controlling circuit 31 is preferably arranged so that the voltage control signal, which biases at least one output transistor T.sub.15, i.e., from the supply voltage V.sub.CC to the gate of T.sub.15, as described in further detail herein below, decreases as temperature increases above a predetermined threshold. The temperature compensating voltage controlling circuit 31 also inhibits the voltage control signal from being initiated or turns off the output transistor T.sub.15 as temperature decreases below the predetermined threshold.

The temperature compensating voltage controlling circuit 31 in the illustrated embodiment includes a plurality of bipolar transistors Q.sub.1, Q.sub.2, Q.sub.3, Q.sub.4, Q.sub.5. Each of the plurality of bipolar transistors Q.sub.1, Q.sub.2, Q.sub.3, Q.sub.4, Q.sub.5 are preferably formed in a common well, e.g., a P-well as illustrated or an N-well as understood by those skilled in the art. Each of the bipolar transistors Q.sub.1, Q.sub.2, Q.sub.3, Q.sub.4, Q.sub.5 has a collector connected to the supply voltage V.sub.CC and has an emitter connected to the bias controlling means 40.

More specifically, the temperature compensating voltage controlling circuit 31 as illustrated has five bipolar transistors Q.sub.1, Q.sub.2, Q.sub.3, Q.sub.4, Q.sub.5. These bipolar transistors Q.sub.1, Q.sub.2, Q.sub.3, Q.sub.4, Q.sub.5 preferably are n-p-n vertical bipolar transistors so that the integrated circuit can still be a straight CMOS design. Bipolar transistors may be preferable for the circuit because the base-to-emitter voltages are more stable. A first transistor Q.sub.1 of the five bipolar transistors Q.sub.1, Q.sub.2, Q.sub.3, Q.sub.4, Q.sub.5 also has a base connected to the supply voltage V.sub.CC. Each of the bases of the other four bipolar transistors are connected to the emitter of the preceding bipolar transistor.

This temperature compensating voltage controlling circuit 31 advantageously has a negative temperature coefficient, e.g., about -2 mV/.degree.C. This, for example, advantageously allows the output biasing voltage to decrease as temperature increases above a predetermined threshold. This predetermined threshold, for example, can range from -20.degree. C. to +20.degree. C. depending on the process and can generally depend on the threshold voltage V.sub.T of the circuit or the selected transistors of the circuit. The temperature compensating voltage controlling circuit 31 also advantageously inhibits the output biasing voltage by turning off or not biasing the first output transistor T.sub.15 of the current output controlling means 50 as temperature decreases below the predetermined threshold.

The bias controlling means 40 is preferably provided by a bias control circuit which has a plurality of field effect transistors, preferably provided by the five transistors T.sub.9, T.sub.10, T.sub.11, T.sub.12, T.sub.13 as illustrated in FIG. 3. Each of the plurality of field effect transistors T.sub.9, T.sub.10, T.sub.11, T.sub.12, T.sub.13 has a drain connected to the temperature compensating voltage controlling means 30,and a gate connected to at least one of the gates of at least one, i.e., T.sub.5, T.sub.6 of the pairs of field effect transistors T.sub.1, T.sub.2, T.sub.3, T.sub.4, T.sub.5, T.sub.6 of the cascading current mirror circuit. More particularly, the drain of each of the five field effect transistors T.sub.9, T.sub.10, T.sub.11, T.sub.12, T.sub.13 of the bias controlling circuit is preferably connected to a respective emitter of the five bipolar transistors Q.sub.1, Q.sub.2, Q.sub.3, Q.sub.4, Q.sub.5 of the temperature compensating voltage control circuit for biasing the respective bipolar transistors as illustrated.

The current output controlling means 50 is preferably provided by a current output control circuit which controls the temperature compensated reference current I.sub.O. The current output control circuit includes a first output field effect transistor T.sub.15 which has the gate thereof connected to the temperature compensating voltage controlling means 30, e.g., to the emitter of the bipolar transistor Q.sub.5, and the bias controlling means 40, e.g., to the drain of the field effect transistor T.sub.13. The first output transistor T.sub.15 is responsive to the output biasing voltage received from the temperature compensating voltage controlling means 30 as illustrated. This first output transistor T.sub.15 also has the second conductivity type, e.g., NMOS. A second output field effect transistor T.sub.14 has the gate thereof connected to the gate of one of the first pair T.sub.1, T.sub.2 of the three pairs of transistors of the cascading current mirror circuit so as to form a current mirror therewith.

The second output transistor T.sub.14 has the first conductivity type, e.g., PMOS, and the source of this second output field effect transistor T.sub.14 is connected to the drain of the first output field effect transistor T.sub.15. The gate of the second output transistor T.sub.14 is connected to the gate of one of the field effect transistors T.sub.1 of the cascading current mirror circuit so that the second output transistor T.sub.14 forms a current mirror with this transistor T.sub.1.

A third output field effect transistor T.sub.16 of the output controlling circuit has the gate thereof connected to the gate of one of the third pair T.sub.5 of the three pairs of transistors T.sub.1, T.sub.2, T.sub.3, T.sub.4, T.sub.5, T.sub.6 of the cascading current mirror circuit so as to advantageously form a current mirror therewith. The third output transistor T.sub.16 also has the second conductivity type, e.g., NMOS, or the same conductivity type as the first output transistor T.sub.15. The drain of the third output field effect transistor T.sub.16 is connected to the source of the first output field effect transistor T.sub.15.

The current output control circuit further includes fourth and fifth output field effect transistors T.sub.17, T.sub.18. The fourth and fifth output transistor T.sub.17, T.sub.18 preferably have the same conductivity type, e.g., NMOS, and have the gates thereof respectively connected to each other, e.g., in a current mirror configuration. The fifth output field effect transistor T.sub.18 preferably provides a second sinking current I.sub.SINK2 along the drain thereof as illustrated.

The drain of the fourth output field effect transistor T.sub.17 is preferably connected to the respective drain and source of the first and second output field effect transistors T.sub.15, T.sub.14 so that the second temperature compensated reference current I.sub.O flows toward the drain of the fourth output field effect transistor T.sub.17 as illustrated by the arrow. In the design of this integrated circuit 10 of the present invention, more current was advantageously sacrificed at the current source stage instead of increasing overall current to obtain the same low temperature performance. The new current reference or temperature compensated current reference I.sub.O generally has a maximum value at the first reference current I.sub.S and a minimum value of less than the first reference current I.sub.S, e.g., 85% of I.sub.S. The minimum value, for example, can be selectively determined based upon the transistor size. Under high temperature conditions, as well as low voltage threshold V.sub.T corner or high battery voltage as understood by those skilled in the art, the voltage from the temperature compensating voltage control circuit and the first current source is high enough to make both the first output transistor T.sub.15 and the third output transistor T.sub.16 turn on.

Advantageously, in essence, the current output control means 50 preferably includes at least one output transistor T.sub.15 which provides a temperature compensated reference current output I.sub.O, when the temperature is above the predetermined threshold. When the temperature falls below the predetermined threshold, however, the at least one output transistor T.sub.15 will be turned off and the second reference current I.sub.O will mirror the first reference current I.sub.S during these low temperature conditions. In other words, the temperature compensating voltage control signal generating means 30 preferably has a first operating state where the voltage control signal decreases as temperature increases above a predetermined threshold and a second operating state where the voltage controlling means 30 is disabled as temperature decreases below the predetermined threshold so that the second reference current mirrors the first reference current as the high output current during low temperature conditions.

For example, during low temperature operation, as well as high voltage threshold V.sub.T corner or low battery voltage as understood by those skilled in the art, the first output transistor T.sub.15 is turned off, and the current at the fourth output transistor T.sub.17, i.e., I.sub.O, is advantageously the same as the current at the second output transistor T.sub.14 which mirrors with the current at the transistor T.sub.1 of the first current source which is significantly more temperature dependent. This, in essence, provides the same reference current or high output current I.sub.O even at low temperatures. If, on the other hand, the first output transistor T.sub.15 is turned on, the output reference current I.sub.O will be approximately the current I.sub.T14 at the second output transistor T.sub.14 minus the current I.sub.T16 at the third output transistor T.sub.16 so that the output reference current I.sub.O is more effectively temperature compensated.

FIG. 4 illustrates simulated performance results of an integrated circuit 10 having a temperature compensated reference current I.sub.O and using a SPICE simulation software program as understood by those skilled in the art. The graphical diagram shows a normalized current reference I.sub.N, i.e. , I.sub.O(at temperature T) /I.sub.O(at 25 degrees Centigrade), versus temperature T. The reference current without temperature compensation I.sub.S is illustrated in solid lines, the temperature compensated reference current I.sub.O at a low voltage threshold is illustrated in dotted lines, and the temperature compensated reference current I.sub.O at high voltage threshold is illustrated in dashed lines.

As illustrated in FIGS. 2-4, the present invention also includes methods of supplying current for low power applications. A method of supplying current for low power applications according to the present invention preferably includes generating a reference current I.sub.S responsive to a supply voltage V.sub.CC and generating a temperature compensated voltage control signal during temperature variations by decreasing the voltage control signal when temperature increases above a predetermined threshold and inhibiting the voltage control signal, e.g., so as to turn off at least one output transistor T.sub.15, when temperature decreases below the predetermined threshold so as to generate a high output source current I.sub.O, e.g., which is a mirror of the reference current I.sub.S during low temperature conditions (see, e.g., FIG. 4). The method can also include the generating of the reference current I.sub.S by mirroring current through a cascading current mirror circuit connected to the supply voltage V.sub.CC.

Another method according to the present invention preferably includes generating a first reference current responsive to a supply voltage V.sub.CC and generating a temperature compensated voltage control signal during temperature variations. A second temperature compensated reference current is controlled responsive to the temperature compensated voltage control signal so as to generate a high output source current even during low temperature conditions.

The method can also include the temperature compensated voltage control signal being generated by decreasing the voltage control signal when temperature increases above a predetermined threshold and inhibiting the voltage control signal when temperature decreases below the predetermined threshold. The generating of the output source current can include mirroring current through a cascading current mirror circuit connected to the supply voltage V.sub.CC.

The method can further include biasingly controlling the temperature compensating voltage controlling circuit during temperature variations so as to maintain the high output source current during low temperature conditions. Advantageously, the first reference current can be provided from a first output current source so as to control a first portion of another circuit, and the second temperature compensated reference current can be provided from a second output current source so as to control a second portion of another circuit.

In low power applications, for example, an integrated circuit 10 and methods of the present invention advantageously allows a relatively high current flow even during low temperature conditions where the performance of the application, e.g., a crystal oscillator, would otherwise be expected to deteriorate due to little or no current being supplied to the application. In accomplishing the functions and performance of the present invention, the integrated circuit 10 is advantageously designed for straight CMOS integrated circuit design which will thereby provide all of the advantages of CMOS, e.g., low power, as understood by those skilled in the art. As also understood by those skilled in the art, although the integrated circuit 10 and methods illustrated can advantageously be used and has been described with reference to low power clock or low power crystal oscillator circuit design, the present invention can advantageously be used in various other applications where low power is an important design criteria and where the temperature variations can impact the performance of the desired application.

Another advantage of an integrated circuit 10 and methods of the present invention is that the integrated circuit 10 and methods provide two reference currents I.sub.S, I.sub.O instead of only one reference current I.sub.S. This can advantageously be used, for example, where the series resistance within a crystal oscillator is normally proportional to temperature. The higher the series resistance of the oscillator, the more current is needed for performance. Therefore, the first or original current reference I.sub.S, can be used to control the oscillator gain stage, and the temperature compensated current reference I.sub.O can be used to control other portions of the circuitry such as dividers and level shifters. In essence, with the same battery or supply current at room temperature, the operation temperature range of a crystal oscillator can be extended by using the integrated circuit 10 and methods of the present invention.

In the drawings and specification, there have been disclosed a typical preferred embodiment of the invention, and although specific terms are employed, the terms are used in a descriptive sense only and not for purposes of limitation. The invention has been described in considerable detail with specific reference to these illustrated embodiments. It will be apparent, however, that various modifications and changes can be made within the spirit and scope of the invention as described in the foregoing specification and as defined in the appended claims.