Optical Data Recording Circuit for a Photographic Camera

The invention relates generally to the field of photography, and in particular to a circuit for optically imprinting data on photographic film in a camera.

It is known to operate a photographic camera in such a way that the camera user can select different aspect ratios of prints to be produced from exposed image frames on the film. It is desirable to record data on the film associated with each image frame which indicates this print aspect ratio for each respective frame. This recorded data can then be read appropriately at the photoprinter to automatically set the print conditions that will produce a print with the selected aspect ratio. The data may be magnetically recorded on a magnetic layer formed on the film or optically as a latent image marks exposed on the film emulsion. In a recently proposed photographic system, the print aspect ratio data is recorded as one or more latent image blips, colloquially referred to as fat bits, along the margin of the film adjacent each exposed image frame. Such a system is illustrated in FIG. 3 which shows a film strip 80 having spaced apart pairs of perforations 81,83 which delineate regularly spaced image regions F on the film strip. Within the image regions F, a sequence of exposed image frames 82 are shown in dotted outline with the respective different print aspect ratios shown by solid lines. Frame 82H has an aspect ratio of approximately 1:2, similar to that of a high definition television image; frame 82P has an elongated panoramic aspect ratio of approximately 1:3; and frame 82L has the aspect ratio of 2:3 found in present day 35 mm film formats. In the proposed system, defined zones along the film margin, indicated by dotted outlines 84, are reserved for recording of the latent image fat bits. As illustrated in the drawing, the absence of any recorded fat bits indicates a 1:2 print aspect ratio frame 82H. A single recorded fat bit in the zone 84 indicates a panoramic print aspect ratio frame 82P; and a pair of fat bits in the zone indicates a 2.times.3 print aspect ratio frame 82L.

When using optical data recording of fat bits on film, it is desirable to use light emitting devices (LED) as opposed to, for example, incandescent devices because of the comparatively lower cost of LED devices. One difficulty with the use of LED's is that they require a minimum voltage energy source to operate, typically 1.8 v to 2.2 v. In more expensive cameras that typically use 3 v lithium batteries, this is not a problem. Lower cost cameras are common that use a single AA battery that produces 1.5 v, the currently popular single use camera being a typical example of such. There is a need, therefore, to provide an energy source to operate light emitting devices that have voltage source requirements exceeding the 1.5 v battery voltage levels typically encountered in low cost cameras.

In accordance with the invention therefore, there is provided an optical data recording circuit for use in a flash camera of the type having an energy supply circuit, a flash tube, a flash charge storage capacitor and a flash trigger circuit with a sync switch, wherein the data recording circuit comprises light emitting means for exposing images on photographic film in the camera and selection means for selectively exposing said light emitting means to said film to form latent image data bits on the film. The recording circuit further comprises an energy supply control circuit coupled to said light emitting means and to said flash charge storage capacitor and being responsive to closure of said sync switch for applying stored charge energy from said flash capacitor to said light emitting means to generate light emission for recording data bits on the film. Preferably, the light emitting means comprises one or more LED's and the energy supply control circuit comprises a constant current source circuit to maintain a constant current through the LED's irrespective of the voltage applied thereto from the flash capacitor.

These and other aspects, objects, features and advantages of the present invention will be more clearly understood and appreciated from a review of the following detailed description of the preferred embodiments and appended claims, and by reference to the accompanying drawings.

In the drawings:

FIG. 1 is a circuit diagram of a camera flash circuit and of an optical data recording control circuit of the present invention;

FIG. 2 is a diagramatic illustration of a single use camera in which the present invention is particularly useful;

FIG. 3 is an illustration of a film strip showing image frames of differing aspect ratios along with optically recorded data indicating the respective aspect ratios.

FIG. 4 is an alternative embodiment of the data recording circuit of the invention; and

FIG. 5 is another alternative embodiment of the data recording circuit of the invention.

Referring now to the drawings, a preferred embodiment of the optical data recording circuit invention is depicted in FIG. 1 for use in an inexpensive, single use camera 10 as shown in FIG. 2. The camera includes a body 14, a taking lens 16, a shutter actuating button 18 and flash charging button 19, a viewfinder 20 and a flash device 22 including a flash tube 24. The camera body 14 is adapted to receive and locate photographic film in a predetermined exposure position relative to the other camera components. Shutter actuator button 18 initiates a sequence which exposes the film through optical system 16 with supplemental illumination from flash device 22. Button 19 initiates a flash charging cycle prior to the exposure sequence. The camera is pointed at the intended subject with the aid of viewfinder 20. A switch 21 is provided for selection by the camera user of image frame aspect ratio data to be recorded on the film as will be described in more detail below.

Referring now specifically to FIG. 1, there is shown a flash circuit 12, of known configuration, along with the optical data recording circuit 26 of the invention. The flash circuit 12 includes a flash energy supply circuit 28, a flash charge capacitor 30, a flash trigger circuit 32 and flash tube 24. Flash energy supply circuit 28 comprises a battery 35, a self-oscillating flash charging circuit 34, and an oscillation arresting circuit 36. A neon indicator bulb 38 provides a visual indication of when charge capacitor 30 has reached a sufficiently high charge to operate the flash tube 24.

Operation of the self-oscillating charging circuit 34 begins when flash charging button is depressed. This effects closing of momentary switch 42, thereby establishing current flow from battery 35 through resistor 44 to the bases of high gain transistors 46 and 48 thereby initiating current flow through the primary winding of charging transformer 50. The induced stepped up voltage in the secondary winding of transformer 50 is fed back to the base of transistor 46 to continue the current flow in the primary winding. When the transformer saturates, the current flow in the secondary winding reverses turning off the base current in transistor 46 thereby completing a cycle of oscillation. Noise in the base of transistor 46 caused by the changing field in the secondary of transformer 50 is sufficient to initiate conduction in transistor 46 thereby starting the cycle over again. Transistors 46 and 48 provide enough loop gain to sustain the oscillations whether momentary switch 42 is open or closed. The oscillatory current flow in the secondary of transformer 50 is rectified by diode 51 and charges the flash charge capacitor to a negative voltage at terminal 53.

Charging of flash charge capacitor 30 continues iuitil the self oscillation of circuit 34 is terminated by the operation of oscillation arresting circuit 36 which includes 110 v zener diode 52 and PNP transistor switch 54. When the voltage across capacitor 30 reaches -270 v at terminal 53, neon ready light 38 begins to conduct, illuminating the ready light and providing notification to the user there is sufficient charge on flash capacitor 30 to initiate an exposure sequence. When neon light 38 conducts, the voltage drop thereacross falls to 220 v leaving a voltage of -70 v at terminal 55. Charging of capacitor 30 continues until the voltage at terminal 53 reaches -330 v. When the flash capacitor 30 is thus fully charged, zener diode 52 begins to conduct, applying current to the base of transistor 54, thereby switching transistor 54 on. This grounds the base of transistor 46 in the self-oscillating charging circuit 34 thereby arresting the self oscillations and terminating further charging of capacitor 30.

Flash triggering circuit 32 is conventional and its operation is well known. Briefly, the circuit 32 includes a triggering capacitor 60, transformer 62, a flash tube triggering electrode 64 and a flash sync switch 66. In operation, sync switch 66 is closed by the camera shutter mechanism at the proper time in the exposure sequence. Capacitor 60 discharges through the primary windings of transformer 62, inducing a high voltage on triggering electrode 64 which ionizes the gas in flash discharge tube 24. Flash capacitor 30 then discharges through the flash tube 24, exciting the gas and producing the desired flash illumination. A high valued isolation resistor 65 is provided to maintain the dc charge voltage across trigger capacitor 60 at the same level as flash charge capacitor 30 while minimizing current drain on capacitor 30 during the flash trigger operation.

Having described the flash circuit 12, there will now be described the optical data recording circuit 26 of the invention. Circuit 26 comprises light emitting means, including series connected LED's 70a,70b and switch means 21, for selectively recording latent image data on photographic film in the camera 10. Switch means 21 is provided with switches 72 and 74 connected across the LED's such that one, both or none of the LED's is shunted via selective closure of the switches. As shown in FIG. 1, when both switches are open, neither LED is shunted while closure of switch 72 shunts LED 70a and closure of switch 74 shunts both LED's 70a and 70b. The LED's are connected at one end via input terminal 76b to the normally open contact 66a of sync switch 66 and at the other end via transistor 90, resistor 94 and input terminal 76a to terminal 53 at the charge potential side of flash capacitor 30. A 12 v zener diode 78 is coupled across resistor 94 and the base-emitter junction of transistor 90 to form a constant current source for the LED's. A current bypass resistor 92 is coupled from the base of transistor 90 to input terminal 76b. In operation, when sync switch 66 is closed, input terminals 76a,76b of circuit 26 are coupled directly across flash capacitor 30 to momentarily apply the charge voltage from the capacitor to the circuit 26. Current flows through resistor 92 and zener diode 78, establishing a fixed 12 v bias potential at the base of transistor 90 with respect to terminal 76a. This fixed bias potential establishes a constant collector-emitter current through transistor 90 and resistor 94 which is independent of the voltage on flash capacitor 30. This constant current flows through one, both or neither of the LED's dependent on the setting of the switches 72,74 in switch means 21. Since sync switch 66 is closed only momentarily, on the order of 100 milliseconds, the discharge current diverted from flash capacitor 30 through data recording circuit 26 is negligible and does not interfere with flash operation. Moreover, the use of the flash capacitor 30 as a voltage source for the data recording circuit is valid even when there is insufficient charge voltage on the capacitor to fire the flash tube 24 since, after a flash event, there is a residual voltage across the capacitor of approximately 50 v. Furthermore, it takes days for the flash capacitor voltage to bleed down. In practice, with the 12 v zener diode, a voltage from the flash capacitor 30 of as little as 10 volts applied to input terminals 76a,76b would be sufficient to provide enough current through the diode into the base of transistor 90 to initiate a flash of light emission from the LED's 70a,70b. Also, when the flash capacitor charging circuit 28 is first started, the capacitor 30 has enough voltage built up in less than one second for operation of the data recording circuit 26 even following long periods of non-use in which the flash capacitor has bled down to a zero charge voltage.

FIG. 4 shows an alternative embodiment of the data recording circuit utilizing a single LED 70. The selection of the optically recorded data bits on the film 80 is made by a modified switch means 21' comprising a two aperture mask 100 and a movable mask selector slide 102 which may be coupled to the exterior slide switch 21 (FIG. 2). The remainder of the data recording circuit is the same as that described above.

FIG. 5 is yet another embodiment of the data recording circuit utilizing dual LED's 70a,70b similar to the circuit of FIG. 1. The switch means 21" differs however in utilizing a three position switch 104 to provide the selective recording of the fat bits on the film.

It will be appreciated that what has been described is a low cost optical data recording circuit that accomplishes the necessary selective optical recording data bits on film with a minimum of low cost components and that takes advantage of an existing energy source in the camera, i.e. the flash capacitor, without modification and without degradation of flash operating performance.

The invention has been described with reference to a preferred embodiment. However, it will be appreciated that variations and modifications can be effected by a person of ordinary skill in the art without departing from the scope of the invention.