Background of the Invention
1. Field of the Invention
This invention relates to electrical devices used to minimize oscillations in electrical circuits. More specifically this invention relates to capacitive devices used to eliminate or minimize oscillations in the power source of high frequency CPU's relative to ground which are incorporated into the circuit near or on the integrated circuit socket.
2. Description of Related Art
The related art is replete with various electrical devices used for filtering electrical lines and terminating electrical signal paths to eliminate reflection and undesirable signals in electrical circuits, including computer circuits. In particular, CPU power and ground traces coupled by discrete capacitors which filters unwanted high frequency signals to ground. However, as CPU cycles and therefore frequencies increase, the physical dimensions of traces on circuit boards becomes a limiting factor and causes inductance to appear in the circuit. This inductance interferes with the ability of the capacitor to filter unwanted signals to ground. That is, the effective resistance in series with the capacitor increases with a resulting degradation of the capacitor's ability to filter such signals as frequency increases. As a result the CPU may and often does experience data faults due to fluctuations in the power source which changes the threshold levels for the bit signals being processed by the CPU causing loss of data through erroneous signal level evaluation.
The related art has placed discrete capacitors across the voltage and ground pins on circuit board traces remote from the socket and in some cases beneath the CPU socket primarily in an attempt to conserve circuit board real estate. However, the length of the leads of the capacitor to the point of connection relative to the CPU pins also results in unwanted inductance at high CPU cycles because the length of the leads is extended by the electrical conductive paths in the socket and the CPU connecting pins or electrodes.
The instance invention provides a capacitor filter incorporated into the CPU socket with an electrical connection to the voltage and ground connecting pins or electrodes of a CPU being as short as is possible. This reduces the conductive lead distance between the entry point in the CPU at both the voltage and ground connection and the capacitive element to a minimum and minimizes interference in the CPU power source.
Summary of the Invention
The instant invention is carrier in the form of a mylar film, for carrying a plurality of capacitors, which is insertable into an integrated circuit socket and electrically coupled to the voltage and ground connecting pins or electrodes of the integrated circuit inserted into the socket. This places the capacitive element in as close a proximity to the entry point into the integrated circuit as is possible and provides electrical coupling between the voltage and ground connecting pins of the CPU. The reduced lead distance between the entry point in the CPU at both the voltage and ground connections and the capacitive element minimizes interference in the power source caused by induction in high frequency electrical circuits. The instant invention is particular useful in minimizing electrical interference in the voltage applied to CPU by incorporating the capacitive element directly into the CPU socket so that it is electrically coupled between the voltage pin and the ground pin of the CPU in close proximity to the CPU integrated circuit.
The object of this invention is to provide an a plurality of capacitors for filtering unwanted oscillations in the power source applied to central processing units.
Another object of this invention is to provide a convenient apparatus for adding capacitive filters to electrical circuits.
Another object of this invention is to provide a carrier for a plurality of integrating or filtering capacitors which holds the capacitors in a desired physical relationship for connection between respective voltage and ground connecting pins.
Other objects will be readily apparent to those skilled in the art and the scope of this invention is not limited by the foregoing.
Brief Description of the Drawings
FIG. 1 is a perspective view of a typical CPU socket.
FIG. 2A is an enlarged view of a portion of the base of the socket showing the connectors.
FIG. 2B is an exploaded view of the upper section of the CPU socket and the base.
FIG. 3 is a top view of an CPU Integrated Circuit Socket with row and column designations.
FIG. 4B is top down view of the mylar film carrying a plurality of capacitors.
FIG. 4A is a view of the voltage and ground pin holes with electrically conductive surfaces.
FIG. 5 is a top down view of the CPU socket base without the upper section thereof removed.
FIG. 6 is a bottom up view of the upper section of the CPU socket showing recesses.
Description of the Preferred Embodiment(s)
FIG. 1 shows integrated circuit CPU Socket 1 having a base 2, and an upper section 3. The upper section 3 has a plurality of pinholes 4 (not all of which are provided with the reference numeral (4) for clarity). A handle 5 is provided which shifts the position of the upper section 3 relative to the base 2 and locks the connecting pins of the CPU chip into position.
Most CPU sockets 1 are formed from at least an upper section 3 and a base 2 as shown in FIG. 2 which are then snapped together. The base carries the socket connecting pins or electrodes 6 in the holes 4 of the base. The particular CPU socket used in the example of this invention is a P54C socket for an Intel PENTIUM processor or equivalent. Many other socket configurations of various sizes and shapes are available for different integrated circuit chips and this invention is not limited to the PENTIUM processor or equivalent. Each CPU integrated circuit has a unique pin position which is set forth in the specifications of the pinout for the particular CPU. In this example, the pinouts of the V.sub.cc and V.sub.ss connecting pins for the Intel PENTIUM processor or equivalent are shown in the Tables I and II respectively set forth below.
The various CPU connecting pins and the pin holes on the CPU socket are designated by a alphanumeric code. In this particular case, the Intel P54C pinout is characterized by numerals from 1-37 and alpha designations from A-H, J-N, P-Z, AA-AH, and AJ-AN for 37 alpha designations. With reference to FIG. 3, the numeric designations looking down from the top are as follows numeral (1) designates the first column of connecting pins and the numeral (37) designates the last column on the far left. The alpha character (A) designates the first row of pin holes beginning at the bottom to the alpha character (AN) designates the last row at the top. Accordingly, the pin hole designated as reference numeral 9 on the lower right hand side of FIG. 3 designates pinhole C1 by this nomenclature. As shown on FIG. 3, this socket has fifty three V.sub.cc or voltage pin holes 7 and fifty three V.sub.ss or ground pin holes 8, spaced about the periphery of the socket which correspond to the V.sub.cc and V.sub.ss connecting pins of the CPU. In operation, these connecting pins are electrically isolated and no filter protection is provided at the CPU connecting pins. Integrating capacitor filtering of the power source is often performed on the circuit board or in some cases below the socket 1 in order to conserve printed circuit board real estate. However, as the CPU cycles increase as pointed out above, long leads represented by the current state of the art creates an unwanted inductance which interferes with the ability of the capacitors to reduce interference on the supply voltage connecting pins V.sub.cc.
This has been resolved in the instant invention by providing a plurality of capacitors, each of which is electrically coupled between respective voltage, V.sub.cc connecting pins 7 and ground, V.sub.ss connecting pins 8 of the socket at or near the pin entrance into the CPU. This is accomplished by as shown in FIG. 4, by mounting these capacitors on a carrier which is a mylar film 10 having a plurality of holes 11 (not all are designated with the numeral (11) for clarity) which correspond to the pins of the CPU and the holes in the socket. The dimensions of the mylar film 10 are such that in will fit within the dimensions of the CPU socket 1. As shown in FIG. 4 and FIG. 4A, the holes at the V.sub.cc connecting pins 7 and V.sub.ss connecting pins 8 are provided with a electrically conductive surfaces 13 about the periphery thereof and up to the edge and through the hole such that when a connecting pin is inserted into the hole electrical contact is established between the pin and the electrically conductive surface 13. Each capacitor 12 is mounted on the mylar film and electrically connected to the electrically conductive surface 13 of the mylar film 10 at the pin holes 7 for voltage, V.sub.cc and the pinholes 8 for ground, V.sub.ss capacitive coupling is thereby established between each V.sub.cc hole and a nearby V.sub.ss hole as shown in FIG. 4.
The capacitors 12 are mounted between each pair of V.sub.cc pinholes 7 and V.sub.ss pinholes 8 and connected to the conductive material 13 attached to the mylar film 10. However, certain of the V.sub.cc connecting pins 7 and V.sub.ss connecting pins 8 do not have closely matching pairs as determined from the pinout tables. This leaves V.sub.ss connecting pins 14 near the top and to the left of FIG. 4 without respective connections to a nearby V.sub.cc pin 7. The unmatched V.sub.cc 15 connecting pins are connected to their nearest ground pin 8 in order to minimize lead length. This means that certain V.sub.cc connecting pins 7 will be sharing ground connecting pins 8. In this particular example, at least 3 unmatched V.sub.cc connecting pins 15 will be sharing ground connecting pins 8 as shown on the left side of FIG. 4.
The capacitors 12, typically in the range of 1 microfarad for a 100 Hz CPU are thereby electrically coupled between the voltage pinhole V.sub.cc 7 and the ground pinhole V.sub.ss 8.
The mylar film 10 shown in FIG. 4 is not conductive and is sufficiently thin so that it may be sandwiched between the upper section 3 and the base 4 of the CPU socket 1. Capacitors 12 size should be selected so as to permit insertion of the capacitors 12 between socket holes as shown in the FIG. 4. While the capacitors 12 in today's technology products are quite small, they still have a relatively significant physical size which does not permit them to be readily inserted between the upper section 3 and the base 2 of the socket 1 as with the mylar film 10. Accordingly, the upper section 2 of the socket 1 will not be able to close into its position over the base 2 of the socket 1 without providing appropriate recesses to accommodate the capacitors 12. It should be noted that as CPU design changes the number and disposition of the various connecting pins will vary and different arrangements of the capacitors 12 and possibly the shape of the mylar film carrier will be required. In FIG. 5, a view of the base 2 of the socket 1 as viewed from above is shown. The base 2 is usually used to house the socket connecting pins the upper portion of which receive the corresponding connecting pins of the CPU. As socket size increases, recesses may be provided in the base for the capacitors. In FIG. 5, the socket 1 base 2 has a plurality of rectangular recess 16 in the upper surface thereof for receiving said capacitors 12. These recesses 16 are of sufficient size for receiving the volume of the capacitors 12 mounted on the mylar film 10. Since the mylar film 10 is flexible, the action of snapping the upper portion 3 on to the base 2 of the socket 1 will force the capacitors 12 into the recesses 16 in the base 2. Subsequent operation of the socket arm will lock the CPU in place and force the connecting pins into electrical engagement with the electrical conductive regions 13 on the mylar film 10 and the capacitors 12 which are in electrical communication therewith. Alternatively, the capacitors 12 can be mounted on the bottom of the mylar film 10 and will then insert directly into the recesses 16. The size of the recesses 16 must be configured to accommodate the volume of the capacitors 12 and the mylar film 10 or the capacitors 12 alone if mounted on the bottom of the mylar film 10. Often due to size constraints there may not be sufficient physical space between connecting pins on the top of the base 2 in which case the recesses 16 may be provided in the upper section 3 of the socket 1. FIG. 6 shows a bottom view of the upper section 3 of the socket 1 with the recesses 16 provided in the bottom of the upper portion 3 of the socket 1. However, in this view the recesses 16 are in mirror image from those recesses shown in FIG. 5 and is an alternative preferred embodiment. In fact, no recesses whatsoever is required where the mylar film 10 is mounted directly on the connecting pins of the CPU integrated circuit itself before mounting on the CPU socket 1. In that way, the CPU connecting pins or electrodes would be in direct contact with the capacitors 12 and no recesses would be required in the CPU socket 1. However, to ensure that the capacitors 12 are always in place, it is preferred to have them mounted inside the CPU socket 1 structure in close proximity to the pinholes 7 and 8 so they cannot be inadvertently removed or omitted. Finally it should be recognized that while discrete capacitors 12 are discussed in the preferred embodiment, the scope of this invention includes capacitive elements which may be deposited on the mylar film 10 directly along with the conductive elements 13.