Texture Filter Apparatus for Computer Graphics System

The following patents and patent applications are commonly assigned to the assignee of this application and contain subject matter related to the subject matter of this application:

1. Patent application Ser. No. 08/598,522, entitled, "Virtual Coordinate To Linear Physical Memory Address Converter For Computer Graphics System," filed for Erh-Chia Wang, Wei-Kuo Chia, and Chun-Yang Cheng on even date herewith;

2. Patent application Ser. No. 08/598,520, entitled, "Blending Apparatus for Computer Graphics System," filed for Jan-Han Hsiao, Wei-Kuo Chia and Chun-Kai Huang on even date herewith;

3. Patent application Ser. No. 08/598,523, entitled, "A Mip Map/Rip Map Texture Linear Addressing Memory Organization and Address Generator," filed for Ruen-Rone Lee, Chun-Kai Huang and Wei-Kuo Chia on even date herewith;

4. U.S. Pat. No. 5,422,657, entitled, "A Graphics Memory Architecture For Multi-mode Display System," filed for Shu-Wei Wang, Wei-Kuo Chia, Chun-Kai Huang and Chun-Chie Hsiao on Sep. 13, 1993;

5. U.S. Pat. No. 5,321,425, entitled, "Resolution Independent Screen Refresh Strategy," filed for Wei-Kuo Chia, Jiunn-Min Jue, Gen-Hong Chen and Chih-Yuan Liu on Feb. 19, 1992;

6. U.S. Pat. No. 5,268,682, entitled, "Resolution Independent Raster Display System," filed for Wen-Jann Yang, Chih-Yuan Liu and Bor-Chuan Kuo on Oct. 7, 1991; and

7. U.S. Pat. No. 5,268,681, entitled, "Memory Architecture With Graphics Generator Including A Divide By Five Divider," filed for Cheun-Song Lin, Bor-Chuan Kuo and Rong-Chung Chen on Oct. 7, 1991.

The above listed patents and patent applications are incorporated herein by reference.

The present invention relates to computer graphics systems which can perform three-dimensional (3D) rendering. In particular, the present invention relates to drawing texture on the surfaces of 3D objects which are displayed on a display device.

FIG. 1 depicts a conventional computer system 10. The computer system 10 has a processor 12, a main memory 14, a disk memory 16 and an input device 18, such as a keyboard and mouse. The devices 12-18 are connected to a bus 20 which transfers data, i.e., instructions and information, between each of these devices 12-18. A graphics controller 30 is also connected to the bus 20. As shown, the graphics controller 30 includes a drawing processor 32. The drawing processor 32 is also connected to an address generator 36 and a data input of a frame buffer 34. The address generator 36, in turn, is connected to RAS (row address select), CAS (column address select) and chip select inputs of the frame buffer 34. Illustratively, the frame buffer 34 is implemented with plural VRAMs (video random access memories) or DRAMS (dynamic random access memories). The frame buffer 34 is connected to a display device 38, such as a cathode ray tube (CRT) or liquid crystal display (LCD) monitor.

The drawing processor 32 receives instructions from the processor 12 for drawing objects. For instance, in the case of a computer aided design (CAD) application, the processor 12 may receive user input regarding creating and locating objects in 3-D space. The processor 12, in turn, transfers instructions regarding the size, location, texture, translucence, etc. of such objects to the drawing processor 32. In response, the drawing processor 32 creates a pixel image representation of a plane of view of such objects in 3-D space. The pixels of the image of each plane of view form part of a frame that is stored by the drawing processor 32 in the frame buffer 34. Several drawing processors 32 are known, such as is disclosed in U.S. Pat. Nos. 5,046,023 and 5,185,856. The latter reference discloses a drawing processor that is specifically adapted for rendering 3-D objects.

A computer system 10 capable of performing 3-D rendering advantageously "maps" texture onto the rendered object. The mapping of texture onto objects is well known and is not discussed in detail herein. See U.S. Pat. No. 5,222,205; L. Williams, Pyramidal Parametrics, ACM COMPUTER GRAPHICS, vol. 17, no.3 p. 1-11 (1983); and W. NEWMAN & R. SPROULL, PRINCIPLES OF INTERACTIVE COMPUTER GRAPHICS, 2d ed., p. 389-410. Suffice it to say that the texture pattern may be considered a renderable source texture surface which is to be mapped onto a destination object surface. The object thus formed may then be mapped onto the destination plane of view.

Such mapping is very computation intensive. As noted in the above-noted Williams article, such mapping may require sampling the texture data in a fashion which is suited to the view of the surface of the destination object. That is, the visibility of the texture detail on the object surface depends on how close or how far the object surface is located in 3-D space from the plane of view. As the plane of view is brought closer to the object surface, more texture detail is visible. As the plane of view is moved away from the object surface, less texture detail is visible.

To reduce the amount of computation involved in mapping texture when the object is moved closer or farther from the plain of view, the Williams article proposes to initially provide subsamplings of the textured data. This is illustrated in FIG. 2. As shown, the texture data is stored in 2-D data arrays. The texture data in each array is indexed, i.e., addressed with 2-D virtual address coordinates (u,v), i.e., one in each direction U and V. The texture data consists of RGB data including one fixed length data unit (e.g., byte) for each color red (R), green (G) and blue (B) per point of texture data. The R data is stored in array 61, the G data is stored in array 62 and the B data is stored in array 63. As per the Williams memory storage scheme, the array 64 is used for storing subsampled versions of the RGB data. For instance, subarray 71 of array 64 stores a 1/2 subsampling in both the U and V directions of the R data of array 61. Likewise, subarray 72 stores a 1/2 subsampling in both the U and V directions of the G data of array 62. Subarray 73 stores a 1/2 subsampling in both the U and V directions of the B data of array 63. The subsampling process is then carried out again in subarray 74 which has subarrays 81, 82 and 83 which contain 1/4 subsamplings in both the U and V directions of the R,G, and B data of arrays 61, 62 and 63, respectively. Likewise, subarrays 91, 92 and 93 of subarray 84 contain 1/8 subsamplings in both the U and V directions of the R,G and B data arrays 61, 62 and 63, respectively. This subsampling is carried out until one texture data per color is obtained. This data structure 51 is referred to as a "mip map." In a mip map 51, the full scale RGB data (in arrays 61, 62 and 63) is said to be subsampled at level d=0, the 1/2 subsampled RGB data (in arrays 71, 72 and 73) is said to be subsampled at level d=1, and so on. In general, the 2.sup.-d subsampled data is said to be subsampled at level d.

In order to map texture data onto an object, the appropriate level RGB texture data array is used. Alternatively, if the object surface size is between two arrays that are subsampled at levels d and d+1, a bilinear interpolation between the texture data of the two data arrays is used. The mip map scheme therefore provides a relatively low computation manner of mapping texture onto an arbitrary sized object surface.

Consider now the case where the object is both displaced away from, and rotated with respect to, the plane of view. The mip map can still be used to map texture on to the object surface. However, because the object surface has rotated, the interpolated texture values produced using the mip map may produce aliasing or blurring artifacts in the image. To remedy this problem, U.S. Pat. No. 5,222,205 proposes a modified data structure referred to as a "rip map." A rip map 52 is illustrated in FIG. 3. Illustratively, the rip map 52 shown in FIG. 3 is for the R texture data. Therefore, a rip map for the G and B data would also be provided.

The rip map 52 has a full scale data array 61' including one R value for each pixel of the object surface. Like the mip map 51, the rip map 52 also includes plural subsampled versions of the full scale data array 61'. However, the subsampled arrays of the rip map 52 need not be sampled in each direction U and V the same. For instance, data array 62' is 1/2 subsampled only in the direction U. Data array 63' is 1/4 subsampled only in the direction U. Data array 64' is 1/8 subsampled only in the direction U, and so on. Likewise, data array 65' is 1/2 subsampled only in the direction V, data array 66' is 1/4 subsampled only in the direction V and data array 67' is 1/8 subsampled only in the direction V. The rip map contains other permutations of subsampling, such as data array 75' which is 1/2 subsampled in the direction U and 1/8 subsampled in the direction V. Two levels of subsampling (du,dv) are therefore used to designate a specific data array. The following table summarizes the assignment of levels to the subsampled data arrays:

The rip map 52 provides more choices in subsampled data for use in the interpolation. This tends to reduce the aforementioned aliasing and blurring artifacts.

Desirably, RGB texture data is supplemented with alpha data A to form RGBA data for each pixel. The A data may indicate, for instance, the property of "translucence" or the amount of incident light that can pass through the object. For instance, suppose an object models a green lens which passes 80% of the light incident thereon. If such a lens is placed in front of other objects in the background with respect to the plane of view, then the occluded pixels of the objects should have a blended color. In particular, the occluded object pixels should have a color which is 80% of their original color and 20% of the color of the green lens.

Whether or not one or two data arrays of the mip map or rip map are used, the dimensions of the object surface onto which the texture data is to mapped generally do not exactly equal those of the data arrays. Thus, some process must be provided for selecting amongst the color values of each texture data point of a mip map or rip map data array. For instance, as shown in FIG. 4, a point X on an object surface with non-integral coordinates (u.sub.x,v.sub.x) relative to the data array is at some location in the vicinity of texture data points (u.sub.0,v.sub.0), (u.sub.1,v.sub.0), (u.sub.0,v.sub.1) and (u.sub.1,v.sub.1) of a texture array. According to one technique, the nearest data point, i.e., (u.sub.0,v.sub.0), is selected and the color value of this texture data point (u.sub.0,v.sub.0) is mapped onto the object surface data point X. According to a second technique, a linear interpolation is formed from the color values of each of the four texture data points (u.sub.0,v.sub.0), (u.sub.1,v.sub.0), (u.sub.0,v.sub.1) and (u.sub.1,v.sub.1) based on the distance of the object surface point X to each of these texture data points. To that end, a trilinear process is utilized to determine the interpolated color texture data value. Suppose the horizontal component of the distance from (u.sub.x,v.sub.x) to (u.sub.0,v.sub.0) or (u.sub.0,v.sub.1) is W.sub.u and the vertical component of the distance from (u.sub.x,v.sub.x) to (u.sub.0,v.sub.0) or (u.sub.1,v.sub.0) is W.sub.v. As such, the horizontal component of the distance from (u.sub.x,v.sub.x) to (u.sub.1,v.sub.0) or (u.sub.1,v.sub.1) is 1-W.sub.u and the vertical component of the distance from (u.sub.x,v.sub.x) to (u.sub.0,v.sub.1) or (u.sub.1,v.sub.1) is 1-W.sub.v. Note that because the distance between u.sub.0 and u.sub.1 and between v.sub.0 and v.sub.1 is 1, both W.sub.u and W.sub.v are fractional values less than 1. Using simple linear interpolation, the interpolated color value can be determined from the following three equations:

where:

C.sub.0 is the (e.g., R,G,B, or A) color value of the point (u.sub.0,v.sub.0),

C.sub.1 is the (e.g., R,G,B, or A) color value of the point (u.sub.1,v.sub.0),

C.sub.2 is the (e.g., R,G,B, or A) color value of the point (u.sub.0,v.sub.1),

C.sub.3 is the (e.g., R,G,B, or A) color value of the point (u.sub.1,v.sub.1),

C.sub.i is the color of an interpolated texture data point (u.sub.x, v.sub.0) between the texture data points (u.sub.0,v.sub.0) and (u.sub.1,v.sub.0),

C.sub.j is the color of an interpolated texture data point (u.sub.x,v.sub.1) between the texture data points (u.sub.0,v.sub.1) and (u.sub.1,v.sub.1), and

C is the interpolated color value to map onto the point X.

Note that there are actually four total processes for determining the color value from mip map or rip map data arrays to map onto each object surface point, depending on whether the nearest point is used and whether one or two data arrays of the mip map or rip map are used. These are as follows:

(a) Nearest mip map or rip map with nearest color texture data selection: A single mip map or rip map data array is used and the color value of the nearest texture data point to each object surface point is selected;

(b) Nearest mip map or rip map with linear interpolative color texture data selection: A single mip map or rip map data array is used and the color value is interpolated using the trilinear process described above;

(c) Bilinear interpolative mip map or rip map with nearest color texture data selection: Two mip map or rip map data arrays are used and the color value of the nearest data point to each object surface point is selected from each of the two data arrays. This produces two color values (one from each data array). The final color value is a simple linear interpolation between the two color values based on the normalized linear distance of the object surface point to each selected texture data point. For instance, suppose the scaler distance to the nearest point in the first data array is W.sub.d1 and the scaler distance to the nearest point in the second data array is W.sub.d2. The normalized distances are W'.sub.d1 =W.sub.d1 /(W.sub.d1 +W.sub.d2) and W'.sub.d2 =W.sub.d2 /(W.sub.d1 +W.sub.d2). Note that W'.sub.d2 =1-W.sub.d1. If the color value of the nearest point in the first data array is C.sub.a1 and the color value in the second data array is C.sub.a2, then the color value to be mapped onto the object surface point is:

(d) Bilinear interpolative mip map or rip map with linear interpolative color texture data selection: Two mip map or rip map data arrays are selected. The interpolated color value in each data array is selected using equations (1)-(3) of the above described trilinear process. The two interpolated color values are then combined using equation (4). Note that the normalized distance W'.sub.d1 is the same as the normalized distance W'.sub.d2 in this case, namely, 1/2.

In each of the interpolation processes (b)-(d) described above, the interpolation is performed by multiplying at least two color values by a respective fractional number and then by adding the two sums together. Such operations prove to be cumbersome and time consuming for most drawing processors 32 (FIG. 1) since they are floating point operations which consume a relatively large number of cycles to perform. This is disadvantageous in the computer system 10, since such long processing reduces the ability to produce real-time 3D rendering, which is required in, for example, flight simulation applications, computer generated animation and moving pictures, virtual reality applications and certain real-time CAD/CAM applications.

It is therefore an object of the present invention to overcome the disadvantages of the prior art.

This and other objects are achieved by the present invention. According to one embodiment, a process is provided for obtaining an interpolated texture color value C.sub.r from two texture color values C.sub.ri and C.sub.rj for mapping onto an object surface point. The object surface point is a distance 1-W from one color value C.sub.ri and a distance W from the other color value C.sub.rj, wherein W is a binary decimal number that is less then 1 with a precision of n bits. The process includes the step of obtaining a value W'=.O slashed.2.sup.n-1 .multidot.W.epsilon slash., where ".O slashed.x.epsilon slash." means the ceiling of x or the rounded value of x. Each of the texture color values C.sub.ri and C.sub.rj are multiplied by each integer from 0 to 2.sup.n-1 to produce 2.sup.n-1 products for each texture color value C.sub.ri and C.sub.rj. The product of C.sub.ri with 2.sup.n-1 -W' and the product of C.sub.rj with W' are selected in response to the value W'. These two products (2.sup.n-1 -W')C.sub.ri and W'.multidot.C.sub.rj are added together to produce the sum (2.sup.n-1 -W')C.sub.ri +W'.multidot.C.sub.rj. The sum is then divided by 2.sup.n-1 to produce the interpolated color value C.sub.r.

Thus, according to the process, the binary decimal W is treated as an integer with n-1 bits. This is mathematically equivalent to multiplying both sides of equations (1)-(4) above by 2.sup.n-1. Therefore, to obtain thee final color value, the sum of the products should be divided by 2.sup.n-1. Illustratively, this is done by right-shifting the bits of the sum, wherein only the integer part of the right-shifted result specifies the final color, since color is assumed to be an integral value.

According to another embodiment, an apparatus is provided for producing an interpolated color value C.sub.r from two texture color values C.sub.ri and C.sub.rj. A circuit is provided for producing the value W'=.O slashed.2.sup.n-1 .multidot.W.epsilon slash.. Illustratively, this circuit may be an adder that receives the n most significant bits of W and adds the bit 1 to the n.sup.th bit of W. A second circuit is provided for producing the product of each color value C.sub.ri and C.sub.rj with each integer from 0 to 2.sup.n-1. A multiplexer is provided, which receives the values W' and 2.sup.n-1 -W' and which selects the products (2.sup.n-1 -W').multidot.C.sub.ri and W'.multidot.C.sub.rj. An adder is provided for adding together the products (2.sup.n-1 -W').multidot.C.sub.ri and W'.multidot.C.sub.rj to produce the sum (2.sup.n-1 -W').multidot.C.sub.ri +W'.multidot.C.sub.rj. A right-shifter circuit is provided for dividing the sum produced by the adder by 2.sup.n-1 to produce the final color value C.sub.r.

Illustratively, the circuit for producing products is formed from n-1 parallel left-shifter circuits and a transfer circuit. The left-shifter circuits receive an inputted color value, such as the color value C.sub.ri, and output n-1 products 2.sup.1 .multidot.C.sub.ri, 2.sup.2 .multidot.C.sub.ri, . . . , 2.sup.n-1 .multidot.C.sub.ri in parallel. These products represent the multiplication of the texture color value C.sub.ri with the integers 2, 4, 8, 16, . . . , 2.sup.n-1 (which are all powers of 2). The transfer circuit receives these n-1 products, the texture color value C.sub.ri (representing the product of C.sub.ri with 1) and 0 and selectively adds, for example, with plural adder circuits, to produce the other products of the texture color value C.sub.ri with the integers 3,5,6,7,9,10,11,12,13,14,15, . . . 2.sup.n-1 -1 (which are all non-powers of 2). For instance, the product of the texture color value C.sub.ri with the integer 3 may be produced by adding together the products of 1.multidot.C.sub.ri and 2.multidot.C.sub.ri.

The present invention therefore provides for efficiently producing interpolated color values using few clock cycles. As a result, the invention dramatically speeds up texture mapping so that texture mapping may be employed in real-time applications.

FIG. 1 shows a conventional computer system.

FIG. 2 illustrates a conventional mip map.

FIG. 3 illustrates a conventional rip map.

FIG. 4 illustrates a the selection of texture color data for mapping onto an object surface point.

FIG. 5 shows a computer system according to the present invention.

FIG. 6 shows a texture color value interpolator according to an embodiment of the present invention.

FIG. 7 shows a texture color value interpolator according to a second embodiment of the present invention.

FIG. 5 depicts a computer system 100 according to an embodiment of the present invention. As before, the computer system includes a processor or CPU 112, a main memory 114, a disk memory 116, an input device 118, a bus 120, and a graphics processor 130. The graphics processor 130 includes a drawing processor 132, a frame buffer 134, an address generator 136 and a texture color interpolator 200. A display device 138 is also connected to the frame buffer 134. As before, the drawing processor 132 receives instructions, and information (stored in the main memory 114 or disk memory 116) regarding objects in 3-D space. The drawing processor 132 renders such objects in 3-D space, i.e., draws pixel representations of the images of the objects and then maps texture onto the surface of each object. In mapping texture onto object surfaces, the drawing processor 132 utilizes the texture color interpolator 200 to interpolate texture color values. The images thus produced are stored in frames of the frame buffer 134. The frames in the frame buffer are then displayed on the display device 138.

FIG. 6 depicts the texture color interpolator 200 according to one embodiment of the invention which forms an interpolated texture color C.sub.r from two texture colors C.sub.ri and C.sub.rj. The texture colors C.sub.ri and C.sub.rj may be the texture colors associated with particular texture data points C.sub.i and C.sub.j of mip map or rip map data arrays, as per equations (1) and (2) above. Alternatively, the texture colors C.sub.ri and C.sub.rj, themselves, may be interpolated texture colors at interpolated texture data points C.sub.i and C.sub.j, respectively, formed from texture colors of particular texture data points in mip map or rip map arrays, as per equation (3) above. Without loss of generality, the texture color C.sub.r is said to be formed for an object surface point that is a distance W from a texture data point C.sub.i and 1-W from the texture data point C.sub.j whether C.sub.i and C.sub.j are data points of a mip map or rip map data array, having colors C.sub.ri or C.sub.rj, respectively, or interpolated texture data points C.sub.i and C.sub.j for which interpolated colors C.sub.ri and C.sub.rj have been formed.

The texture color interpolator 200 has an adder circuit 210 which receives an n bit number W', where n is an integer .gtoreq.2. Illustratively, the number W' is provided by the drawing processor 132 (FIG. 5). The value W' is formed from the distance W between an object surface point (onto which texture is to be mapped) to a texture data point (e.g., C.sub.j) of one of the colors (e.g., C.sub.rj) to be interpolated. The n bits of the number W' are treated as including n-1 (most significant bits) of an integer portion of W.multidot.2.sup.n-1 and one (least significant bit) representing a decimal portion of W.multidot.2.sup.n-1. For sake of convenience, it is presumed that the texture color interpolator 200 operates on 12 bit values. As such, the value W' may be a 12 bit value with the n bits occupying bit positions 11:12-n. The adder 210 adds W with a binary number `0.1` (1/2 in base ten). For instance, the adder 210 may receive as a second input an n bit number with binary digit 0 in each of the n-1 most significant bit positions and 1 in the least significant bit position. Again, assuming that 12 bit values are used, the bits 11:12-n and 11-n:0 are set to `0` and the bit 12-n is set to `1`. The sum thus produced is outputted from the adder 210. In this fashion, the adder 210 rounds the number W' to produce .O slashed.W'.epsilon slash..

The rounded value of W' produced by the adder 210 is received in a subtractor circuit 220. The subtractor circuit 220 subtracts W' from 2.sup.n-1. The difference (2.sup.n-1 -W') thus produced is inputted to a first input of a multiplexer 230 labeled `00`. A second input of the multiplexer 230 labeled `01` receives the rounded value of W', namely, .O slashed.W'.epsilon slash.=.O slashed.W.multidot.2.sup.n-1 .epsilon slash., produced by the adder 210. The n bit value `00...0` is received at a third input of the multiplexer 230 labeled `1x` (where x means "don't care"). (Assuming 12 bit values, the third input receives a value with bits 11:12-n set to `0`.) The multiplexer 230 receives a signal MUX2 for selecting as an output one of the three values inputted to inputs labeled 00, 01 and 1x. Illustratively, the signal MUX2 is generated by the drawing processor 132 (FIG. 5).

The value m(n-1:0) selected by the multiplexer 230 is outputted to a product circuit 240. As shown, the product circuit 240 includes n-1 shifter circuits 250-1, 250-2, . . . , 250-(n-1), a transfer circuit 260 and a second multiplexer 270. Each of the shifter circuits 250-1 to 250-(n-1) receives, e.g., from the drawing processor 132 (FIG. 5), a texture color value, e.g., C.sub.rj, in parallel. The shifter circuit 250-1 left-shifts the texture color value C.sub.rj one bit position, the shifter circuit 250-2 left-shifts the texture color value C.sub.rj 2 bit positions, . . . , and the shifter circuit 250-(n-1) left shifts the texture color value C.sub.rj n-1 bit positions. The shifter circuits 250-1 to 250-(n-1) output, in parallel, the products 2.multidot.C.sub.rj, 4.multidot.C.sub.rj, . . . , 2.sup.n-1 .multidot.C.sub.rj. That is, the shifter circuit 250-1 outputs the product 2.multidot.C.sub.rj, the shifter circuit 250-2 outputs the product 4.multidot.C.sub.rj, etc.

The transfer circuit 260 receives the products 2.multidot.C.sub.rj, 4.multidot.C.sub.rj, . . . , 2.sup.n-1 .multidot.C.sub.rj outputted by the shifter circuits 250-1 to 250-(n-1), the inputted texture color value C.sub.rj (representing the product of 1 and the texture color value C.sub.rj) and the least significant bit m(0) outputted from the multiplexer 230. The transfer circuit 260 produces each product of the texture color C.sub.rj with the integers 0,1,2,3 . . . , 2.sup.n-1, i.e., 0, C.sub.rj, 2.multidot.C.sub.rj, 3.multidot.C.sub.rj, . . . , 2.sup.n-1 .multidot.C.sub.rj, in parallel. To that end, the transfer circuit 260 illustratively has plural adder circuits which selectively add together the received values 2.multidot.C.sub.rj, 4.multidot.C.sub.rj, . . . , 2.sup.n-1 .multidot.C.sub.rj and C.sub.rj to produce the products of C.sub.rj with non-powers of 2. For instance, to produce 3.multidot.C.sub.rj, an adder may be provided for adding together the received values C.sub.rj and 2.multidot.C.sub.rj. To produce 6.multidot.C.sub.rj and adder may be provided for adding together 2.multidot.C.sub.rj and 4.multidot.C.sub.rj, etc. Illustratively, the transfer circuit 260 also has a logical AND gate 265 which receives the value 2.sup.n-1 .multidot.C.sub.rj at one input and the complement of the least significant bit m(0) outputted from the multiplexer 230. The role of the AND gate 265 is discussed in greater detail below.

Each of the products of 1,2, . . . , 2.sup.n-1 -1 with the inputted texture color C.sub.rj, namely, C.sub.rj, 2.multidot.C.sub.rj, 3 C.sub.rj, . . . , (2.sup.n'1 -1).multidot.C.sub.rj, are outputted from the transfer circuit 260 in parallel. In addition, either the product 2.sup.n-1 .multidot.C.sub.rj or the product 0.multidot.C.sub.rj is also outputted in parallel with the other products, depending on whether the bit m(0) is `0` (in which case 2.sup.n-1 .multidot.C.sub.rj is outputted) or `1` (in which case 0.multidot.C.sub.rj is outputted). Each product outputted by the transfer circuit 260 is received as a selectable input at the multiplexer 270. The multiplexer 270 also receives as a selection control input the n-1 most significant bits m(n-1:1) selected by the multiplexer 230. Depending on the selection control input, the multiplexer 270 selects one of the products inputted thereto for output. The following table summarizes which product is selected depending on the value of m(n-1:1):

The correspondence of the rounding of W' and the product selected is explained by way of example. Consider the case where W' has n=3 bits w.sub.2 w.sub.1.w.sub.0. There are eight possible values which these bits can take on, namely: `00.0`, `00.1`, `01.0`, `01.1`, `10.0`, `10.1`, `11.0`, and `11.1` designating eight possible distances W, namely, `.000`, `.001`, `.010`, `.011`, `.100`, `.101`, `.110`, and `.1.11` from the texture data point whose color value is to be weighted by the distance W'. After rounding, the eight possible values of W' are, in the order of smallest to greatest: `00.1`, `01.0`, `01.1`, `10.0`, `10.1`, `11.0`, `11.1` and `00.0` (with a carry out of 1). The closer the object surface point (u.sub.x,v.sub.x) is to a point, the greater the weighting which is used. Note, however, that the weighting W indicates how close the object surface point (u.sub.x,v.sub.x) is to the data point whose color is C.sub.ri. Thus, the weighting is proportional to W' for the color C.sub.rj. For n=3, there are five possible weightings for the color C.sub.ri, namely, 0.multidot.C.sub.rj, 1.multidot.C.sub.rj, 2.multidot.C.sub.rj, 3.multidot.C.sub.rj, 4.multidot.C.sub.rj (because 2.sup.n-1 =2.sup.3-1 =2.sup.2 =4). The weightings are assigned to the rounded values of W' as follows: 4.multidot.C.sub.rj is assigned to `00.0`, 1.multidot.C.sub.rj is assigned to `01.0` and `01.1`, 2.multidot.C.sub.rj is assigned to `10.0` and `10.1`, 3.multidot.C.sub.rj is assigned to `11.0` and `11.1` and 0.multidot.C.sub.rj is assigned to `00.1`. An inspection of these assignments reveals that the first two bits of the rounded value of W' is sufficient for selecting the appropriate weighting for C.sub.rj in all cases except for distinguishing `00.0` from `00.1`. In fact, m(n-1:1) selects the product m(n-1:1).multidot.C.sub.rj. In the latter case, the complement of the least significant bit is fed to the logic AND gate 265 for selecting 0 when the least significant bit is `1` and for selecting 4.multidot.C.sub.rj when the least significant bit is `0`. Note that the same relationships hold true for the distance 2.sup.n-1 -W=4-W which is used for weighting the color C.sub.ri, except that the selected product equals (2.sup.n-1 -m(n-1:1)).multidot.C.sub.i.

The product selected by the multiplexer 270 is outputted in parallel to two latch circuits 282 and 284. The latch circuit 282 receives a strobe signal L0 and the latch circuit 284 receives a strobe signal L1, for example, from the drawing processor 132 (FIG. 5). By generating the appropriate strobe signal L0 or L1, the selected product can be stored in the latch 282 or the latch 284. The latch 282 can also be cleared by a signal CLR0 which may be generated, for example, by the drawing processor 132 (FIG. 5).

The values stored in the latches 282 and 284 are outputted to an adder 290 which produces the sum of the values stored therein. The sum is outputted to a divider circuit 295 which divides the received sum by 2.sup.n-1. Illustratively, the divider circuit 295 is simply a shifter which right-shifts the received sum n-1 bits. The quotient thus produced is outputted to a third latch 286. The third latch 286 also receives a strobe signal L2, for example, from the drawing processor 132 (FIG. 5). In this fashion, the drawing processor 132 (FIG. 5) can cause the quotient outputted from the divider 295 to be stored in the latch 286 at the appropriate time.

The operation of the texture color interpolator 200 is now briefly described by four examples below. The examples are explained using mip maps. However, each example applies equally to rip maps.

Nearest Mip Map, Nearest Color Texture Data Selection

In this example, the drawing processor 132 (FIG. 5) first outputs the signal CLR0 to clear the latch 282 to 0. The drawing processor 132 (FIG. 5) outputs the color of the nearest mip map data array C.sub.a to the circuit 250. The drawing processor 132 (FIG. 5) also outputs the MUX2 signal `1x` to the multiplexer 230. In response, the multiplexer 230 outputs the n bit signal 2.sup.n-1. This causes the multiplexer 270 to select the product of 2.sup.n-1 with the inputted color C.sub.a, i.e., 2.sup.n-1 .multidot.C.sub.a. The drawing processor 132 (FIG. 5) outputs the strobe signal L1 for causing the product 2.sup.n-1 .multidot.C.sub.a to be stored in the latch 284. On the next cycle, the adder 290 adds the values stored in the latches 282 and 284, namely 0 and 2.sup.n-1 .multidot.C.sub.a to produce the sum 2.sup.n-1 .multidot.C.sub.a. This sum is then divided by 2.sup.n-1 in the divider 295. The quotient C.sub.a thus produced is inputted to the third latch 286. The drawing processor 132 (FIG. 5) outputs the strobe signal L2 for storing the color value C.sub.a in the latch 286. This color signal C.sub.a is outputted on the next cycle from the texture color interpolator 200 to, for example, the drawing processor 132 (FIG. 5).

Nearest Mip Map, Linear Interpolative Color Selection

In this example, the drawing processor 132 (FIG. 5) uses only a single texture data array of the mip map. However, the object surface point (u.sub.x,v.sub.x) is near four data points (u.sub.0,v.sub.0) with color value C.sub.0, (u.sub.1,v.sub.0) with color value C.sub.1, (u.sub.0,v.sub.1) with color value C.sub.2 and (u.sub.1,v.sub.1) with color value C.sub.3. (As above, the object surface data point (u.sub.x,v.sub.x) is a horizontal distance W.sub.u from (u.sub.0,v.sub.0) and (u.sub.0,v.sub.1) and a vertical distance W.sub.v from (u.sub.0,v.sub.0) and (u.sub.1,v.sub.0).) The drawing processor 132 (FIG. 5) uses the texture color interpolator 200 to determine the interpolated color C.sub.i from C.sub.0, C.sub.1 and W.sub.u, as per equation (1). The drawing processor 132 (FIG. 5) then uses the texture color interpolator 200 to determine the interpolated color C.sub.j from C.sub.2, C.sub.3 and W.sub.u as per equation (2). Finally, the drawing processor 132 (FIG. 5) uses the texture color interpolator 200 to determine C from C.sub.i, C.sub.j and W.sub.v. Below, the determination of C.sub.i from C.sub.0, C.sub.1 and W.sub.u is discussed in detail. The discussions of determining C.sub.j and C are omitted since they are analogous to the discussion of determining C.sub.i.

On a first cycle, the drawing processor 132 (FIG. 5) outputs as W' the first n bits of W.sub.u with `0` bits appended as the least significant bits of W'. For sake of clarity, this value is referred to as W.sub.u '. W.sub.u ' is received at the adder 210 which adds the binary value `0.1` (i.e., a value with a zero in each of the n-1 most significant bit positions and a one in the least significant bit position) thereto to round W.sub.u '. The drawing processor 132 (FIG. 5) outputs as the MUX2 signal `01` for selecting the rounded value of W.sub.u '. The first n bits of W.sub.u ' are outputted from the multiplexer 230 as the signal m(n-1:0). The drawing processor 132 (FIG. 5) also outputs the texture color C.sub.1 of the point (u.sub.0,v.sub.1) (which is located at a horizontal distance 1-W.sub.u from the object surface point (u.sub.x,v.sub.x)). The shifter circuits 250-1 to 250-(n-1) output the products 2.multidot.C.sub.1, 4.multidot.C.sub.1, . . . , 2.sup.n-1 .multidot.C.sub.1. The transfer circuit 260 receives the products 2.multidot.C.sub.1, 4.multidot.C.sub.1, . . . , 2.sup.n-1 .multidot.C.sub.1 and outputs the products 1.multidot.C.sub.1, 2.multidot.C.sub.1, 3.multidot.C.sub.1, . . . , (2.sup.n-1 -1).multidot.C.sub.1. Furthermore, depending on the least significant bit of the signal outputted from the multiplexer 230, namely, m(0), the transfer circuit 260 outputs either 0 or 2.sup.n-1 .multidot.C.sub.1. In response to the signal m(n-1:0), the multiplexer 270 selects the product W.sub.u '.multidot.C.sub.1. The drawing processor 132 (FIG. 5) outputs the strobe signal L0 for storing the product W'.multidot.C.sub.1 in the latch 282.

On the next cycle, the drawing processor 132 (FIG. 5) outputs the same W' based on W.sub.u to the adder 210. The adder outputs W.sub.u ' to the subtractor 220. The subtractor 220 outputs 2.sup.n-1 -W.sub.u '. The drawing processor 132 (FIG. 5) outputs the MUX2 signal `00` for selecting the difference 2.sup.n-1 -W.sub.u ' as the signal m(n-1:0).

The drawing processor 132 (FIG. 5) outputs the color C.sub.0 to the circuit 250. The above-noted signal m(n-1:0) (carrying the value 2.sup.n-1 -W.sub.u ') selects the product (2.sup.n-1 -W.sub.u ').multidot.C.sub.0 for output. The drawing processor 132 (FIG. 5) outputs the strobe signal L1 to cause the latch 284 to store the product (2.sup.n-1 -W.sub.u ').multidot.C.sub.0.

On the next cycle, the adder 290 receives the products W.sub.u '.multidot.C.sub.1 and (2.sup.n-1 -W.sub.u ').multidot.C.sub.0 and adds them together to produce the sum W.sub.u '.multidot.C.sub.1 +(2.sup.n-1 -W.sub.u ').multidot.C.sub.0. This sum is outputted to the divider circuit 295 which divides the sum by 2.sup.n-1 to produce the interpolated color value C.sub.i. The drawing processor 132 (FIG. 5) outputs the strobe signal L2 for storing the interpolated color value C.sub.i in the latch 286.

On the next cycle, the drawing processor 132 (FIG. 5) reads out the interpolated color value C.sub.i from the latch 286. The drawing processor 132 (FIG. 5) repeats similar steps to generate the interpolated color value C.sub.j as per equation (2). Then the drawing processor 132 (FIG. 5) repeats similar steps to generate the interpolated color value C as per equation (3).

Bilinear Interpolative Mip Map, Nearest Color Selection

The processing is analogous to the generation of interpolated color C.sub.i from C.sub.0, C.sub.1 and W.sub.u. In this case, however, only a single interpolated color is formed from the color C.sub.a1 of the nearest data point in the first mip map data array and the color C.sub.a2 of the nearest data point in the second mip map data array as per equation (4). In this case, the distance outputted from the drawing processor is the normalized distance W'.sub.d1 to the nearest point in the first data array with the color C.sub.a1.

Bilinear Interpolative Mip Map, Linear Interpolative Color Selection

Here, the interpolated color is determined in each of the two mip map data arrays as described above. The two interpolated colors are then averaged in an analogous fashion to determining the interpolated color C.sub.i as described above using a distance of W'=1/2.

Note that according to the trilinear process (equations (1)-(3)), The object surface point is presumed to fall between four points of a mip map or rip map data array. Generally speaking, a two bit accuracy, with an additional third guard bit, (i.e., n=3 bits) is usually sufficient for describing the distance W.sub.u or W.sub.v for purposes of interpolating texture colors. FIG. 7 shows an embodiment of a texture color interpolator circuit 300 for n=3 bits. As shown, the circuit 300 has corresponding parts to the texture color interpolator 200. The circuit 300 has an adder 310 which adds 001 to the inputted distance W'›11:9!. The subtractor 320 forms the difference 2.sup.n-1 -W'=2.sup.3-1 -W'=2.sup.2 -W'=4-W'. The multiplexer 330 outputs a three bit signal m(2:0). The product circuit 340 has n-1=3-1=2 shifters 350-1 and 350-2 for producing the products 2.multidot.C.sub.ri and 4.multidot.C.sub.ri, respectively. The transfer circuit 360 includes an adder 362 for adding an inputted color C.sub.ri to 2.multidot.C.sub.ri to produce 3.multidot.C.sub.ri. The logical AND gate 365 responds to the complement of the bit m(0) for outputting either 0.multidot.C.sub.ri or 4.multidot.C.sub.ri. The multiplexer 370 selects one of the products, in response to the signal m(2:1) and stores the selected product in one of the latches 382 or 384. The adder 390 adds the products stored in the latches to produce a sum, and the divider 395 divides the sum thus produced by 2.sup.-1 =2.sup.3-1 2.sup.2 =4 (by right-shifting the sum two bits). The latch 386 stores the resulting interpolated color for output.

In short, a process and apparatus are disclosed for obtaining a texture color value C.sub.r for an object surface point from two texture color values C.sub.ri and C.sub.rj (which themselves may be interpolated texture color values), of texture data points C.sub.i and C.sub.j, respectively. The object surface point is a distance W from the texture data point C.sub.i and a distance 1-W from the object surface point C.sub.j, where W is an n-bit value. The process includes the steps of multiplying each of the texture colors C.sub.ri and C.sub.rj by each integer from 0 to 2.sup.n -1 to produce 2.sup.n -1 products for each color. The product of C.sub.ri with 2.sup.n-1 -W' and the product of C.sub.rj with W' are selected from these produced products, where W' is the rounded product of W and 2.sup.n-1. The two selected products are added together to produce the sum (2.sup.n-1 -W').multidot.C.sub.ri +W'.multidot.C.sub.rj, and the sum thus produced is divided by 2.sup.n-1 to produce the interpolated color. The apparatus for producing the interpolated color uses integer arithmetic for producing the texture color and can operate in a pipelined fashion.

Finally, the above-description is intended to be merely illustrative. Those having ordinary skill in the art may devise numerous alternative embodiments without departing from the spirit and scope of the following claims.