US 5,664,987 AGrant
Methods and Apparatus for Control of Polishing Pad Conditioning for Wafer Planarization
Issue Date:1997-09-09
•20 Claims
•10 Drawing Sheets
Abstract
A method and apparatus for determining the amount of conditioning required to be applied to a polishing pad to achieve a desired removal rate during the polishing of a semiconductor wafer utilizes a rotating conditioning wheel in contact with a rotating polishing pad. Preselected points on just polished wafers are measured for removal rate and such measurements are used to calculate the removal rate as a function of wafer radius. When the removal rate changes by a preselected amount, the polishing pad is conditioned in accordance with the calculations.
Metadata
Assignee
- National Semiconductor Corporation
Inventor
- Peter Henry Renteln
Application Information
Application Number:US 7078269
Filing Date:1996-09-04
Priority Date:1994-01-31
Art Unit:323
Classifications
IPC:
B24B 4900
Field of Search:
4515;21;41;56;444;443;287
Patent Drawings (10 sheets)
Description
A portion of the disclosure of this patent document contains material which is subject to copyright protection. The copyright owner, National Semiconductor Corporation, has no objection to the facsimile reproduction by anyone of the patent disclosure, as it appears in the Patent and Trademark Office patent files or records, but otherwise reserves all copyright rights whatsoever.
Field of the Invention
The present invention relates to semiconductor wafer processing and, more specifically, to methods and apparatus for the control of polishing pad conditioning.
Description of Related Art
Integrated circuit manufacturing relies upon a process known as chemical-mechanical planarization ("CMP") to substantially smooth or polish a top layer or surface of a silicon wafer. In the fabrication of integrated circuits, typically, aluminum or another metal is deposited upon a silicon wafer and then patterned to form interconnect paths. These interconnect paths are then insulated with a deposited oxide layer, and this oxide layer is abraded to smooth its surface. In addition, such planarization is also utilized to smooth or polish the "poly layer," that is, the first insulating layer which is deposited after the transistors of an integrated circuit are formed within the wafer but before the deposit of the first metal layer.
As detailed in U.S. Pat. No. 5,216,843, POLISHING PAD CONDITIONING APPARATUS FOR WAFER PLANARIZATION PROCESS, which patent is hereby incorporated by reference, and as illustrated in FIG. 1 hereof, a CMP apparatus 10 polishes a wafer 12 which is positioned face down and in firm contact, under pressure, with a rotating polishing pad 14 which is mounted to a rigid platen 16. The wafer 12 is also rotated either about an axis coincident with its own center or offset from its own center, but not coincident with the axis of rotation of the polishing pad 14. A pH adjusted abrasive slurry 18 is delivered to the pad surface through a pipe 20. As a result of the rotating contact and abrasion between the polishing pad 14 of a top layer 22 of the wafer 12, oxide on the top layer 22 is removed thereby planarizing the top layer 22. The rate of this removal is closely proportional to the pressure applied to the wafer 12. In addition, the rate of removal depends upon the topography of the top layer 22, as higher features (i.e., features extending further from the wafer surface) are abraded faster than lower features, since the higher features are subject to greater pressure.
In further detail, the wafer 12 is secured to a cushion 24, which in turn is mounted onto a rotating platen 26. The platen 26 is rotated by a shaft 28 which is driven by a motor which is not illustrated.
One difficulty with the use of CMP is control of the process, that is maintaining the oxide removal rate constant across the top surface 22 of the wafer 12 as well as maintaining a constant oxide removal rate from one wafer to the next, when wafers are processed in succession. One known method of adjusting the oxide removal rate is by altering the surface state of the polishing pad 14. This alteration is known in the semiconductor industry as "dressing." Such "dressing" consists of scraping the surface of the polishing pad 14 with a knife-edge-type instrument, such as a razor blade, between the polishing of successive wafers or successive groups of wafers. This scraping removes debris from and re-roughens the surface of the polishing pad 14 to thereby help maintain a relatively constant removal rate from wafer to wafer. Without such dressing, or in the alternative, without repeatedly changing the polishing pad 14, the oxide removal rate would continue to fall as more wafers are polished, since the surface roughness tends to decrease and such roughness determines, in large part, the overall abrasiveness of the polishing pad 14 and slurry 18. The polishing pad 14 itself, however, provides no significant abrasive effect without the use of the abrasive slurry 18, even when the polishing pad 14 is fully conditioned.
Although the aforementioned U.S. Pat. No. 5,216,843 discloses a polishing pad conditioning apparatus and further suggests conditioning more at certain radii of a pad than at other radii of the pad, it would be desireable to provide a method and apparatus for determining the amount of conditioning required at each radii of a polishing pad, and based upon that determination, controlling the amount and location of conditioning of the polishing pad.
Summary of the Invention
The present invention is directed toward a method and apparatus for determining the amount of conditioning required to be applied to a polishing pad to achieve a desired removal rate of an oxide, metal or silicon layer of a semiconductor wafer. The present invention is further directed toward a dynamic feedback control system which, based upon data measured from one or more polished wafers, calculates the amount and location of conditioning to be applied to a polishing pad, and based upon such calculations controls a conditioner to contact the polishing pad in accordance with such calculations.
The methods and apparatus of the present invention utilize a rotating conditioning wheel in contact with a rotating polishing pad. Preselected points on either a just polished production wafer or a just polished monitor wafer are measured for remaining film thickness and such measurements are used to calculate the removal rate as a function of wafer radius. When the radius specific removal rate changes by a preselected amount, the recipe, consisting of time spent by the rotating diamond conditioning wheel as a function of polishing pad radius, is altered based upon such measurements and subsequent calculations.
The above features and advantages of the present invention will become apparent from the following description and the appended claims taken in conjunction with the accompanying drawings.
Brief Description of the Drawings
FIG. 1 is a front sectional view of a CMP apparatus.
FIG. 2 is a block diagram illustrating the polishing pad conditioning method and apparatus of the present invention.
FIG. 3 is a schematic plan view illustrating the relative motions of a polishing pad, a semiconductor wafer and a conditioning wheel.
FIG. 4 is a partial perspective view of a mechanism for controlling the position of a conditioning wheel.
FIG. 5 is a plan view of the top layer of a semiconductor wafer illustrating the relative positioning of dies within the wafer.
FIG. 6 is a graph illustrating the oxide removal rate for multiple wafers as a function of the distance from the center of each wafer.
FIG. 7 is a graph illustrating the oxide removal rate for specified die locations on a wafer as a function of the number of wafers which have been polished in succession.
FIG. 8 is a graph illustrating sample measurements of average removal rate and surface uniformity of successively polished wafers both before and after conditioning of a polishing pad.
FIG. 9 is a flow chart illustrating the steps of a first feedback algorithm in accordance with the present invention.
FIG. 10 is a flow chart illustrating the steps of a second feedback algorithm in accordance with the present invention.
Detailed Description of the Present Invention
Referring now to FIG. 2, the method and apparatus of the invention is graphically illustrated at 100. Initially, as part of a CMP polishing process 102, a polishing pad may be preconditioned 104 by a conditioning wheel to alter the state of the surface of the polishing pad from that of a new pad. Such preconditioning may or may not be necessary depending upon the surface state of the polishing pad as delivered by the pad manufacturer. One manufacturer of such pads is Rodel, Inc. of Newark, Del. An appropriate polishing pad from Rodel Inc. is known by the designation "IC1000." Such pads generally consist of a top layer of blown polyurethane which is bonded or otherwise secured to a "supporting structure", which in turn is attached to a rotating rigid platen as earlier described with respect to FIG. 1. The "supporting structure" consists of a separate layer. Such a layer is typically a softer pad such as one available from Rodel, Inc. under the designation "SUBA IV." Pads having two, three or more layers may also be utilized in connection with the present invention. The layers of such multi-layer pads may be prelaminated.
As also earlier described with respect to FIG. 1, a polishing process 106 includes semiconductor wafer which is rotated about an axis, generally its own axis, while pressed against a rotating polishing pad, where the axis of rotation of the semiconductor wafer is offset from the axis of rotation of the polishing pad. During the polishing process 106 an abrasive slurry is deposited onto the polishing pad. The slurry consists of a silica based solution which is pumped through a pipe onto the polishing surface of the polishing pad. Such a slurry is available from Rippey Corp. of Eldorado Hills, Calif. under the designation SC112.
After the semiconductor wafer has been polished for a predetermined period, the period depending upon, among other factors, surface topography of the oxide layer of the semiconductor wafer to be polished, the abrasiveness of the slurry, the rotational velocity of the polishing pad/platen and the level of pressure applied by the polishing pad to the semiconductor wafer, the polishing process 106 is terminated, and a post polishing process 108 begins. The post polishing process 108 consists of cleaning 110 the polished semiconductor wafer on a second platen/pad wherein the pad is typically softer than the polishing pad. A surfactant or other additive (e.g., a small amount of abrasive slurry) may, if desired, be used at this step. Thereafter, the wafer is cleaned by a cleaning tool such as a wafer scrubber or a spin rinse dryer or other suitable wafer cleaning apparatus. Such cleaning tools are well known in the art and are commercially available. The wafer is then transferred to a metrology station 114 for measurement 116 of remaining oxide thickness at several points of the wafer at different distances from the center. The variations in remaining thickness as a function of radius are determined and data regarding such variations is input to a feedback algorithm 118 to determine the rate of oxide removal as a function of radius on the wafer. As detailed further herein, although remaining thickness is measured only as a function of radius, because of the relative motions of the wafer and the polishing pad, such measurements are representative of the oxide removal rate at all points which are the same distance from the center of the wafer.
Based upon a determination of the rate of oxide removal, a modified recipe 120 is generated for conditioning the polishing pad. This modified recipe 120 is provided to an actuation mechanism, for controlling the conditioning wheel. The modified recipe 120 specifies the period of time of conditioning (i.e., the amount of time the conditioning wheel conditions) of the polishing pad as a function of the radius of the pad.
Referring now to FIG. 3, polishing pad conditioning in accordance with the present invention is described in greater detail. FIG. 2 illustrates the interaction of a semiconductor wafer 200 and a polishing pad 202. Although not shown in FIG. 3, an abrasive slurry is fed to the polishing pad surface of the pad 202 during the polishing process.
During polishing, the polishing pad 202 rotates counterclockwise at an angular velocity .omega..sub.p about an axis 204, while the wafer 200 rotates at an angular velocity .omega..sub.w about an axis 106. Typical angular velocities for .omega..sub.p and .omega..sub.w are 20 revolutions per minute and 30 revolutions per minute, respectively.
After a predetermined period of polishing, the wafer 200 is removed from the pad and is measured at several points 208, 210, 212, 214, 216 and 218 along a single radius of the wafer 200. Because of the relative motion of the polishing pad 202 and the semiconductor wafer 200, a single removal measurement at a single point or area along one radius is representative of the amount of material removed at all points or areas on the wafer 200 which are at the same distance from the axis 206 of the wafer 200.
Based upon these measurements, if the removal rate at a certain radius of the wafer 200 changes by a preselected value, a conditioning wheel 220 rotating about its axis at an angular velocity of .omega..sub.c is utilized to abrade or condition the surface of the polishing pad 202 at a specific radius of the polishing pad 202 which corresponds to the areas of the pad 202 which most often or for the longest period contacts that certain radius of the wafer 200. It is to be understood that a range of wafer radii can contact a specific radius of the polishing pad 202. In particular, this range includes all radii of the wafer 200 having a value greater than wafer radius which is coincident with said pad radius.
In the preferred embodiment of the invention, the conditioning wheel 220 conditions those portions of the polishing pad 202 within the region from the axis 204 to the pad's edge 222 which require conditioning to correct for an undesired oxide removal rate. The amount of time the conditioning wheel 220 spends at a specific distance from the axis 204 is dependent upon the results of the measurements made upon the polished wafer 200. In particular, for those radii where the oxide removal rate is less than a desired amount, the conditioning wheel conditions for a longer period to thereby increase the abrasiveness of the polishing pad and thereby increase the oxide removal rate. It is to be understood that such measurements are made on the surface of the wafer 200 which is polished by the pad 202, even though for purposes of illustration, FIG. 3 illustrates the reverse side of such wafer 200.
In further detail, those areas of the wafer 200 closer to the axis 206 more closely correspond to a particular radius of the polishing pad 202. Mathematically, the motion of a point on the wafer 200 relative to the polishing pad 202 can be expressed in cylindrical coordinates as:
and
where:
r.sub.p =the distance from the center of the polishing pad to the point of interest=[r.sub.w.sup.2 +r.sub.c.sup.2 +2r.sub.w r.sub.c cos(.omega..sub.w t)].sup.1/2,
r.sub.w =the distance between the center of the wafer and the point of interest,
r.sub.c =the distance between the pad center and the wafer center,
.omega..sub.w =the angular velocity of the wafer,
.omega..sub.p =the angular velocity of the polishing pad,
t=time in seconds,
.theta.=the angle between r.sub.c and r.sub.p, which is=sin.sup.-1 [r.sub.w /r.sub.p sin.phi.]-.omega..sub.p t,
.phi.=the angle between the extension of r.sub.c and r.sub.w, which is=.omega..sub.w t+.alpha., and,
.alpha.=an arbitrary phase angle.
In one embodiment of the invention, the conditioning wheel 220 is a 2 inch diameter 200 grit diamond conditioning wheel which rotates at about 30 rpm. This diamond conditioning wheel contacts the polishing pad under low pressure (about 1.4 psi averaged over the entire area of the conditioning wheel). The abrading surface of the conditioning wheel 220 consists of a polygon walled honeycomb-like metallic structure, having sides and vertices into which are embedded numerous industrial grade diamonds. Such a conditioning wheel is available from TBW Industries of Furlong, Pa. under the model designation "Diamond Grinding Disk."
Referring now to FIG. 4, a conditioning wheel positioning apparatus 300 is shown. This conditioning wheel positioning apparatus 300 is now available from Westech Systems, Inc., of Phoenix, Ariz. under the model designation "APP-1000". In further detail, a conditioning wheel 302 is coupled to and rotated by a conditioning wheel motor 304. This assembly is secured to a horizontal ball screw actuator 306. A horizontal ball screw motor 308, which is coupled to the horizontal ball screw actuator 306, is controlled in either a forward or reverse direction to position the conditioning wheel 302 in a "horizontal" direction. A vertical motor (not shown) is connected to a rotation coupling 310, which in turn drives a linear ball spline shaft 312. The vertical motor is a stepper motor which is used to rotate the entire horizontal ball screw actuator 306 to thereby move the conditioning wheel 302 in a "vertical" direction. This arrangement provides for precise positioning of the conditioning wheel 302 upon the surface of a polishing pad 314.
In the preferred embodiment of the invention, the conditioning wheel motor 304, the horizontal ball screw motor 308 and the vertical motor are coupled, through motor drivers, to a General Electric Fanuc Series 90-30 programmable controller. This programmable controller receives instructions concerning the desired positioning of the conditioning wheel 302 as a function of time, and executes such instructions. After conditioning of the polishing pad 314, the conditioning wheel 302 is parked at a conditioning wheel clean station 316 to permit, if necessary, cleaning of the conditioning wheel 302.
A typical semiconductor wafer 400 illustrating the relative positioning of ten dies, 402, 404, 406, 408, 410, 412, 414, 416, 418 and 420 from the center of the wafer 400 to the edge of the wafer 400 is shown in FIG. 5. In the preferred embodiment of the invention, as explained further herein, measurements of remaining thickness are made at radii which correspond to identical structures either within, abutting or surrounding each die.
By way of experimental data, FIG. 6 illustrates within wafer uniformity as well as wafer to wafer uniformity. With the polishing apparatus of the present invention, the oxide removal rate is fairly constant from the inner most die (die 502 in FIG. 6) to the third die from the wafer edge (die 416 in FIG. 5). However, as FIG. 6 illustrates, that the removal rate increases toward the edge of the wafer (418 and 420 of FIG. 5).
FIG. 7 illustrates, by way of experimental data, that although the oxide removal rate is fairly constant with respect to the six innermost dies within a polished wafer, the oxide removal rate fluctuates from one wafer to the next, with the oxide removal rate peaking with the twentieth wafer and decreasing thereafter.
Referring now to FIG. 8, the average removal rate of successively polished wafers is shown near the top of the graph. The "average" is actually a weighted average, with the measurements at points further from the center of the wafer given greater significance. The calculated non-uniformity which is derived from within wafer measurements of oxide layer thickness are graphed for both 1 sigma and 3 sigma. As illustrated in FIG. 8, when the non-uniformity exceeds a level of about 8% for three successive wafers, a recipe correction is made (after the polishing of wafer number 25 but before the polishing of wafer number 26), and as further illustrated in FIG. 8, the recipe correction results in a significantly reduced level of non-uniformity from one wafer to the next.
With reference now to both FIGS. 2 and 9, the post polishing process measurement step 116, the feedback algorithm 118 and the generation of a modified recipe 120 are described in greater detail. The post polishing process measurement step consists of measuring the initial (prepolishing) thickness of the oxide layer, t.sub.initial, and after polishing, measuring the thickness of the remaining oxide layer, t.sub.final. The rate of removal is thus=[t.sub.initial -t.sub.final ]/time, expressed in units of Angstroms/minute.
Such oxide layer thickness measurements may be performed with a measuring instruments manufactured by Tencot of Mountain View, Calif., and available as model number TF-2. The measurement data is provided from the measuring instrument to the feedback algorithm 118 through an electronic/software interface.
In further detail, referring to FIG. 9, the feedback algorithm 118, receives the measurements of remaining oxide layer thickness at each of ten points of the oxide layer, and at step 500 calculates the removal rate at each of these ten points based upon prepolishing measurements. At step 502, the weighted average of the removal rates is calculated and at step 504 the removal rate for each of the ten points is subtracted from the weighted average (or a target value) to provide a "residual." At step 506, 10 residual values are evaluated to determine if each residual has the same sign as its two nearest neighbors. This results in, at step 508, the creation of an 8.times.1 array of numbers consisting of ones, minus ones and zeros. Ones correspond to a point of positive sign surrounded by neighbors of having a positive sign, minus one corresponds to a point of negative sign surrounded by neighbors having a negative sign, and a zero corresponds to either (1) a point of positive sign having at least one neighbor having a negative sign, or to (2) a point of negative sign having at least one neighbor having a positive sign.
At step 510 the 8.times.1 array of numbers is mapped into a first 4.times.1 array of numbers to indicate which segments of the polishing pad to condition more, which to condition less and which to leave unchanged. Mapping the 8.times.1 array of numbers into a 4.times.1 array of numbers provides only 4 degrees of freedom. It has been determined experimentally, however, that conditioning with mirror symmetry around the polishing pad radius at which the center of the wafer is located is the most effective method of changing uniformity. In further detail, to achieve maximum resolution of the conditioner, only 8 of the 10 segments (or zones) are required. Discarding segments 1 and 2 leaves eight zones centered around the center of the wafer. Thus, because of mirror symmetry, 4 degrees of freedom are provided. The map is such that point 1 (corresponding to dies 1, 2 and 3 of FIG. 5) is affected by the first segment, points 2 and 3 (dies 2, 3 and 4 of FIG. 5) are affected by the second segment, points 4 and 5 (dies 4, 5, 6 and 7 of FIG. 5) are affected by a third segment, and points 6, 7 and 8 (dies 6, 7, 8, 9 and 10 of FIG. 5) are affected by the fourth segment. This mapping creates the first 4.times.1 array of numbers in which the entry in each of the segments is equal to the logic designator associated with that segment. Plus ones will receive less conditioning time, minus ones will receive more conditioning time, zeros will not change.
At step 512, a second 4.times.1 array of numbers is created in which entry in each of the segments is equal to the actual magnitude of the residuals associated with that segment. Since there are several die associated with each segment, the maximum residual within each group is used.
At step 514, the elements of the first and second 4.times.1 array of numbers are multiplied across (i.e., element i is multiplied by element i). This product is then multiplied by the negative of a sensitivity factor to generate a third 4.times.1 array of numbers. This third 4.times.1 array of numbers indicates the time (in seconds) by which the original conditioning recipe should be changed. The sensitivity factor is the conversion factor between changes to the conditioning time and change in the removal rate contributed by that zone. Upon completion of the response of the system to the change in conditioning time, the removal rate at each radius should equal either the mean removal rate of the measured wafer or (if a target value was chosen) the target removal rate.
At step 516 this third 4.times.1 array of numbers is added to the original conditioning recipe to yield a new recommended recipe. It is to be understood that although this calculation is performed for each set of remaining thickness measurements, the algorithm will recommend a recipe change either only if the 3 Sigma value exceeds a predetermined value, or if a target value is used, when the average rate deviates from the target rate by a predetermined value. Based upon data from experiments, 10% (3 sigma) is a desireable uniformity.
At step 518, the user is prompted to determine whether the user wishes to store the new recipe. If the user chooses to store the new recipe, then, at step 520 the variable "recipe" is updated, and such updated recipe is used the next time the algorithm (program) is run.
In those cases where there are not sufficiently large areas on a actual production wafers from which to measure remaining thicknesses, monitor wafers may be utilized to allow the necessary measurements. Monitor wafers are non-production wafers which are utilized primarily to determine removal rate. Such monitor wafers provide specified areas for measurement of remaining thickness.
The following is a listing of the software for the above described algorithm:
Copyright .COPYRGT. 1994 National Semiconductor Corporation
Referring first to the right-hand side of FIG. 10, as an alternative to the above method, a second embodiment of the invention utilizes a different feedback algorithm 600 which analyzes remaining thickness measurements to calculate, at step 602, removal rates and, at step 604, places these removal rates within a matrix of removal rates for a batch of n wafers in which m evenly spaced points are measured along a radius from the center of each wafer to the edge of each wafer. At step 606, the 1st order coefficient in the regression of r.sub.i,j over j is determined (i.e., the progress of the rate at a given radius from wafer to wafer), where i=wafer number, and j=die number with die 1 being closest to the center of the wafer, and, at step 608, if the slope is significantly different from zero, a correction is made to increase the amount of conditioning at the radius of the polishing pad corresponding to a radius of the semiconductor wafer. The increase in the amount of conditioning is proportional to the negative of the slope. Stated differently, if the slope indicates a 5% drop in removal rate (at a given radius) over a fixed batch size (for example for 10 semiconductor wafers) the conditioning time at that radius (and its mirror image around the wafer center or axis) should be increased by an amount proportional to 5%. For stability, the slope must be one of statistical significance, and a common sign (positive or negative) must exist for several adjacent radii, where "several defines a distance comparable to the diameter of the diamond conditioning wheel. The existence of this condition is determined at step 610. However, it has been determined through experimentation, that the increase, while proportional to, for example 5%, must be scaled at step 612 by a factor of anywhere from 2 to 8.
In order for this "trend" methodology to provide the desired response, the system must yield uniform wafers before the trend methodology is evoked, otherwise a nonuniformity will be maintained from wafer to wafer. That is, monitoring only the wafer to wafer change of rate for each radius is insufficient to maintain the process at optimized uniformity. Therefore, in such a case, a system must be used in which the uniformity is initially corrected in a manner as set forth by the previously described algorithm. Thus, provision must be made to return the system 10 to equilibrium based upon the measurement of a single wafer which indicates out of specification uniformity.
Referring now to the left-hand side of FIG. 10, there is shown the application of the first described algorithm in combination with the algorithm illustrated on the right-hand side of FIG. 10. In greater detail, the control mechanism for applying this second criteria is fundamentally the same as that for triggering a conditioning of the polishing pad. However, the application of this second criteria is activated by the trigger mechanism as previously set forth with respect to FIG. 9. In this case, at step 614, a standard deviation must be calculated for r.sub.i,j over i (within a wafer), and compared to some percentage of the specification, which is 20%, 3 sigma). Then, at step 616, if the within wafer uniformity ("WIWU") is greater for example, 3 sigma, the average value is calculated at step 620. At step 622, each data point is subtracted from the average value to obtain residuals for each point. At step 624, neighbors are checked to determine whether they each have the same sign. If its neighbors do have the same sign, then the conditioning time corresponding to that set of points is, at step 626, increased or decreased by an amount which is proportional to magnitude of the residual or the magnitude of the residual divided by the mean rate. Then, at step 628, the previous recipe is changed.
It is to be understood that alternative but similar methodologies could be evoked to provide a desired conditioning effect on a polishing pad. For example, a trigger for initiating a correction could be based not upon the overall nonuniformity, but instead upon any of the local removal rates.
Although the invention has been described with respect to a polishing pad constructed of a single layer of blown polyurethane, the invention may be used with single and multiple layer polishing pads fabricated of other materials. In addition, it is to be understood that the present invention may be used with polishing pads which have been preconditioned, such as with concentric grooves as illustrated in U.S. Pat. No. 5,216,843.
While only certain preferred embodiments have been described in detail, as will be apparent to those familiar with the art, certain changes and/or modifications can be made without departing from the scope of the invention as defined by the following claims.
Claims
I claim:
1. A method for polishing a top layer of each of a plurality of semiconductor wafers, comprising the steps of: measuring a thickness of the top layer of at least one semiconductor wafer at a predetermined number of points of the top layer of the at least one semiconductor wafer; rotating a platen, the platen including a pad covering a planar surface of the platen, the pad having an upper surface; depositing an abrasive slurry onto the upper surface of the pad; pressing the upper surface of the pad against successive rotating semiconductor wafers, a rotational axis of the semiconductor wafers offset from a rotational axis of the platen; remeasuring the thickness of the top layer of the at least one semiconductor wafer at the predetermined number of points of the top layer of the at least one measured semiconductor wafer; and based at least upon the measured thickness and the remeasured thickness, calculating when a removal rate of the top layer changes from a desired value by a predetermined value at a predetermined radius of the at least one measured and remeasured semiconductor wafer and, in response thereto, conditioning each area of the pad corresponding to the predetermined radius for an interval corresponding to the change in the removal rate at such predetermined radius.
2. The method of claim 1, further comprising the steps of: determining a number of wafers polished by the pad; and governing the duration of the conditioning intervals for succeeding wafers to be polished as a function of the number of polished wafers to thereby control the average removal rate of each wafer.
3. An apparatus for polishing a top layer of each of a plurality of semiconductor wafers, comprising: a rotatable platen having attached thereto a polishing pad for rotatable contact with a top layer of successive semiconductor wafers; means for depositing an abrasive slurry onto a polishing surface of the polishing pad; means for measuring and remeasuring a thickness of the top layer of at least one semiconductor wafer at a predetermined number of points of the top layer of the at least one semiconductor wafer to determine a removal rate of the top layer at such points; and means for conditioning the polishing surface of the polishing pad when the removal rate at a predetermined radius of the at least one measured and remeasured top layer, as determined by the means for measuring and remeasuring, changes from a desired value by a predetermined value, the means for conditioning rotatably creating channels within an area of the polishing surface of the polishing pad corresponding to the predetermined radius for an interval corresponding to the change in the removal rate at such predetermined radius.
4. A method for polishing a top layer of each of a plurality of semiconductor wafers, comprising the steps of: measuring a thickness of the top layer of at least one semiconductor wafer at a predetermined number of points of the top layer of the at least one semiconductor wafer; rotating a platen, the platen including a pad covering a planar surface of the platen, the pad having an upper surface; depositing an abrasive slurry onto the upper surface of the pad; pressing the upper surface of the pad against successive rotating semiconductor wafers, a rotational axis of each semiconductor wafer offset from a rotational axis of the platen; remeasuring the thickness of the top layer of the at least one semiconductor wafer at the predetermined number of points of the top layer of the at least one semiconductor wafer; and based at least upon the measured thickness and the remeasured thickness, calculating when a removal rate changes from a desired value by a predetermined value at a predetermined radius of the at least one semiconductor wafer and, in response thereto, conditioning each area of the pad corresponding to the predetermined radius for an interval corresponding to the change in the removal rate at such predetermined radius.
5. The method of claim 4, further comprising the steps of: determining the number of wafers polished by the pad; and governing the duration of the conditioning intervals for succeeding wafers to be polished as a function of the number of wafers.
6. An apparatus for polishing a top layer of each of a plurality of semiconductor wafers, comprising: a rotatable platen having attached thereto a polishing pad for rotatable contact with a top layer of each of a plurality of successive semiconductor wafers; means for depositing an abrasive slurry onto a polishing surface of the polishing pad; means for measuring and remeasuring a thickness of the top layer of at least one of the semiconductor wafers at a predetermined number of points of the top layer of the at least one of the semiconductor wafers to determine the removal rates of the top layer at such points; and means for conditioning the polishing surface of the polishing pad when the removal rate at a predetermined radius of the polished top layer of the at least one semiconductor wafer changes from a desired value by a predetermined value, the means for conditioning rotatably creating channels within an area of the polishing surface of the polishing pad for an interval corresponding to the change in the removal rate, the area corresponding to the predetermined radius.
7. A method for polishing a top layer of a semiconductor wafer, comprising the steps of: measuring a thickness of the top layer of at least one semiconductor wafer at a predetermined number of points of the top layer of the at least one semiconductor wafer; rotating a platen, the platen including a pad covering a planar surface of the platen, the pad having an upper surface; depositing an abrasive slurry onto the upper surface of the pad; pressing the upper surface of the pad against a rotating semiconductor wafer, a rotational axis of the semiconductor wafer offset from a rotational axis of the platen; remeasuring the thickness of the top layer of the at least one semiconductor wafer at the predetermined number of points of the top layer of the at least one semiconductor wafer polished by the pad; and based at least upon the measured thickness and the remeasured thickness, calculating the removal rate at predetermined radii of the semiconductor wafer, calculating a weighted average value of the removal rates, subtracting each removal rate from the weighted average value to derive a residual for each predetermined radius of the semiconductor wafer, determining the sign of each residual, creating a first array of the resultant ones, minus ones and zeros, the ones corresponding to positive sign residuals surrounded by neighboring residuals having a positive sign, the minus ones corresponding to negative sign residuals surrounded by neighboring residuals having a negative sign and the zeros corresponding to one of a positive sign residual having at least one neighboring residual having a negative sign and a negative sign residual having at least one neighboring residual having a positive sign, mapping the first array into a second array and into a third array, multiplying the second and third arrays to generate a fourth array, multiplying the fourth array by a sensitivity factor to derive a conditioning recipe correction, adding the conditioning recipe correction to an initial recipe to generate a new conditioning recipe, and conditioning the pad in accordance with the new conditioning recipe.
8. A method for polishing a top layer of a plurality of semiconductor wafers, comprising the steps of: measuring a thickness of a top layer of a plurality of semiconductor wafers at a predetermined number of points of the top layer of the plurality of semiconductor wafers; rotating a platen, the platen including a pad covering a planar surface of the platen, the pad having an upper surface; depositing an abrasive slurry onto the upper surface of the pad; pressing the upper surface of the pad against successive rotating semiconductor wafers, a rotational axis of the semiconductor wafers offset from a rotational axis of the platen; remeasuring the thickness of the top layer of the at least one semiconductor wafer at the predetermined number of points of the top layer of at least one of the plurality of semiconductor wafers polished by the pad; and based at least upon the measured thickness and the remeasured thickness, calculating the removal rates at predetermined radii of the at least one semiconductor wafer and, if the removal rate for at least one of the predetermined radii changes by a first predetermined value, calculating a correction to a conditioning recipe, determining within wafer uniformity of removal rate, and in response to a deviation from the within wafer uniformity greater than a second predetermined value, modifying the correction to the conditioning recipe, and conditioning the pad in accordance with the modified corrected conditioning recipe, the modified corrected conditioning recipe utilized for conditioning each area of the pad corresponding to the predetermined radii for respective intervals corresponding to changes in removal rates at such radii.
9. An apparatus for polishing a top layer of each of a plurality of semiconductor wafers, comprising: a rotatable platen, the rotatable platen including a pad covering a planar surface of the platen, the pad having an upper surface; means for depositing an abrasive slurry onto the upper surface of the pad; means for pressing the upper surface of the pad against successive rotating semiconductor wafers, a rotational axis of the semiconductor wafers offset from a rotational axis of the platen; means for measuring and remeasuring a thickness of the top layer of at least one semiconductor wafer at a predetermined number of points of a top layer of at least one semiconductor wafer polished by the pad; and means for calculating, based at least upon the measured thickness and the remeasured thickness, when a removal rate at a predetermined radius of at least one semiconductor wafer changes from a desired value by a predetermined value and, in response thereto, conditioning each area of the pad corresponding to the predetermined radius for an interval corresponding to the change in removal rate at such radius.
10. The apparatus of claim 9, further comprising: means for determining a number of wafers polished by the pad; and means for governing the duration of the conditioning intervals for succeeding wafers to be polished as a function of the number of wafers to thereby control the average removal rate of each wafer.
11. An apparatus for polishing a top layer of each of a plurality of semiconductor wafers, comprising: means for measuring a thickness of the top layer of at least one semiconductor wafer at a predetermined number of points of a top layer of the at least one semiconductor wafer; a rotatable platen, the rotatable platen including a pad covering a planar surface of the platen, the pad having an upper surface; means for depositing an abrasive slurry onto the upper surface of the pad; means for pressing the upper surface of the pad against successive rotating semiconductor wafers, a rotational axis of each semiconductor wafer offset from a rotational axis of the rotatable platen; means for remeasuring the thickness of the top layer of the at least one semiconductor wafer at the predetermined number of points of the top layer of the at least one semiconductor wafer; and means for calculating, based at least upon the measured thickness and the remeasured thickness, when a removal rate at a predetermined radius of the at least one semiconductor wafer changes from a desired value by a predetermined value and, in response thereto, conditioning each area of the pad corresponding to the predetermined radius for an interval corresponding to the change in removal rate at such radius.
12. The apparatus of claim 11, further comprising: means for determining a number of wafers polished by the pad; and governing the duration of the conditioning intervals for succeeding wafers to be polished as a function of the number of wafers.
13. An apparatus for polishing a top layer of a semiconductor wafer, comprising: means for measuring a thickness of the top layer of the semiconductor wafer at a predetermined number of points of the top layer of at least one semiconductor wafer; a rotatable platen, the platen including a pad covering a planar surface of the platen, the pad having an upper surface; means for depositing an abrasive slurry onto the upper surface of the pad; means for pressing the upper surface of the pad against a rotating semiconductor wafer, a rotational axis of the semiconductor wafer offset from a rotational axis of the rotatable platen; means for remeasuring the predetermined number of points of the top layer of at least one semiconductor wafer polished by the pad; and means for calculating, based at least upon the measured thickness and the remeasured thickness, the removal rate at predetermined radii of at least one semiconductor wafer by calculating a weighted average value of the removal rates, subtracting each removal rate from the weighted average value to derive a residual for each predetermined radius of the semiconductor wafer, determining the sign of each residual, creating a first array of the resultant ones, minus ones and zeros, the ones corresponding to positive sign residuals surrounded by neighboring residuals having a positive sign, the minus ones corresponding to negative sign residuals surrounded by neighboring residuals having a negative sign and the zeros corresponding to one of a positive sign residual having at least one neighboring residual having a negative sign and a negative sign residual having at least one neighboring residual having a positive sign; means for mapping the first array into second and third arrays, and for multiplying the second and third arrays to generate a fourth array, and for multiplying the fourth array by a sensitivity factor to derive a conditioning recipe correction and adding the conditioning recipe correction to an initial recipe to generate a new conditioning recipe; and means for conditioning the pad in accordance with the new conditioning recipe.
14. An apparatus for polishing a top layer of a plurality of semiconductor wafers, comprising: means for measuring a thickness of the top layer of at least one semiconductor wafer at a predetermined number of points of a top layer of the at least one of a plurality of semiconductor wafers; a rotatable platen, the rotatable platen including a pad covering a planar surface of the platen, the pad having an upper surface; means for depositing an abrasive slurry onto the upper surface of the pad; means for pressing the upper surface of the pad against successive rotating semiconductor wafers, a rotational axis of the semiconductor wafers offset from a rotational axis of the rotatable platen; means for remeasuring the thickness of the top layer of the at least one semiconductor wafer at the predetermined number of points of the top layer of the at least one of the semiconductor wafers polished by the pad; and means for calculating, based at least upon the measured thickness and the remeasured thickness, the removal rate at predetermined radii of the at least one semiconductor wafer and, if the removal rate for adjacent radii changes from a desired value by a first predetermined value, calculating a correction to a conditioning recipe, determining within wafer uniformity of removal rate, and in response to a deviation from within wafer uniformity greater than a second predetermined value, modifying the correction to the conditioning recipe; and means for conditioning each area of the pad corresponding to those predetermined radii whose removal rate changes by the first predetermined value, in accordance with the modified corrected conditioning recipe.
15. A method for polishing a top layer of a plurality of semiconductor wafers, comprising the steps of: rotating the plurality of semiconductor wafers about a first rotational axis; measuring a thickness of the top layer of at least one semiconductor wafer at a plurality of points of the top layer of the at least one of a plurality of semiconductor wafers; rotating a platen about a second rotational axis, the second rotational axis offset from the first rotational axis, the platen including a pad covering a planar surface of the platen, the pad having an upper surface; depositing an abrasive slurry onto the upper surface of the pad; pressing the upper surface of the pad against a rotating semiconductor wafer; remeasuring the thickness of the top layer of the at least one semiconductor wafer at the predetermined number of points of the top layer of at least one of the plurality of semiconductor wafers polished by the pad; based at least upon the measured thickness and the remeasured thickness, calculating a removal rate at predetermined radii for at least one of the plurality of semiconductor wafers, arranging the removal rates into a matrix, determining a first order coefficient regression of removal rates, in response to a determination that a slope at a given radius is at least a predetermined value determining whether a common sign exists for adjacent radii, in response to a determination that a common sign exists for adjacent radii, generating a scale amount of conditioning of the pad; and determining for at least one wafer whether a standard deviation of removal rate is greater than a predetermined value and, in response to such determination, calculating the average value of removal rates for such wafer, subtracting each removal rate for such wafer from the average value to derive residuals, determining the sign of each residual, determining whether a plurality of adjacent radii have the same sign residual and, in response to such determination, changing a conditioning recipe in accordance with the scale amount of conditioning.
16. An apparatus for polishing a top layer of a plurality of semiconductor wafers, comprising: means for rotating the plurality of semiconductor wafers about a first rotational axis; means for measuring a thickness of the top layer of at least one semiconductor wafer at a plurality of points of the top layer of the at least one of a plurality of semiconductor wafers; means for rotating a platen about a second rotational axis, the second rotational axis offset from the first rotational axis, the platen including a pad covering a planar surface of the platen, the pad having an upper surface; means for depositing an abrasive slurry onto the upper surface of the pad; means for pressing the upper surface of the pad against a rotating semiconductor wafer; means for remeasuring the thickness of the top layer of the at least one semiconductor wafer at the predetermined number of points of the top layer of at least one of the plurality of semiconductor wafers polished by the pad; means for calculating, based at least upon the measured thickness and the remeasured thickness, a removal rate at predetermined radii for at least one of the plurality of semiconductor wafers, arranging the removal rates into a matrix, determining a first order coefficient regression of removal rates, in response to a determination that a slope at a given radius is at least a predetermined value determining whether a common sign exists for adjacent radii, in response to a determination that a common sign exists for adjacent radii, generating a scale amount of conditioning of the pad; and means for determining for at least one wafer whether a standard deviation of removal rate is greater than a predetermined value, and in response to such determination, calculating the average value of removal rates for such wafer, subtracting each removal rate for such wafer from the average value to derive residuals, determining the sign of each residual, determining whether a plurality of adjacent radii have the same sign residual, and in response to such determination, changing a conditioning recipe in accordance with the scale amount of conditioning.
17. A method for polishing a top layer of a semiconductor wafer, comprising the steps of: measuring a thickness of the top layer of at least one semiconductor wafer at a predetermined number of points of the top layer of the at least one semiconductor wafer; rotating a platen, the platen including a pad covering a planar surface of the platen, the pad having an upper surface; depositing an abrasive slurry onto the upper surface of the pad; pressing the upper surface of the pad against a rotating semiconductor wafer, a rotational axis of the semiconductor wafer offset from a rotational axis of the platen; remeasuring the thickness of the top layer of the at least one semiconductor wafer at the predetermined number of points of the top layer of at least one semiconductor wafer polished by the pad; and based at least upon the measured thickness and the remeasured thickness, calculating the removal rate at predetermined radii of the semiconductor wafer, calculating a weighted average value of the removal rates, subtracting each removal rate from the weighted average value to derive a residual for each predetermined radius of the semiconductor wafer to generate a new conditioning recipe, wherein a conditioning time at those areas of the pad which most affect specific radii on the semiconductor wafer in which the removal rate is below the weighted average value is increased, and the conditioning time at those areas on the pad which most affect the specific radii on the semiconductor wafer in which the removal rate is above the weighted average is decreased, and conditioning the pad in accordance with the new conditioning recipe.
18. An apparatus for polishing a top layer of a semiconductor wafer, comprising: means for measuring a predetermined number of points of the top layer of at least one semiconductor wafer; a rotatable platen, the platen including a pad covering a planar surface of the platen, the pad having an upper surface; means for depositing an abrasive slurry onto the upper surface of the pad; means for pressing the upper surface of the pad against a rotating semiconductor wafer, a rotational axis of the semiconductor wafer offset from a rotational axis of the rotatable platen; means for remeasuring the thickness of the top layer of the at least one semiconductor wafer at the predetermined number of points of the top layer of at least one semiconductor wafer polished by the pad; means for calculating, based at least upon the measured thickness and the remeasured thickness, the removal rate at predetermined radii of the at least one semiconductor wafer by calculating a weighted average value of the removal rates, subtracting each removal rate from the weighted average value to derive a residual for each predetermined radius of the semiconductor wafer to generate a new conditioning recipe, wherein a conditioning time at those areas of the pad which most affect specific radii on the semiconductor wafer in which the removal rate is below the weighted average value is increased, and the conditioning time at those areas on the pad which most affect the specific radii on the semiconductor wafer in which the removal rate is above the weighted average is decreased; and means for conditioning the pad in accordance with the new conditioning recipe.
19. A method for polishing a top layer of a semiconductor wafer, comprising the steps of: measuring a thickness of the top layer of at least one semiconductor wafer at a predetermined number of points of the top layer of the at least one semiconductor wafer; rotating a platen, the platen including a pad covering a planar surface of the platen, the pad having an upper surface; depositing an abrasive slurry onto the upper surface of the pad; pressing the upper surface of the pad against a rotating semiconductor wafer, a rotational axis of the semiconductor wafer offset from a rotational axis of the platen; remeasuring the thickness of the top layer of the at least one semiconductor wafer at the predetermined number of points of the top layer of at least one semiconductor wafer polished by the pad; and based at least upon the measured thickness and the remeasured thickness, calculating the removal rate at predetermined radii of at least one semiconductor wafer, calculating a weighted average value to derive a residual for each predetermined radius of the semiconductor wafer to thereby generate a first array consisting of residuals, determining the sign of each residual to thereby generate a second array consisting of ones, minus ones and zeros, each of the ones, minus ones and zeros corresponding to the sign of each residual, mapping the second array to a third array, the third array smaller than the second array, the third array consisting of ones, minus ones and zeros, the ones corresponding to positive sign residuals surrounded by neighboring residuals having a positive sign, the minus ones corresponding to negative sign residuals surrounded by neighboring residuals having a negative sign and the zeros corresponding to one of a positive sign residual having at least one neighboring residual having a negative sign and a negative sign residual having at least one neighboring residual having a positive sign, mapping the third array into a fourth array in which the first mapping obeys an algorithm designed to reflect the geometric relationship of specific areas on the pad to specific radii on the wafer, mapping the first array into a fifth array in which the mapping obeys the algorithm designed to reflect the geometric relationship of specific areas on the pad to specific radii on the wafer, multiplying the fourth array and the fifth array to generate a sixth array, multiplying the sixth array by a sensitivity factor to derive a conditioning recipe correction, and adding the conditioning recipe correction to an initial recipe to generate a new conditioning recipe; and conditioning the pad in accordance with the new conditioning recipe.
20. An apparatus for polishing a top layer of a semiconductor wafer, comprising: means for measuring a thickness of the top layer of at least one semiconductor wafer at a predetermined number of points of the top layer of the at least one semiconductor wafer; a rotatable platen, the platen including a pad covering a planar surface of the platen, the pad having an upper surface; means for depositing an abrasive slurry onto the upper surface of the pad; means for pressing the upper surface of the pad against a rotating semiconductor wafer, a rotational axis of the semiconductor wafer offset from a rotational axis of the rotatable platen; means for remeasuring the thickness of the top layer of the at least one semiconductor wafer at the predetermined number of points of the top layer of at least one semiconductor wafer polished by the pad; and means for calculating, based at least upon the measured thickness and the remeasured thickness, the removal rate at predetermined radii of at least one semiconductor wafer, calculating a weighted average value to derive a residual for each predetermined radius of the semiconductor wafer to thereby generate a first array consisting of residuals, determining the sign of each residual to thereby generate a second array consisting of ones, minus ones and zeros, each of the ones, minus ones and zeros corresponding to the sign of each residual, mapping the second array to a third array, the third array smaller than the second array, the third array consisting of ones, minus ones and zeros, the ones corresponding to positive sign residuals surrounded by neighboring residuals having a positive sign, the minus ones corresponding to negative sign residuals surrounded by neighboring residuals having a negative sign and the zeros corresponding to one of a positive sign residual having at least one neighboring residual having a negative sign and a negative sign residual having at least one neighboring residual having a positive sign, mapping the third array into a fourth array in which the first mapping obeys an algorithm designed to reflect the geometric relationship of specific areas on the pad to specific radii on the wafer, mapping the first array into a fifth array in which the mapping obeys the algorithm designed to reflect the geometric relationship of specific areas on the pad to specific radii on the wafer, multiplying the fourth array and the fifth array to generate a sixth array, multiplying the sixth array by a sensitivity factor to derive a conditioning recipe correction, and adding the conditioning recipe correction to an initial recipe to generate a new conditioning recipe; and means for conditioning the pad in accordance with the new conditioning recipe.
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