Differentially Matched Filter for a Spread Spectrum System

The present invention generally relates to a matched filter used in a spread spectrum (SS) or code division multiple access (CDMA) communication system and more particularly, relates to a filter for a SS or CDMA system having differential filtering features.

In a SS or CDMA communication system, a signal to be transmitted covers a very widely spread frequency band as opposed to the ranges used in conventional communication systems and, therefore, less subjected to influence by noise. This and other advantages of the SS or CDMA communication systems have made them very attractive for consumers and made consumers reconsider their positions, especially as complicated arrangements and high costs of SS or CDMA communication systems became things of the past with the advent of technology improvements.

In a SS or CDMA communication system, a series of codes with a predetermined high bit rate, for example a pseudo random noise code series, is used for what is called the spread spectrum modulation of a carrier wave with narrow frequency band obtained by modulating information to be transmitted by a base band signal. The spread spectrum modulation can be exercised by different methods, a direct sequence method including. The direct sequence method provides for modulating a binary code with noise-like qualities on to a carrier. The spread signal is thereby obtained. The most desirable selection of a secure code requires, a long sequence, and a long sequence will require long acquisition time at the receiving side.

In the system of the kind discussed, a receiver is provided with a demodulator to demodulate the incoming spread signals. This operation is dependent on having at the receiving side a replica (or a match, or a pattern) of the pseudo random noise code sequence which is being transmitted. The replica should be in phase with the incoming sequence. Every time the coded pattern of the spread signal corresponds to the pattern, or more specifically, when the pattern is matched with the pseudo random noise code pattern at the time the digital signal is modulated to the spread signal, the spread signal is picked up as the information signal and is transferred to a further processing. Only the interrelating components of the transmitted signals are obtained in this case, since the received signal is multiplied by the pseudo random noise code in perfect analogy with that in the modulation inasmuch as there is no interrelation between different pseudo random noise codes. The above mentioned acquisition time is lengthy since the incoming sequence must be phase and code searched until correlation is attained. Phase searching extends acquisition time.

The process of phase searching can be expedited using tapped delay lines or matched filters. This filter is one of the most important component of a SS and CDMA communication system. In a conventional matched filter, in order to match the increase in length of a random sequence, the number of additions must also be increased. With the increase in the number of additions, the speed of passing the random sequence therethrough becomes limited and should now be increased since it affects the processing time of the system. In order to maintain an acceptable processing time, the speed of passing through the additions must be increased which in turn increases the energy consumption of the system and decreases its efficiency.

In a SS System or a CDMA system, there are different ways of performing code acquisition. These include the use of a correlator and a matched filter. A correlator proper that can be referred to as an active correlator has a simple structure and provides for multiplication of the received pseudo noise signal with noise by the pseudo noise reference at the receiving side and further integration, the result of which integration is used for making an acquisition decision by comparison with a threshold. An active correlator has a basic limitation on the search speed due to a specificity of the multiply-and-integrate type of correlation.

However, the search rate of a direct sequence code acquisition technique can be significantly increased by replacing the multiply-and-integrate operation with a passive correlator device such as a matched filter. A matched filter has a similar architecture as that of a finite impulse response (FIR) tapped-delay-line, or transversal filter. A matched filtering can be implemented either as a continuous time or discrete time operation using such state-of-the-art technologies as charge coupled devices, surface acoustic wave structures, and MOS structures. Generically, a matched filter is a passive device that maximizes the signal-to-noise ratio at its output when the signal at its input is embedded in additive white Gaussian noise. The use of matched filters is described in the art, for instance, in M. K. Simon, J. K. Omura, R. A. Scholtz, and B. K. Levitt "Spread Spectrum Communications" Vol. III, 1 printed by Library of Congress Cataloging in Publication Data 1985.

Conceptually, the implementation of a matched filter acquisition system for a finite length pseudo noise waveform can be visualized in the form of a tapped delay line followed by a passive filter matched to a single pseudo noise chip waveform. The architecture of a conventional matched filter 10 shown in FIG. 1 includes a delay line 12.sub.1, 12.sub.2, . . . , 12.sub.n, 12.sub.n+1 with taps to a multiplication stage 14.sub.1, 14.sub.2, . . . , 14.sub.n-1, 14.sub.n, and an adder 16. It can be appreciated that a square block T is the delay of T; X.sub.1, X.sub.2, . . . , X.sub.n, X.sub.n+1 is the input sequence, and a.sub.1 . . . a.sub.n-1, a.sub.n is the random code. A digital implementation of a matched filter uses a shift register, a holding register loaded with the random code, and a comparison and summation block. In this case, the contents of the shift register which holds the signal samples digitized to k bits, k an integer, and of the holding register which permanently contains the fixed segment of the code used for comparison are multiplied by each other stage by stage, generating "x.sub.i ", i=1.about.n, if the stages match and "-x.sub.i ", i=1.about.n, if they don't, and summing the resulting set of "x.sub.i " or "-x.sub.i ", i=1.about.n. The larger is the value of n the random code sequence, the longer the addition is performed. In the technology of SS or CDNA communication, the length n of a matched filter may exceed 1000 elements of delay in the delay line. A considerable number of multiplications and additions affect power consumption and hardware complexity. When a substantial number of additions is necessary for the adder 16, the speed is limited by the material used and the number of delays (frequently referred to as the number of taps). For instance, in a commercially available matched filter wherein a CMOS is used, the total number of taps for the matched filter cannot exceed 64. The input sampling speed is 30 Mchips/s. (See G. J. R. Povey and P. M. Grant, "Simplified Matched Filter Receiver Design for Spread Spectrum Communication Application", Electronics & Communication Engineering Journal, April 1993.)

It is therefore an object of the present invention to provide a matched filter for a spread spectrum or CDMA system that does not have the shortcomings of conventional matched filters.

It is another object of the present invention to provide a matched filter for a SS or CDMA system that utilizes a differential value from the matched filter as its matched output of the filter.

It is a further object of the present invention to provide a differential matched filter for a SS or CDMA system that can save approximately half of the number of additions necessary.

In accordance with the present invention a differentially matched filter for a SS or CDMA system is provided.

In the first preferred embodiment, a differentially matched filter for SS or CDMA systems comprises a delay line, a multiplication stage, a first adder, a second adder and an additional delay element. The delay line comprises n elements of delay T with taps therebetween and is fed with an input sequence in the form of

The taps of the delay line are connected to respective elements of the multiplication stage having filter coefficients in the form of -a.sub.n, (a.sub.n -a.sub.n-1), (a.sub.n-1 -a.sub.n-2), . . . , (a.sub.2 -a.sub.1), a.sub.1, where a.sub.1 .about.a.sub.n is a predetermined code sequence. The multiplication stage is in turn connected to the first adder to provide a sequence at the output thereof in the form of

The first adder is connected to a first input of the second adder, an output of the second adder is the output of the filter and is connected through the additional delay element to a second input of the second adder, to produce a differential output sequence in the form of

The improved matched filter has more than half of its coefficients equal to 0 and therefore more than half of the total number of additions necessary for the conventional matched filter can be saved with resulting increase of the speed of the matched filtering.

A method of filtering spread signals at a receiving side of a transmission system having a transmitting side and the receiving side comprises, according to one aspect of the present invention, the steps of fixing a received sequence of spread signals in a delay line, the delay line comprising elements of delay, each subsequent element of delay of the elements of delay adding a delay time of T to a total delay time of preceding elements of the delay line; multiplying values of the received sequence by respective weighting coefficients constituting a second code sequence that is a replica to a first code sequence used for coding a baseband signal at the transmitting side of the system; adding together products of the step of multiplying, to produce an intermediate sequence; delaying the output sequence of the filter for a time of T; and adding the intermediate sequence from the delayed output sequence.

A second preferred embodiment of a differentially matched filter for spread spectrum or code division multiple access communication systems according to this invention comprises a delay line, a multiplication stage, a first adder, a second adder and an additional delay element. The delay line comprises at least k=M(n+1) elements of delay with taps after every Mth element. The delay line is fed with an input sequence in the form of

Each of the taps is connected to a respective one of (n+1) elements of the multiplication stage, which in turn is fed with a sequence in the form of

This multiplication stage is connected to the first adder to provide a sequence at its output in the form of

The first adder is connected to a first input of the second adder. The output of the second adder is the output of the filter and is also connected through the additional delay element to a second input of the second adder, to produce a filter output sequence of the form ##EQU1##

Each of the delay line elements provides a delay equal to T/M, and the additional element of delay also provides a delay equal to T/M.

A method of filtering spread signals at a receiving side of a transmission system having a transmitting side and the receiving side comprises, according to the other aspect of the invention, the steps of fixing a received sequence of spread spectrum signals in a delay line consisting of elements of delay, with each element of delay of the delay line introducing a delay time of T/M; multiplying values of the received sequence tapped after each Mth element of delay by respective weighting coefficients, cooperatively constituting a second code sequence which is a replica to a first code sequence used for coding a baseband signal at the transmitting side of the system; adding together products of the multiplying, to produce an output sequence; delaying this output sequence for a time of T/M, to produce a delayed output sequence; and adding the output sequence to the delayed output sequence.

Other objects, features and advantages of the present invention, as well as its organization and operation will be understood from a consideration of the detailed description of the illustrative embodiment, which follows, when taken in conjunction with the accompanying drawings.

FIG. 1 is a circuit diagram showing a conventional matched filter device.

FIG. 2 is a diagram illustrating differential matched filter according to the present invention.

FIG. 3 is a graph illustrating a conventional matched filter wherein the sampling speed is M.times.faster than that shown in FIG. 1.

FIG. 4 is a graph illustrating differential matched filter according to the present invention wherein the sampling speed is M.times. faster than that shown in FIG. 2.

Referring now to FIG. 2, a matched filter 20 according to the present invention includes a delay line 22.sub.1, 22.sub.2, . . . , 22.sub.n, 22.sub.n+1 with taps to a multiplication (weighting) stage 24.sub.1, 24.sub.2, . . . , 24.sub.n, 24.sub.n+1, the latter being in turn connected to a first adder 26. First adder 26 has its output connected to one input of a second adder 28, and the output of second adder 28 which is the output of the filter 20 is at the same time coupled with an element 30 of delay T. The output of element 30 of delay is connected to another input of second adder 28. It can be appreciated that each block 22.sub.i (1.ltoreq.i.ltoreq.n+1) of delay line 22 adds a delay time of T to a total delay time provided by preceding elements 22.sub.1 -22.sub.i-1 of delay line 22; X.sub.1, X.sub.2, . . . , X.sub.n, X.sub.n+1 represent in common a received sequences and a.sub.1 . . . a.sub.n-1, a.sub.n is a random code sequence which is a replica of a random code sequence used at a transmitting side of a system (not shown) whose receiving side incorporates matched filter 20. Therefore, the output of first adder 26 can be expressed as

At the output of element 30 of delay, it becomes

After addition, the output of second adder 28 will show

This output value is the same as that of conventional one shown in FIG. 1 for the same input sequence.

Since the value of a.sub.i is either 1 or -1, therefore, the value of a.sub.i -a.sub.i-1 is either 2, or 0, or -2.

One of the frequently used random sequence is m-sequence (or maximum length sequence). This sequence is defined in many books concerning spread spectrum or digital communication systems, for example "Digital Communications and Spread Spentruin Systems", by R. Z. Ziemen and R. L. Peterson, 1985, p. 385. A m-sequence has a period n, this n must be odd (n=2.sup.r -1). For a m-sequence, a.sub.1 ', a.sub.2 ', a.sub.3 ', . . . a.sub.n ' (a.sub.i 40 =1 or 0), by a direct value transformation 0 transferred to 1, and 1 transferred to -1, the other sequence a.sub.1, a.sub.2, . . . , a.sub.n (a.sub.i =-1 or 1) can be obtained. This new sequence corresponds to the coefficient of the matched filter mentioned in this invention.

Also, for any m-sequence with a period N, N=2.sup.r -1, a run can be defined as a sequence of identical symbols within the m-sequence. And the length of this subsequence is the length of the run. Then, for this m-sequence, there will be

1 run of ones of the length r,

1 run of zeros of the length r-1

1 run of ones and 1 run of zeros of the length r-2,

2 runs of ones and 2 runs of zeros of the length r-3,

4 runs of ones and 4 runs of zeros of the length r-4,

2.sup.r-3 runs of ones and 2.sup.r-3 runs of zeros of the length 1.

There are total 2.sup.r-1 runs in this sequence. The 2.sup.-1 runs are obtained by summation 2+(1+2.sup.2 + . . . +2.sup.r-3).multidot..sub.2=2.sup.r-1. And the sequence a.sub.1, a.sub.2, a.sub.3, . . . a.sub.n obtained by a value transformation, mentioned above, from the m-sequence a.sub.1 ', a.sub.2 ', a.sub.3 ', . . . an also has a total of 2.sup.r-1 runs. Since this sequence has 2.sup.r-1 runs, the sequence -a.sub.n, a.sub.n -a.sub.n-1, a.sub.n-1 -a.sub.n-2, . . . , a.sub.2 -a.sub.1, a.sub.1 will have 2.sup.r-1 +1 nonzero values. The number of nonzero values of the matched filter coefficients means the number of additions in the calculation of a match process. There are total of n (n=2.sup.r-1) nonzero coefficients in the traditional match filter shown in FIG. 1. And there are total of 2.sup.r-1 +1 nonzero coefficients in the differential filter shown in FIG. 2. So, the ratio of the number of additions for the conventional matched filter and for the filter according to the present invention is

The above calculation is based on the assumption that at the input of the filters 10 and 20 one sampling is taken at each random sequence of a bit. However, if M samples are taken for each random sequence of a bit, a conventional filter can be shown in FIG. 3.

The conventional matched filter 40 shown in FIG. 3 has a sampling speed which is M times higher than that of filter 10 in FIG. 1. It comprises a delay line 42 with elements of delay T/M, taps 44 to a multiplication stage 46, and an adder 48. A sequence at its output (the output of adder 48) can be described as ##EQU2## Based on this architecture, a differentially matched filter 50 according to the present invention and having a sampling speed which is M times higher than that of filter 20 shown in FIG. 2 can be seen in FIG. 4. It comprises a delay line with k=M(n+1) elements 54.sub.1 -54.sub.k of delay. Each of elements 54 provides a delay of T/M. There are taps 56.sub.1 -56.sub.n+1 --after element 54.sub.1, and then in every M elements 54. Taps 56 are connected to a multiplication stage 58 comprising n+1 elements of multiplication. A random code sequence used for multiplication has the form of

This sequence is the same as that used in FIG. 2. Multiplication stage 58 is connected to a first adder 62. The output of first adder 62 shows a sequence of the form of

First adder is coupled to a second adder 64, and the second input of second adder 64 is fed from its output by virtue of an additional element 66 of delay of T/M. At the output of element 66, the sequence becomes ##EQU3## and at the output of second adder 64 it assumes the form ##EQU4##

The total number of additions required for the conventional filter shown in FIG. 3 is nM, while the total number of additions necessary for the differentially matched filter according to the present invention shown in FIG. 4 is 2.sup.r-1 +1 in the case of a m-sequence example. So, the ratio of the total number of additions between the two methods is shown below

The above therefore indicates that the ratio between the total number of additions between the present invention differentially matched filter and that of the conventional matched filter is 1/(2M), where M is the number of sampling for the random sequence of each bit.

While the present invention has been described in an illustrative manner, it should be understood that the terminology used is intended to be in the nature of words of description rather than of limitation.

Furthermore, while the present invention has been described in terms of a preferred embodiment thereof, it is to be appreciated that those skilled in the art will readily apply these teachings to other possible variations and modifications of the invention.

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows.