Memory Apparatus for Channel Selector of Television Receiver

The present invention relates to a memory apparatus for channel selector of a television (TV) receiver and a community antenna television (hereinafter called CATV) converter.

A channel selecting circuit used in a TV receiver and a CATV converter has a memory apparatus. In the memory apparatus, channel attendant data of each channel including channel skip data, fine tuning data, caption data for displaying a tuned channel number or a name of tuned broadcasting station, etc. are stored.

FIG. 4 illustrates a conventional channel selecting circuit for displaying caption data. The caption data is stored in memory 925. A tuning command having channel data and mode information is supplied to channel selecting circuit 921 from input means 928. The channel data, for instance, specifies a tuned channel with a channel number, and the mode information shows which mode the specified channel belongs to, TV mode or CATV mode. Judging circuit 924 in microcomputer 922 determines whether the specified channel belongs to TV mode or CATV mode based on the mode information. Operating circuit 923 accesses a TV domain 926 of the memory and reads caption data stored therein when the specified channel belongs to TV mode. Operating circuit 923 accesses CATV domain 927 of the memory and reads caption data therein when the specified channel belongs to CATV mode. The accessed caption data is fed to caption processing circuit 914. Regardless of the caption data being stored in the memory or not, operating circuit 923 accesses memory 925 every time the tuning command is fed. The accessed caption data is converted into a caption video signal in caption processing circuit 914, and is fed to a cathode ray tube (hereinafter called CRT) 907 across video signal amplifier 905. Operating circuit 923 also generates a local oscillation controlling signal based on fed channel data, and supplies the signal to tuner 902. Tuner 902 mixes a local oscillating signal of the frequency specified by the local oscillation controlling signal with a TV radio frequency (hereinafter called RF) signal fed from antenna 901. Intermediate frequency (hereinafter called IF) amplifier 903 converts a TV RF signal into an IF signal and also functions as a detector. After detection, the signal is separated into a sound signal and a video signal. The sound signal is supplied to speaker 906 across sound signal amplifier 904. The video signal is supplied to CRT 907 across video signal amplifier 905. The video signal is displayed on CRT 907 by superimposing a caption thereon.

Operating circuit 923, as above described, accesses the memory every time a tuning command is fed, regardless of whether or not the caption data is being stored in the memory. This access, when the caption data is not stored in the memory, is useless and wastes time which deteriorates the response quality of a tuning processing circuit. In order to avoid wasting time, it has been proposed that the channel data and caption data be stored in a random access memory (hereinafter called RAM) of microcomputer 922. However, in most cases, the capacity of RAM is insufficient for this purpose, which proves that this proposal is impractical. According to the present invention, as explained in detail later, the memory device is not accessed when the channel attendant data, including caption data, does not exist. Also according to the present invention, the channel attendant data is not stored in a RAM of a microcomputer while channel data is stored therein. An insufficient RAM capacity thus does not occur.

The present invention relates to a memory device for channel selection in a TV receiver comprising:

(a) a nonvolatile memory for storing at least one set of channel data and channel attendant data,

(b) a RAM having a channel data storing part, which accesses and stores all channel data stored in the nonvolatile memory.

When a read tuning command is given, a read address search means, which corresponds to operating circuit 923 in the prior art described above, accesses the nonvolatile memory in order to search addresses of the channel attendant data if a specified channel exists in the RAM. When no specified channel data exists in the RAM, the read address search means does not access the nonvolatile memory, which avoids wasting time.

A memory device of a second exemplary embodiment according to the present invention further has a writing means for the channel attendant data.

A memory apparatus of a third exemplary embodiment according to the present invention has a display means for displaying the read channel attendant data onto a CRT.

The invention is best understood from the following detailed description when read with the accompanying drawings, in which:

FIG. 1 illustrates a block diagram of a memory apparatus of a first exemplary embodiment according to the present invention.

FIG. 2 illustrates a block diagram of a memory apparatus of a second exemplary embodiment according to the present invention.

FIG. 3 illustrates a block diagram of a memory apparatus of a third exemplary embodiment according to the present invention.

FIG. 4 illustrates a conventional tuning apparatus for displaying caption data.

First Exemplary Embodiment

FIG. 1 illustrates a block diagram of a memory device of a first exemplary embodiment according to the present invention. In nonvolatile memory 1, a set of channel data and channel attendant data is stored. In this exemplary embodiment, a reading operation of the channel attendant data stored in nonvolatile memory 1 is explained.

First, a reset input is fed to microcomputer 10. During a short period of time between starting the reset and beginning receipt of input from inputting means 4 of microcomputer 10, channel data reading means 2 reads the channel data from nonvolatile memory 1 and stores the channel data into channel data storing part 3 in a RAM. The RAM is included in microcomputer 10. The channel attendant data is not stored in the channel data storing part 3.

Second, a tuning command for reading is given. Channel data specified by the tuning command for reading is fed from input means 4 to channel input part 5. Read channel data comparing means 6 judges `YES` when the specified channel data is stored in channel data storing part 3, and judges `NO` when the specified data is not stored there.

When a `NO` judgment is given, read address search means 7 does not access nonvolatile memory 1 for reading the channel attendant data, which saves time wasted on unnecessary access. When a `YES` judgment is given, read address search means 7 accesses nonvolatile memory 1 in order to search the address of the channel attendant data which composes one set together with the specified channel data. The searched address is supplied to attendant data reading part 8. Attendant data reading part 8 reads the channel attendant data by using the supplied address, and supplies the data to a next stage.

Second Exemplary Embodiment

FIG. 2 illustrates a block diagram of a memory device of a second exemplary embodiment according to the present invention. In addition to reading the channel attendant data as explained in the first exemplary embodiment, the second exemplary embodiment makes it possible to modify or write the channel attendant data in the nonvolatile memory. Since the reading operation of the channel attendant data is the same as that of the first exemplary embodiment, only a modifying or writing operation is explained in this second exemplary embodiment.

First, a reset input is fed to microcomputer 10. During a short period of time between starting the reset and beginning receipt of input from input means 4 of microcomputer 10, channel data reading means 2 reads the channel data from nonvolatile memory 1 and stores the channel data into channel data storing part 3 in the RAM.

Second, a tuning command for writing is given. Channel data specified by the tuning command for writing is fed from input means 4 to channel input part 5. At the same time, new channel attendant data for modifying or writing is fed into attendant data input part 211. Write channel data comparing means 212 judges `YES` when a specified data is stored in channel data storing part 3, and judges `NO` when the specified data is not stored there. When a `YES` judgment is given, write address search means 213 accesses nonvolatile memory 1 in order to search the address of the channel attendant data which composes one set together with the specified channel data. Attendant data writing part 214 writes the new channel attendant data into the searched address, and thereby the channel attendant data is modified. When a `NO` judgment is given, write address search means 213 accesses nonvolatile memory 1 in order to search a vacant address in the memory. Attendant data writing part 214 writes a set of this new channel data and channel attendant data into the searched address.

Third Exemplary Embodiment

FIG. 3 illustrates a block diagram of a memory device according to a third exemplary embodiment of the present invention. In this third exemplary embodiment, a display means for displaying read caption data in channel attendant data is added to the second exemplary embodiment. Attendant data reading part 8 supplies the caption data included in the channel attendant data which was read out, to caption processing circuit 315, where the caption data is converted into a caption signal. The caption signal is overlaid on a video signal in display circuit 316, and displayed on CRT 317.

As the invention may be embodied in several forms without departing from the spirit of essential characteristics thereof, the present embodiments are therefore illustrative and not restrictive, since the scope of the invention is defined by the appended claims rather than by the description preceding them, and all changes that fall within metes and bounds of the claims, or equivalence of such metes and bounds thereof are therefore intended to be embraced by the claims.