Start Code for Signalling Bits

1. Field of the Invention

The invention relates to a extended television signal comprising signalling bits for conveying control information to control an extended decoder.

2. Description of the Related Art

Such an extended television signal has been described in the German patent application DE-A-41.12.712. This prior art document discloses a signalling bits signal comprising run-in information data, start information data, and useful information data. The run-in information data comprises eight sine oscillations for synchronizing a phase-locked loop. The start information data serves for addressing the useful information data and for catching the start of the useful information data. As soon as the receiver determines the presence of recognition data in the input signal, the receiver is able to process the useful information data with the correct phase. No further details with regard to the start information data are given. The useful information data are, for example, bi-phase coded. The signal is DC-free to facilitate magnetic recording.

It is, inter alia, an object of the invention to provide an extended television signal having signalling bits which are reliably decodable under severe circumstances. To this end, one aspect of the invention provides an extended television signal comprising signalling bits for conveying control information to control an extended decoder, the signalling bits comprising a start code and data bits, wherein the start code's main lobe of spectral energy resides in the lower spectral area of a baseband television signal, said lower spectral area having a maximum frequency below 2 MHz, which maximum frequency is preferably 1.7 MHz, the start code having an amplitude dip at zero frequency, and the start code having good aperiodic correlation properties and a predetermined minimum bit Hamming distance to the data bits when shifted in the direction of the data bits following the start code. A second aspect of the invention provides an extended television signal decoder comprising means coupled to receive an extended television signal (CVBS) comprising image data, signalling bits for conveying control information to control processing operations with regard to said image data, and synchronizing information (VCS), for deriving said synchronizing information (VCS) from said extended television signal (CVBS); means coupled to receive said synchronizing information (VCS) for selecting a signalling bits window; means coupled to receive said extended television signal for decoding said signalling bits during said signalling bits window; wherein the signalling bits comprise a start code and data bits, the start code's main lobe of spectral energy resides in the lower spectral area of a baseband television signal, said lower spectral area having a maximum frequency below 2 MHz and which maximum frequency is preferably 1.7 MHz, the start code having a local spectral minimum at DC, and the start code having good aperiodic correlation properties and a predetermined minimum bit Hamming distance to the data bits when shifted towards or over the data bits following the start code. A third aspect of the invention provides a method of decoding an extended comprising the steps of receiving an extended television signal (CVBS) comprising image data, signalling bits for conveying control information to control processing operations with regard to said image data, and synchronizing information (VCS), for deriving said synchronizing information (VCS) from said extended television signal (CVBS); selecting (7) a signalling bits window in dependence on said synchronizing information (VCS); decoding said signalling bits during said signalling bits window in response to said extended television signal (CVBS); wherein the signalling bits comprising a start code and data bits, the start code's main lobe of spectral energy resides in the lower spectral area of a baseband television signal, said lower spectral area having a maximum frequency below 2 MHz and which maximum frequency is preferably 1.7 MHz, the start code having a local spectral minimum at DC, and the start code having good aperiodic correlation properties and a predetermined minimum bit Hamming distance to the data bits when shifted towards or over the data bits following the start code.

The extended television signal in accordance with the invention comprises signalling bits for conveying control information to control an extended decoder, wherein the signalling bits comprise a start code and data bits. The start code's main lobe of spectral energy resides in the lower spectral area of a baseband television signal below 2 MHz, and preferably below 1.7 MHz. The start code is preferably (almost) DC-free, and the start code has good aperiodic correlation properties and a predetermined minimum bit Hamming distance (in number of bit coincidences) to the data bits when shifted towards or over the data bits following the start code.

The start code selected according to the these criteria appears to yield a very reliable decodable extended television signal even under severe circumstances. It is to be noted that the expressions (almost) DC-free or a spectral minimum at zero frequency do not necessarily imply that the signalling bits or its start code part are centered around a zero voltage level; the signalling bits may have a voltage offset. Aperiodic correlation is another expression for autocorrelation, as explained on page 346 of R. E. Ziemer and W. H. Tranter, Principles of Communications, systems, modulation, and noise, Houghton Mifflin Company, Boston U.S.A., 2nd edition 1976. In the context of this application, a code can be said to have good aperiodic correlation properties when the autocorrelation of the code, normalized to a global maximum of one at zero delay, shows a difference of at least one-half between the global maximum and any local maxima. It appeared to be sufficient if the predetermined minimum bit Hamming distance of the start code to the data bits is one, while a preferred minimum bit Hamming distance of the start code to the data bits is three.

These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter.

In the drawings:

FIG. 1 shows a preferred power spectral density (PSD) of the signalling bits;

FIG. 2 shows the last part of the run-in, and the start code;

FIG. 3-5 show embodiments of a wide screen signalling bits decoder;

FIG. 6 shows a block diagram of start code detection;

FIG. 7 shows a block diagram of a first data bit estimator embodiment;

FIG. 8 shows a block diagram of a second data bit estimator embodiment;

FIG. 9 shows the position of the Wide Screen Signalling bits in line 23;

FIG. 10 shows an example of bi-phase-L modulation coding;

FIGS. 11, 11a-11c show a wide screen signalling bits transmission scheme table; and

FIGS. 12a and 12b show examples of letterbox signals with logos and subtitling.

The Proposal for Wide Screen Signalling Bits (below), which forms an integral part of the present disclosure, describes a proposal for standardization of transmitting signalling information to a TV receiver. This signalling information contains the aspect ratio, some enhanced services, subtitles, etc. The proposal is developed for broadcasting (terrestrial, satellite, cable etc.) only, as well as for such broadcasting in combination with VCR's. Even under the condition of the replay of a copy of a VCR recording of the broadcasted signalling bits, the signalling bits should be reliably decodable. To meet the requirement that the signalling bits are reliably decodable under such severe conditions (VCR's), one aspect of the invention provides that the main spectral energy of the signalling bits resides in the lower spectral area of baseband video, below 2 MHz and preferably below 1.7 MHz. This frequency constraint can be met by the requirement that at a 5 MHz sample rate, at least three successive channel bits should each time be equal to each other. On the other hand, it appeared that making a higher number of successive channel bits each time equal to each other yields little improvement in detection reliability but, of course, restricts the number of transferable bits.

It is noted that this upper frequency limitation requirement differs substantially from the characteristics of, for example, teletext and Video Program System (VPS) signals. Both prior art signal spectra have frequencies up to 5 MHz, a main lobe of the VPS spectrum being at about 2.5 MHz which is believed to be far too high for the signalling bits start code.

The signalling bits include a start code and data bits, preferably preceded by a run-in. The invention is based on the recognition that to meet the object of the invention, i.e., to obtain very reliably decodable signalling bits, the start code should have the following characteristics:

1. The start code's main lobe of spectral energy should reside in the lower spectral area of baseband video (which is also required for the data bits) below 2 MHz. Eg., this lower spectral area is about 0-1.7 MHz. Further, the start code should preferably have a local spectral minimum at DC.

2. The start code should have good aperiodic correlation properties.

3. The start code should have some minimum distance (in number of bit coincidences) when shifted over the data bits transmitted directly after the start code. This could be implemented by coding the start code slightly different from the bi-phase modulation code of the data bits (see the Proposal for Wide Screen Signalling bits below).

Items 1 (no high frequencies) and 2 (good autocorrelation properties) are in practice, difficult to combine. A good compromise has been found, in which the start code has a frequency peak at about 900 kHz and a main lobe ML of spectral energy in a frequency area below 1.7 MHz, above which only about 6% of the signal energy is present, see the power spectral density versus frequency graph of FIG. 1. As shown in FIG. 1, the Wide Screen Signalling (WSS) bits preferably have a spectral minimum at about 1.7 MHz to reduce group delay distortions and disadvantages caused by amplitude attenuations which may exceed 27 dB occurring at the maximum frequency (2-2.5 MHz) which VHS video recorders allow to pass when a copy is made of an already recorded original.

The extended television signal provides an enhanced detection reliability. In case of an undisturbed signal, a minimum bit Hamming distance of the start code to the run-in of one is sufficient, while a preferred minimum bit Hamming distance of the start code to the run-in is six.

In FIG. 2, one example of the last part of the run-in RI as well as the start code SC is presented. In accordance with an embodiment of the present invention, the start code is based on inverted Barker codes (see R. E. Ziemer and W. H. Tranter, Principles of Communications, systems, modulation, and noise, Houghton Mifflin Company, Boston U.S.A.; 2nd edition 1976) of length 4 and 5, in order to meet the second characteristic.

As listed in Ziemer and Tranter, page 346, the following Barker sequences are known:

The inverted bit sequences (0 and 1 interchanged), the reversed bit sequences (the above sequences when read from right to left), and the bit sequences which are both inverted and reversed are also appropriate.

As an alternative to Barker codes, pseudo-noise codes and digital sequences derived from Hadamard matrices (also mentioned in Ziemer and Tranter) can be used.

The inverted Barker code of length 4 is [0010] and of length 5 [00010]. The embodiment shown is based on the recognition that the Barker code of length 4 (B4) is a subset of the Barker code of length 5 (B5). (Similarly, the Barker sequence of lengths 2, 3 and 4 are subsets of the Barker sequences of lengths 3, 4 and inverted 7, respectively.) The inverted Barker code has been convolved with a kind of bi-phase modulation code in order to meet the first characteristic, as shown below:

After this modulation coding, the result looks like the following:

The start code given in FIG. 2, is based on the inverted Barker length 4 code. If this start code is extended by the last 6 bits of the run-in (see FIG. 2), then it can be extended to the inverted Barker code of length 5. In order to meet the third characteristic, small changes are introduced to the (kind of) bi-phase modulated inverted Barker sequences. The final result is given by:

The Barker 4 based start code gives an overall minimum bit Hamming distance 3, and a minimum bit Hamming distance 6 to the run-in and the start code only. The Barker 5 based start code gives an overall minimum bit Hamming distance 5, and a minimum bit Hamming distance 8 to the run-in and start code only. By selecting nested Barker sequences in accordance with the present embodiment of the invention, it becomes possible to provide decoders which do not just use the start code, but which rely on the combination of the start code and the tail of the run-in, and which thus are able to benefit from the increased bit Hamming distances and increased detection reliability associated with the longer, Barker 5 sequence.

In order to make sure that a phase locked loop (PLL) can obtain acquisition from and lock to the run-in, the run-in should have at least 8 transients. The following run-in resulted:

In FIG. 3, a scheme is presented which shows the basic blocks of the Wide Screen Signalling (WSS) decoder. This circuitry shown is part of a device which is used for decoding of several data processes in a television signal, like teletext, VPS, etc. Within the context of this application, we concentrate on WSS.

The composite video baseband signal (CVBS) is fed into a (state of the art) input clamp and sync separator circuit 1. The sync separator 1 slices the composite video to give a separate video composite sync (VCS) for line timing and field timing. The clamped CVBS is applied to a video analog-to-digital converter (ADC) 3 which outputs digital CVBS (DCVBS) at a sample frequency of 13.5 MHz. The DCVBS is applied to a digital video input processor (DIGVIP) 5. This DIGVIP 5 includes a state of the an adaptive clock regenerator circuit which exists of a combination of an adaptive slicer, a digital phase lock loop (DPLL) and sampler. The DPLL locks on the data input signal with a sample frequency of 5 MHz (in the case of WSS in line 23!). The output of the DIGVIP 5 carries hard decoded estimates of the 5 MHz grid data samples. This DIGVIP output has been realized by two output lines: TTD and TTC. TTD carries a binary data stream with a clock frequency of 13.5 MHz. TTC is a data clock line with a clock frequency of 13.5 MHz. TTC determines with a low to high transient that a corresponding TTD sample is a valid sample. Hence, in the case of WSS, almost every second sample of TTD is a valid sample.

The line timing circuit 7 and field timing circuit 9 generate timing windows for wide screen signalling in line 23. The occurrence (123) of line 23 is signalled to the DIGVIP 5 so that it can switch the DPLL's discrete time oscillator (DTO) to 5 MHz. A timing window is generated for the run-in and the head of the start-code of WSS. The gain of the PLL loop is lowered when this window is active in order to obtain fast acquisition and lock. A start-code timing window is generated to enable the start-code detection process. This start-code timing window should have a timing tolerance of at least .+-.4 .mu.s. This tolerance, which has been determined by practice, is absolutely necessary in the case that a VCR signal is input. The explanation is that the VCR's head switch introduces a residual timing error in line 23. This timing error is even worse when a tape exchange has occurred or when the VCR is replaying a copy tape with WSS.

The output lines TTD and TTC of DIGVIP 5 are applied to a block start-code detector 11. This block will be explained in detail below. If the start-code detection circuit 11 detects a start-code then the timing of WSS is assumed to be estimated and a "WSS line 23 detected" signal WSS23 is produced. Since we have knowledge about the relative position of the data referred to the start-code, we have now an estimate of the timing of the WSS data. The WSS data estimation process is now activated. How this estimation is done will be explained in detail below. The output of the WSS data estimator 13 will be 14 data bits and 14 corresponding violation flags. When a violation flag is set, it means that the corresponding data bit might be unreliable. FIG. 11 shows, under the headings "group 1" to "group 4", one example for the significance which can be assigned to the 14 data bits 0 through 13.

The 14 data bits and 14 violation flags are stored into a buffer 15 and can be addressed by the outer world, a TV-set, via IIC communication. Now, within the TV-set, the WSS data can be evaluated and further processed. The violation flags are used as a means to gain knowledge about the reliability of the input WSS signal in order to determine a strategy for further processing.

In FIGS. 4, 5, alternative WSS-decoder circuits are presented. The main difference is the inclusion of a decoder low-pass input filter 17. In FIG. 4, it is a digital filter between the ADC 3 and the DIGVIP 5, and in FIG. 5 it is an analog filter between the input clamp and sync separation circuit I and the ADC 3. In both cases, a switch controlled by the line 23 signal 123 applies the output of the LPF 17 or its input to the circuit (DIGVIP 5 in FIG. 4, ADC 3 in FIG. 5) which follows the LPF 17. The digital filter (FIG. 4) has preferably a [1 2 2 1] or [2 3 4 4 3 2] impulse response at 13.5 MHz sample frequency because of a number of reasons:

An amplitude response which is a close copy of the frequency domain representation of the elementary pulse which is used at the WSS-encoder. This use is understood to mean that in the encoder, the Wide Screen Signalling bit stream is low-pass filtered by means of a low-pass filter having an amplitude response corresponding to the frequency domain representation of the elementary pulse. The used elementary pulse EP can be described by the formula EP=cos.sup.2 (.pi./2*t/(200 ns)) when -200 ns.ltoreq.t.ltoreq.+200 ns, and EP=0 elsewhere.

A spectral null at or in the direct neighborhood of the color subcarrier. Explanation: some VCR's average color information over two lines so that color subcarrier might leak into line 23. Suppression of color subcarrier by a WSS-decoder input filter is therefore wanted if VCR signals are going to be its input.

A [1 2 2 1] digital filter meets these demands quite closely. Such a filter gives a noise power suppression of more than 4 dB unweighed in the PAL vision bandwidth of 5 MHz. The [2 3 4 4 3 2] filter is more complex, has a steeper roll-off and is useful as a compromise if the WSS data bits are hard decoded instead of soft decoded. For an explanation as to the notions soft and hard decoding, reference is made to J. G. Proakis, Digital communications, second edition, McGraw-Hill Book Co, 1989. Both digital filters have a spectral null at 4.5 MHz which is sufficiently close enough to the color subcarrier frequency f.sub.sc 32 4.43361875 MHz.

If an implementation is chosen which includes an analog low-pass WSS-decoder input filter 17 (see FIG. 5), then its response should either be that of the elementary pulse of the WSS-encoder combined, if necessary, with a notch at the color subcarrier frequency, or look like the amplitude response of a [2 3 4 4 3 2] digital filter with a sample frequency of 13.5 MHz. An advantage of an analog filter might be that it can be put outside the teletext and WSS bits decoder IC.

The process of start-code detection is presented in successive order by the following items:

The vertical and horizontal sync in CVBS control the process of finding line 23. This part is taken care of by the field timing circuit 9.

Line 23 has been found. From the horizontal sync, the line timing circuit 7 generates a time window which enables the search for the start code of wide screen signalling. This window has a timing tolerance of at least .+-.4 .mu.s. Hence, this window has at least a duration of 14 .mu.s, as the combination of the start code and the run-in tail lasts 6 .mu.s.

During the time that the start code window is active, the start code is searched in real time. In one embodiment, a start code is said to be detected whenever the following two criteria are both met (see FIG. 6):

All 14 a priori selected bits from the start code and run-in tail must be correct.

From 5 a priori selected start code bit pairs and 1 bit pair at the transition of start code and run-in, minimal n pairs must be free from error. Those bit pairs that are not correct should not have both bits inverted. This number n is a predetermined value; n .epsilon.{0, 1, . . . , 6}. Good choices appeared to be n=4 or n=5.

As soon as the criteria for start-code detection are met, the process of start code search is halted. Now, the timing of the wide screen signalling information has been estimated.

FIG. 6 shows a block diagram of a start code detector. The received data is shifted into a shift register 51. As both the tail of the run-in RI and the start code SC are known, it is possible to provide all shift register outputs, which are supposed to supply zero bits in case of a correct reception, with inverters (indicated by small circles 53). Taking these inverters 53 into account, all output signals should be logical "1". Preferably, like outputs are filtered by 14 small filters 55 which furnish the left-hand input signal if the left-hand and right-hand input signals are equal, and which furnish the middle input signal otherwise. The outputs of the 14 filters 55 are applied to a logical AND circuit 57 which supplies a logical "1" in case of a correct reception of the start code SC and the run-in tail RI. The 14 filters 55 could be omitted after appropriate low-pass pre-filtering, in which case, the middle input bit of each filter would be applied to the logical AND circuit 57. These middle bits are believed to show a good detection reliability even under bad reception conditions (for example, after recording on a VCR which, inter alia, results in a low-pass "filtering" of the signal) because their respective left and right adjacent bits should have the same value upon correct reception.

The start code detector of FIG. 6 further checks the zero-one and one-zero transition bit pairs in the start code SC by applying the transition bit pairs to logical OR circuits 59 whose outputs are applied to inputs of a logical AND circuit 61. Again, in case of a correct reception of the start code, the logical AND circuit 61 supplies a logical "1".

To increase the detection quality even further, the same six start code transition bit pairs are applied to logical AND circuits 63, whose outputs are applied to a logical circuit 65 which furnishes a logical "1" if at least n of the output signals of the logical AND circuits 63 are logical "1". If, in at least one of the transition bit pairs, both bits are inverted, the corresponding OR circuit will furnish a logical "0" to the AND circuit 61 which will thus also furnish a logical "0" output signal.

Finally, a logical AND circuit 67 receives the outputs of the logical circuits 57, 61 and 65 and furnishes a "start code detected" signal if all outputs are logical "1".

If no start code is detected, no line 23 detection signal is generated and further WSS processing in the present frame is halted. In the other case, a line 23 detection signal is generated and the WSS data can be estimated.

Let's assume that the start-code has been detected. Now we have an estimate of the timing of the start code, we also have an estimate of the location of the data. The 14 data bits can now be estimated. Each data bit includes 6 hard sliced samples. Therefore no soft decision decoding is possible (see the above-mentioned book of Proakis). The first 3 samples should be the inverse of the second 3 samples. The estimation process of the data is presented in FIG. 7 and is the following. Take the first 3 samples of the 6 samples present in a shift register 71. A counter 75 counts the number of ones. If the number of ones is equal or greater than 2, a decision circuit 79 decides that the data bit b is "1"; in the other case, the decision circuit 79 decides that a "0" has been received. Repeat the same procedure for the second 3 samples by means of a counter 73 and a decision circuit 77. The results of the decision circuits 77, 79 are compared by a logical NOT-EX-OR circuit 81. If the results are each other's inverse then the data estimate b is reliable, else not. The data reliability is signalled by violation flags v; each data bit b has its own reliability flag v. This process is executed 14 times.

An alternative data bit estimator is shown in FIG. 8. The first and second output samples of the shift register 71 are applied to a logical AND circuit 83, the second and third output samples to an AND 85, and the first and third output samples to an AND 87. The fourth and fifth output samples of the shift register 71 are applied to a logical AND circuit 89, the fifth and sixth output samples to an AND 91, and the fourth and sixth output samples to an AND 93. The outputs of the ANDs 83-87 are applied to a logical OR circuit 95, and the outputs of the ANDs 89-93 are applied to a logical OR circuit 97. The OR 97 furnishes the data bit b. The outputs of the ORs 95 and 97 are applied to the logical NOT-EX-OR circuit 81 to obtain the corresponding violation flag v.

The 14 data bits and their corresponding violation flags are put into a buffer. The outer world can access this data in the buffer via IIC communication. Further processing has already been mentioned above.

For a smooth introduction of new television services with a 16:9 display aspect ratio in PAL and SECAM standards, it is necessary to signal the aspect ratio used together with some switching information to the television receiver. The receiver should be capable of reacting automatically to this information by displaying the video information in a specified aspect ratio. This signalling is to be considered separately from the type of system used, but it should allow transmission of system related switching information as well.

The proposed standard leaves room for the later allocation of additional switching information, related to the introduction of enhanced television services. The proposed standard is applicable for 625 line PAL and SECAM television systems, but there is potential to adopt it to other standards as well.

This proposal is applicable to 625 line PAL and SECAM systems in use, in case where wide-screen signalling is required by the broadcasters. It specifies the wide screen signalling information, the coding and the way of incorporating the coded information into a 625 line system. The wide screen signalling information contains information on the aspect ratio range of the transmitted signal and its position, on the position of the subtitles and on the camera/film mode. Furthermore some bits are reserved for future EDTV signalling (e.g. PALplus) as well as for future use.

This proposal specifies the transmitted signal. An annex gives the rules of operation for the minimum requirements for receiver display formats as well as for subtitling.

For the purpose of this standard the following definition shall apply: Letterbox operation is the use of a picture format with an aspect ratio greater than 1.33, in such a way that empty (black) lines are added to conform to a 4:3 transmission format.

This paragraph specifies the line code of the wide-screen signalling. The signalling bits are transmitted as a data burst in the first part of line 23. The position of the beginning of the wide screen signalling bits WSS is 11.0.+-.0.25 .mu.s from Oh of the horizontal sync pulse H, as indicated in FIG. 9. In each frame line 23 shall be occupied with the wide screen signalling.

The clock frequency is: Fs=5 MHz (.+-.1*10.sup.-4)

The sample period is: Ts=200 ns

The signal shape is approximately a sine squared pulse.

The half amplitude pulse duration is: 200 ns .+-.10 ns.

The signal amplitude with respect to a maximum video signal amplitude of 700 mV is: 500 mV .+-.5%

The type of modulation coding is hi-phase modulation coding according to FIG. 10. The duration of one data bit equals Td. The data bits are inserted in NRZ-L, in which one data bit period equals 2 times 3 clock periods: Td=6 Ts.

The preamble contains a run-in and a start code. The preamble is given in the wide screen signalling bits transmission scheme table shown in FIGS. 11a-11c. There are 14 bits in total. One out of these 14 bits is allocated to the error detection code. There are 13 data-bits available for transmission of information. The data bits are grouped in 4 data groups, see the table shown in FIGS. 11a-11c. For error detection, an odd parity bit has been introduced. The odd parity bit belongs to the first 3 data bits only.

The 13 data carrying bits are grouped in 4 groups. Group 1 contains 4 bits in which the first 3 bits carry data and the last bit denotes the odd parity bit over the first three data bits. Group 2 contains 4 data bits, group 3 contains 3 data bits and group 4 contains 3 data bits.

The data bits are labelled b.sub.0 up to and including b.sub.2, and b.sub.4 up to and including b.sub.13. Bit b.sub.3 is the odd parity bit as is shown in FIGS. 11a-11c and Table 1. The index also indicates the order of transmission: i.e. b.sub.0, is the first transmitted bit.

Bits b.sub.0, b.sub.1, b.sub.2 denote the aspect ratio label, the letterbox format and position according to Table 1. Bit b.sub.3 denotes odd parity of bits b.sub.0, b.sub.1, b.sub.2, b.sub.3 according to Table 1.

The aspect ratio label indicates a range of possible aspect ratio. All aspect ratio's falling in these ranges are labelled by the same code. Table 2 indicates the aspect ratio ranges.

Bit b.sub.4 denotes the film bit in accordance with table 3.

Bits b.sub.5, b.sub.6 and b.sub.7 are reserved. Should all be set to `0`.

Bit b.sub.8 denotes the subtitles within Teletext bit in accordance with table 4.

Bits b.sub.9, b.sub.10 denote the subtitling mode in accordance with table 5.

FIGS. 12a and 12b indicate the meaning of the terms `in active image area` and `out of active image area`. If the subtitle is within the white center part of the letterbox picture, the subtitle is within the active image area. If the subtitles are in the black bars of the letterbox picture, the subtitle is out of the active image area. FIG. 12a illustrates the letterbox center mode, while FIG. 12b illustrates the letterbox top mode. Logos may be positioned in the upper left corner as indicated by the arrows.

Bits b.sub.11, b.sub.12, b.sub.13 are reserved. Should all be set to `0`.

A1--RECEIVER DISPLAY FORMATS

To ensure automatic selection of the most appropriate display mode, the receiver with a 16:9 display should comply with the following minimum requirements:

It should be noted that the viewer should be free to override the automatically selected display condition. The speed of the automatic change of aspect ratio is limited mainly by the response time of the deflection circuit.

A2--SUBTITLING

When the subtitling of letterboxed pictures is in the `out-of active image area`, even when partly, the new 16:9 receivers will loose this information, unless they display the picture in the 4:3 mode. This would mean that on the 16:9 receiver black bars would be present all around the active image content and this is to be avoided.

To serve both the interests of the existing 4:3 and the new 16:9 viewers, it is of great importance, that

wide screen programs should always have the subtitling (whether `in active image area` or `out of active image area`) conveyed as well by means of the Teletext service, and that

new 16:9 receivers, complying with this standard, should be equipped with a Teletext decoder and always have the possibility of detecting the Teletext presence bit b.sub.8.

A3--PROCEDURE IN ABSENCE OF SIGNALLING

In the absence of signalling bits, the receiver should go to a default mode.

B1--LOW-PASS PRF-FILTERING

It is recommended that the received wide screen signalling bits are low-pass filtered before decoding. This low-pass filter should preserve the main spectral energy of the wide screen signalling bits signal, which resided in the spectral domain of 0 MHz up to 1.67 MHz.

B2--RESPONSE TIME ON A CHANGE IN THE RECEIVED SIGNALLING INFORMATION

The maximum response time on a change in the received signalling bits information is recommended to be 120 ms.

It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims.