Background of the Invention
Typically in integrated circuit memories isolation devices have been interposed between a p-sense amplifier and a shared n-sense amplifier in the memory array. However in order to conserve die space only one p-sense amplifier may be used. In this case the isolation device is interposed between a digit line pair and the p-sense amplifier and between the digit line pair and the n-sense amplifier. In order for the p-sense amplifier to pass the full value of the charge on the digit line, the isolation device, typically an n-channel transistor, must have a gate voltage equal to the value of the charge plus a threshold voltage of the transistor. Therefore it becomes necessary to drive the potential of the gate of the isolation n-channel transistor to a pumped potential. The pumped potential is a potential elevated above the supply potential. To do this the gate is driven to a pumped supply potential by a driver circuit which is interposed between a pumped node, which has been pumped to the pumped potential, and the gate of the n-channel. However, pumping the supply potential to a pumped potential at the pumped node consumes a significant amount of power.
Summary of the Invention
The invention is a voltage level translator circuit having first and second driver circuits connected at their outputs to an output node of the voltage level translator circuit. Typically the output node is a transistor gate, such as the gate of an isolation device. The first driver circuit is interposed between a reference node and a supply node connected to a supply potential. The second driver circuit is interposed between a pumped supply node and the reference node. The pumped supply node is pumped to a pumped potential greater than the supply potential by a pump circuit. The output node is driven toward the supply potential by the first driver circuit and then is driven toward the pumped supply potential by the second driver circuit. The actuation and deactuation of the driver circuits may be controlled by signals external to the circuit of the invention or a detector circuit of the invention. The detector circuit determines when to deactuate the first driver circuit and actuate the second driver circuit.
The invention is also the method of driving the output node to the pumped potential with minimal power consumption. Power is conserved by coupling the output node to the supply node and then driving the potential of the output node toward the supply potential. After the potential of the output node is pulled toward the supply potential, the output node is decoupled from the supply node and coupled to the pumped supply node. The potential of the output node is then driven toward the pumped potential. Since the pump circuit is only about 30-40% efficient it takes less power to pump the output node toward the pumped potential by coupling it to the supply node prior to coupling the output node to the pumped supply node. Thus by using the circuit and method of the invention power is conserved.
Brief Description of the Drawings
FIG. 1 is a block schematic of the two stage voltage level translator circuit of a first embodiment of the invention.
FIG. 2 is a block schematic of the voltage level translator circuit of the invention and isolation gates, digit line pairs, and p and n-sense amps.
FIG. 3 is a block schematic of a two stage voltage level translator circuit of a second embodiment of, the invention.
FIG. 4 is a more detailed schematic of a circuit of the invention.
Detailed Description of the Invention.
The circuit of the invention is a two stage voltage level translator circuit. A first embodiment of the voltage level translator circuit 10 of the invention is shown in FIG. 1. The voltage level translator 10 comprises a first driver circuit 15 and a second driver circuit 20. The first driver circuit 15 is a driver circuit interposed between a reference node 25 and a supply node 30 connected to a supply potential. The second driver circuit 20 is interposed between a pumped supply node 35 and the reference node 25. The pumped supply node is connected to a pump circuit 40 which supplies a pumped potential greater than the supply potential to the pumped supply node.
In the method of the invention the first driver circuit 15 is actuated to couple output node 45 of the voltage level translator circuit 10 to the supply node 30. The potential of output node 45 is then driven toward the supply potential. Next, the first driver circuit 15 is deactuated, thereby decoupling supply node 30 and output node 45, and the second driver circuit 20 is actuated. When actuated, the second driver circuit 20 couples node 45 to the pumped supply node 35. The potential of node 45 is then driven from the potential which it reached when being driven toward the supply potential, ideally from the supply potential, toward the pumped potential. Thus, the potential of output node 45 is driven toward the pumped potential, but power is conserved since the potential of output node 45 is driven to the supply potential without the use of the pump circuit 40. The pump circuit 40 is only needed to increase the potential of output node 45 beyond the supply potential.
FIG. 2 shows output node 45 of the level translator circuit 10 connected to gates of isolation devices 50. Two of the isolation devices 50 are interposed between a digit line pair 55 and a p-sense amplifier 60 (PSA), and the other isolation devices 50 are interposed between digit line 56 and n-sense amplifier (NSA) 61. Thus the isolation devices 50 are actuated by the pumped potential of the level translator circuit 10, thereby allowing the isolation devices to drive a full value of the digit line charge through the n-channel isolation devices 50.
An alternate embodiment of the invention is shown in FIG. 3. In this case a level translator circuit 110 of the invention is self timed and has a first driver circuit 115 and a second driver circuit 120. However, in this embodiment a detector circuit 121 monitors the operation of the first driver circuit 115 to determine when the first driver circuit 115 drives the potential of output node 145 to the supply potential. The detector circuit 121 generates signals to a control circuit 111 which deactuates the first driver circuit 115 and actuates the second driver circuit 120 thereby allowing the second driver circuit 120 to drive the potential of node 145 from the supply potential to the pumped supply potential (see the output signal shown in FIG. 3).
FIG. 4 is a more detailed schematic of a level translator circuit 110 of the invention having a detector circuit 121 of the invention. A control circuit 111 responds to two internal signals generated in the detector circuit 121 and responds to an external signal to control the operation of the level translator circuit 110. The detector circuit 121 monitors first driver circuit 115 to determine when the potential of output node 145 has been fully driven toward the supply potential when coupled to node 125 through transistor 126. When this occurs the detector circuit 121 generates the internal signal which deactuates the first driver circuit 115 (transistor 126) and actuates the second driver circuit 120. Actuating the second driver circuit 120 actuates transistor 127 and couples output node 145 to the pumped supply node 130 through actuated transistor 127.
Since p-channel transistor 150 and n-channel transistor 155 are controlled by the same signal, the pull down portion of the first driver circuit 115 is not used to drive the reference potential to output node 145; rather, the pull down portion of the second driver circuit 120 is used to pull the output node to the reference potential when the isolation gates, shown in FIG. 2, are deactuated.
Although the invention has been described with respect to specific embodiments, the invention should be read as limited only by the claims.