Isolation Circuitry for Transmitter Electronics in Process Control System

The present invention relates to process control systems. More specifically, the present invention relates to isolation circuitry for use in transmitters of a process control system

Process control systems are used in manufacturing plants to monitor operation of a process. A transmitter is placed in the field and monitors a variable of the process, for example, pressure, temperature or flow. The transmitter couples to a control loop and transmits information over the control loop to a controller which monitors operation of the process. Typically, the control loop is a two-wire loop carrying a current which also provides power for operation of the transmitter. Communication standards include the Fieldbus standard in which digital information is sent to the transmitter. HART.RTM. is another standard which allows communication over a 4-20 mA process variable signal.

One type of process variable sensor is a resistance bridge circuit in which the resistance of the bridge varies in response to the process variable. Other sensors include capacitance, vibrating beam, or other. An input signal is applied to the bridge and the bridge output is monitored to determine the process variable. To meet certain Intrinsic Safety standards, the bridge circuit must be "infallibly" electrically isolated from the rest of the transmitter. Such standards are set forth by, for example, European CENELEC standards EN50014 and 50020, Factory Mutual Standard FM3610, the Canadian Standard Association, the British Approval Service for Electrical Equipment in Flammable Atmospheres, the Japanese Industrial Standard, and the Standards Association of Australia. The Intrinsic Safety requirements are intended to guarantee that instrument operation or failure cannot cause ignition if the instrument is properly installed in an environment that contains explosive gasses. This is accomplished by limiting the maximum energy stored in the transmitter in a worst case failure situation. Excessive energy discharge may lead to sparking or excessive heat which could ignite an explosive environment in which the transmitter may be operating.

The prior art has primarily used two techniques to achieve infallible isolation between the sensor circuitry and the transmitter circuitry. The first technique is to provide sufficient mechanical segregation or spacing in the sensor such that it is impossible for a component failure to cause electrical shorting to another component or ground. The second technique is to design the entire system such that isolation is not required by using components which are rated for large power dissipation such that they themselves are considered infallible.

One problem with both of these techniques is that they require a sufficiently large transmitter housing to provide the required spacing between components or the relatively large size of the high power components. Thus, reduction in transmitter size has been limited when complying with Intrinsic Safety requirements using the above two techniques.

The present invention provides a technique for meeting Intrinsic Safety requirements using a relatively small area thereby allowing reduction in the size of the overall transmitter. The present invention is a transmitter including electronic circuitry and a bridge circuit. The electronic circuitry generates a reference level and has a process variable input for receiving an input related to the process variable. Output circuitry of the electronic circuitry transmits the process variable. The sensor bridge circuit has a sensor bridge input and a bridge output. The sensor bridge output is related to the sensed process variable. Isolation circuitry couples the electronic circuitry to the sensor bridge circuit. The isolation circuitry includes a first high impedance buffer connected to the reference level which provides a buffered reference. A first high impedance isolator couples the buffered reference to the bridge input. A second high impedance isolator couples the bridge output to a second high impedance buffer. The second high impedance buffer provides the input related to the process variable to the electronic circuitry.

FIG. 1 is a simplified schematic diagram of a process control loop illustrative of possible fault conditions for Intrinsic Safety consideration.

FIG. 2 is a simplified block diagram showing a transmitter in accordance with the present invention coupled to a process control loop.

FIG. 3 is a schematic diagram of transmitter circuitry of the transmitter shown in FIG. 2.

FIG. 4 is a schematic diagram of isolation circuitry coupled to a resistor bridge in accordance with the invention.

FIG. 1 is a simplified schematic diagram of process control system 10 which is illustrative of possible faults for Intrinsic Safety certification consideration. Process control system 10 includes a transmitter 12 located in the field in an environment which may contain explosive gases. Transmitter 12 is connected to control room 14 and barrier circuit 16 which are shown generally at equivalent circuitry 14/16 in FIG. 1. For example, barrier 16 may be a circuit including a fuse, resistors and zener diodes to limit energy transmission. Circuitry 14/16 is modeled as a 30 volt source 18 and a 250.OMEGA. resistor 20. Circuitry 14/16 connected to transmitter 12 through two-wire current loop 22 which carries loop current I.sub.L. Loop 22 connects to input terminals 24 of transmitter 12. Transmitter 12 includes transmitter electronics 26 modeled generally as Zener diode 28 and capacitor 30. Electronics 26 connect to input connection IN of sensor 32 which is a resistor bridge circuit having resistors 32a, 32b, 32c and 32d. Sensor 32 also has output terminals which develop a signal therebetween in response to a sensed process variable. For example, if one of resistors 32a-32d is a resistance strain gage, bridge sensor 32 can be used to sense a process variable such as pressure.

A number of different electrical ground connections are shown in FIG. 1. Ground 36 is a chassis ground such as the chassis or body of transmitter 12. Ground 38 is a power supply voltage V.sub.SS which is used by internal circuitry in transmitter 12.

A power sharing resistor 34 has a resistance of 135.OMEGA.. Resistor 34 is provided such that the electronics in transmitter 12 are exposed to a limited maximum amount of the power that can be delivered to transmitter 12. The maximum power dissipation is realized when the electronics impedance R.sub.E matches the impedance of the power sharing resistor 34 and the barrier resistor 20:

The total power available to the transmitter 26 will be assumed to be 0.9 W. The power sharing resistor 34 limits the maximum power P.sub.MAX to the remaining electronics as given by ##EQU1##

For the voltage source 18 equal to 30 volts as in FIG. 1, the maximum power dissipated by the electronic is given by: ##EQU2## Thus, if resistor 34 is considered infallible in accordance with Intrinsic Safety requirements, the maximum power which components in transmitter 12 will be required to dissipate is 0.584 W. FIG. 1 shows example faults 46A, 46B, 46C and 46D which could occur and short electrical circuitry in transmitter 12. An intrinsically safe design isolates energy storing devices such as capacitors, batteries, inductors, or other devices. Energy storage devices can be isolated with infallible components such as resistors, series capacitors, diodes, or other devices which block or limit the energy discharge path of an energy storage device.

The present invention provides isolation circuitry (not shown in FIG. 1) between transmitter circuitry 26 and sensor bridge 32 which maintains the infallibility of power limiting resistor 34. The present invention, as described below in more detail, isolates circuitry 26 and bridge 32 using relatively large resistance values and high impedance circuitry.

FIG. 2 is a block diagram showing circuitry in transmitter 12 in greater detail. Transmitter 12 is connected to control room circuitry 14 which is modeled as resistor 50 and voltage source 18 through two-wire current loop 22. Barrier circuit 16 separates and isolates transmitter 12 from control room circuitry 14. Transmitter circuitry 26 connects to bridge 32 through isolation circuitry 58 in accordance with the invention. Transmitter circuit 26 includes voltage regulator 60, microprocessor 62 and current control and I/O circuitry 64. Voltage regulator 60 provides a regulated voltage output V.sub.DD with respect to V.sub.ss 38 to operate circuitry in transmitter 12. Microprocessor 62 connects to memory 66, system clock 68 and analog-to-digital converter 70. Microprocessor 62 operates in accordance with instructions stored in memory 66 at an operating rate determined by clock 68. Microprocessor 62 receives a process variable provided by bridge 32 through analog-to-digital converter 70 connected to isolation circuit 58. Current control and I/O circuit 64 is controlled by microprocessor 62. Microprocessor 62 adjusts loop current I.sub.L and/or sends digital representations of the process variable provided by bridge 32. Current control and I/O circuitry 64 is also used to receive information transmitted from control room 14, for example, over loop 22. This received information may comprise, for example, instructions or interrogation requests directed to microprocessor 62.

FIG. 3 is a schematic diagram showing transmitter circuitry 26 in greater detail. Zener diode 28 clamps V.sub.DD at a maximum value and capacitor 30 smooths any voltage ripple on the output of regulator 60. Microprocessor 62 is powered by its connection to V.sub.DD and V.sub.SS. V.sub.DD and V.sub.SS are provided to isolation circuitry 58 (shown in FIG. 4). The output from clock 68 is also provided to isolation circuitry 58. Resistors 80 and 82 develop a reference level for analog-to-digital converter 70. The reference level is buffered by buffer amplifier 84. An open sensor signal 88 from isolation circuitry 58 connects to microprocessor 62 through AD convertor 70. Analog-to-digital converter 70 receives an analog input from isolation circuitry 58.

FIG. 4 is a schematic diagram of isolation circuitry 58 coupled to bridge 32 in accordance with the present invention. Isolation circuitry 58 includes resistors 100, 102 and 104 connected in series between V.sub.DD and V.sub.SS 38. Resistors 100, 102 and 104 generate a 0.8 volt nominal voltage differential which is applied to the non-inverting inputs of operational amplifiers 106 and 108. Amplifiers 106 and 108 form high impedance buffer 110. Operational amplifiers 106 and 108 are connected with negative feedback and provide unity gain amplification. The outputs of high impedance buffer 110 connect to high impedance isolator 112 which includes resistors 114 and 116. Capacitors 119a and 119b connect resistors 114 and 116 to V.sub.SS-I 40.

The output of high impedance isolator 112 provides a differential voltage input to operational amplifier 118 which is connected with negative feedback through resistor 120. The non-inverting input of operational amplifier 118 connects to isolated supply voltage V.sub.DD-I through resistor 122 and to an isolated ground V.sub.SS-I 40 through resistor 124. The inverting input of operational amplifier 118 connects to V.sub.SS-I through resistor 126. Operational amplifier 118 is connected as a differential amplifier having a gain of four.

Bridge 32 is shown with two INPUT connections. One INPUT connection is connected to the isolated supply voltage V.sub.DD-I. The other INPUT connection is connected to the output of operational amplifier 118 through resistor 132. The outputs from bridge 32 OUTPUT are connected to high impedance isolator 134. High impedance isolator 134 includes resistors 136 and 138 which are connected to the inverting and non-inverting inputs of high impedance buffer 140, respectively. High impedance buffer 140 comprises operational amplifiers configured as a high impedance differential amplifier.

Operational amplifier 150 is connected to provide an open sensor detect output to analog to digital connector 70. Operational amplifier 150 has a non-inverting input connected to one input to bridge 32 and an inverting input connected to the isolated power supply V.sub.DD-I through resistor 152 and to the output of operational amplifier 118 through resistor 154. The output of operational amplifier 150 connects to high impedance buffer 156 through resistor 158. Operational amplifier 160 is driven at the common mode input voltage to operational amplifier 140 and provides a guard signal. The output of operational amplifier 160 connects to guard foils 162 and to guard foils 164 through resistor 166. Guard foils 162 and 164 run in the physical proximity of the output from bridge 32.

Power supply isolation circuitry 170 includes inverting buffer amplifier 172 connected to clock 68. The output of amplifier 172 connects to isolation capacitors 174a, 174b and 174c through resistor 176. V.sub.SS 38 connects to isolation capacitors 178a, 178b and 178c to provide an isolated ground V.sub.SS-I 40. Diodes 180 and 182 are connected to provide half wave rectification of the signal from amplifier 172. Capacitors 184 and 186 and inductor 188 are connected to provide a smooth, isolated supply voltage V.sub.DD-I based upon the rectified signal from amplifier 172.

In operation, the voltage V.sub.DD provided by regulator 66 and ground V.sub.SS 38 are connected through resistors 100,102 and 104 to provide a reference signal to the inputs of amplifiers 106 and 108. The voltage divider formed by resistors 100, 102 and 104 is used to keep the reference potential at a value within the common mode input range of amplifier 118. The outputs from amplifiers 106 and 108 are provided to resistors 114 and 116 which isolate the reference voltage across the line shown generally at 192. The high impedance amplifiers 106 and 108 allow use of resistors 114 and 116 which have a relatively large value. Resistors 114 and 116 are preferably metal film resistors which are considered infallible according to Intrinsic Safety requirements and have a sufficiently high value to meet Intrinsic Safety requirements. The isolated reference signal is amplified by amplifier 118 which also subtracts the isolated reference signal from the isolated supply voltage V.sub.DD-I. This subtraction insures that the reference signal is within the output range of amplifier 118. INPUTs to bridge 32 are excited between the positive isolated supply voltage V.sub.DD-I and the output of amplifier 118. The output of bridge 32 is isolated by resistors 136 and 138, and amplified by differential amplifier 140. Capacitors 194 provide a filter to filter noise in the signal. Resistors 136 and 138 are of a large value to meet Intrinsic Safety requirements. In a similar manner, open sensor signal 150 is isolated using resistor 158 and buffer amplifier 156. During normal operation, the output of amplifier 156 is in a HIGH state. If bridge 32 is opened, or if power is otherwise lost to circuitry 58, the output of amplifier 156 goes to a LOW state. A low signal inhibits operation of analog to digital converter 70 which indicates a failure to microprocessor 62. Amplifier 160 and resistor 166 are used to provide a guard to the output from bridge 32 and are connected to guard foils 162 and 164. Resistor 166 is of a sufficiently large value to meet Intrinsic Safety criteria.

Power supply isolation circuitry 170 uses three series capacitors 174a, 174b, 174c to isolate the supply voltage V.sub.DD-I and uses three series capacitors 178a, 178b, 178c to isolate ground. Three series capacitors are considered infallible in accordance with Intrinsic Safety standards. The periodic signal output from clock 68 passes through capacitors 174a-c or 178a-c. The clock signal is rectified and filtered using diodes 180 and 182, capacitors 184 and 186, and inductor 188. The clock signal is at a relatively high frequency, for example 460 KHZ, such that the filter components can be relatively small. However, values should be selected which provide a current supply capacity of at least 120 .mu.A plus sufficient current to power bridge 32 for a total of about 400 .mu.A.

The parallel combination of all six isolation resistors 114, 116, 166, 138, 136 and 158 is selected such that it is greater than 16.OMEGA.. This relatively large value is insignificant in comparison to the 135.OMEGA. power limiting resistor 34. The signal used to drive bridge 32 is proportional to the same reference provided to analog-to-digital converter 70 shown in FIG. 2. Therefore, variations in V.sub.DD are reflected in the drive signal (IN) applied to bridge 32. Such that an error is not introduced into the output of analog-to-digital converter 70.

In one preferred embodiment, components of isolation circuitry 58 are as follows:

Operational amplifiers 106 and 108 are Texas Instrument TLC27L2 (dual); 118 and 150 are Texas Instrument TLV2252 (dual); 140 and 156 are a Texas Instrument TLC2254 (quad).

The present invention provides a unique technique for isolating transmitter electronics from a bridge circuit in a process control transmitter. The technique uses high impedance elements and high impedance amplifiers to provide Intrinsically Safe isolation between components. A capacitively isolated power is used to provide power to the bridge circuitry and isolation circuitry.

Although the present invention has been described with reference to preferred embodiments, workers skilled in the art will recognize that changes may be made in form and detail without departing from the spirit and scope of the invention. For example, different types of high impedance buffers or high impedance isolators may be employed and other types of sensors such as a semiconductor temperature sensor, capacitor, vibrating beam, optical, piezoelectric, and magnetic may be utilized. Further, the power signal can be any AC signal and is not limited to a clock signal.