Light-Emitting Semiconductor Device Using Group III Nitrogen Compound

1. Field of the Invention

The present invention relates to a light-emitting semiconductor device that emits blue light and uses a group III nitrogen compound. Especially, the invention is about a light-emitting semiconductor device that emits purer blue color.

2. Description of the Prior Art

A gallium nitride (GaN) compound semiconductor with a p-n junction has been used to obtain a light-emitting diode (LED) which emits blue light. This semiconductor device is useful because of its high luminous efficiency resulting from direct electron transition and because of its ability to emit blue light, which is one of the three primary colors.

The "a" and "c" planes of semiconductors, rotate at an off angle, or just substrates, have been utilized as epitaxial growth plane of to form GaN compound semiconductor with smoother surface.

However, the luminous condition of a p-layer which is regarded as an emission layer of an LED grown on the just substrate is a group of luminous dots. This is attributed to non-uniform impurity doping of magnesium (Mg) into the emission layer. Consequently, an LED with the just substrate has poor luminous intensity.

It is therefore an object of the present invention to solve the above problem by providing an off substrate which tilts the main surface of the sapphire substrate from the plane "a" by a predetermined degree. Namely, a semiconductor is provided with the off substrate so as to dope an impurity uniformly into layers epitaxially grown thereon and improve the luminous intensity of an LED.

More specifically, in accordance with the first aspect of the invention, there is provided a light-emitting semiconductor device comprising:

a sapphire substrate;

an n-layer with n-type conduction of group III nitride compound semiconductor satisfying the formula Al.sub.x Ga.sub.y In.sub.-x-y N, inclusive of x=0, y=0 and x=y=0,

a Mg-doped p-layer with p-type conduction of a group III nitride compound semiconductor satisfying the formula Al.sub.x Ga.sub.y In.sub.1-x-y N, inclusive of x=0, y=0 and x=y=0,

wherein the plane orientation of the sapphire substrate is set at an off angle in the range of 1 to 4 degrees from the axis "a" <1120> of the sapphire substrate.

As a result, the luminous condition of the above light-emitting semiconductor device has a planar emission, resulting in improved luminous intensity. This is attributed to uniform doping of an impurity into layers epitaxially grown on the off substrate by tilting the orientation or the planar surface of the substrate from the axis "a" <1120>.

Other objects, features, and characteristics of the present invention will become apparent upon consideration of the following description and the appended claims with reference to the accompanying drawings, all of which form a part of the specification, and wherein referenced numerals designate corresponding parts in the various figures.

In the accompanying drawings:

FIG. 1 is a diagram exhibiting the structure of the LED embodied in Example 1;

FIGS. 2 through 7 are sectional views illustrating successive steps of producing the LED embodied in Example 1;

FIG. 8 is a photomicrograph exhibiting the luminous condition of a conventional light-emitting diode with a just substrate of sapphire;

FIG. 9 is a photomicrograph exhibiting the luminous condition of the light-emitting diode with an off substrate of sapphire in accordance with Example 1; and

FIG. 10 is a view exhibiting the relation between the tilt angle of sapphire substrates and the luminous intensity of light-emitting diodes.

The invention will be more fully understood by reference to the following examples,

FIG. 1 shows an LED 10 embodied in Example 1. It has a sapphire (Al.sub.2 O.sub.3) substrate 1 upon which an aluminum nitride (AlN) buffer layer 2 of 500 .ANG. thickness is formed. The sapphire substrate is an off substrate with its plane of orientation tilted by 2 degrees from the axis "a" <1120>. The following five layers are consecutively formed on the AlN buffer layer 2: a silicon (Si) doped GaN n.sup.+ -layer 3 of high carrier (n-type) concentration; a Si-doped (Al.sub.x2 Ga.sub.1-x2).sub.y2 In.sub.1-y2 N n.sup.+ -layer 4 of high carrier (n-type) concentration; a zinc (Zn) and magnesium (Mg) doped (Al.sub.x1 Ga.sub.1-x1).sub.y1 In.sub.1-y1 N emission layer 5; and a Mg-doped (Al.sub.x2 Ga.sub.1-x2).sub.y2 In.sub.1-y2 N p-layer 6. The GaN n.sup.+ -layer 3 is about 2.0 .mu.m in thickness and has a 2.times.10.sup.18 /cm.sup.3 electron concentration. The n.sup.+ -layer 4 is about 2.0 .mu.m in thickness and has 2.times.10.sup.18 /cm.sup.3 electron concentration. The emission layer 5 is about 0.5 .mu.m in thickness. The p-layer 6 is about 0.5 .mu.m in thickness and has a 2.times.10.sup.17 /cm.sup.3 hole concentration. Nickel electrodes 7 and 8 are connected to the p-layer 6 and the n.sup.+ -layer 4, respectively. They are electrically insulated by a groove 9.

The LED 10 is produced by gaseous phase growth, called metal organic vapor phase epitaxy referred to as MOVPE hereinafter.

The gases employed in this process are ammonia (NH.sub.3), a carrier gas (H.sub.2 or N.sub.2), trimethyl gallium (Ga(CH.sub.3).sub.3) (TMG hereinafter), trimethyl aluminum (Al (CH.sub.3).sub.3) (TMA hereinafter), trimethyl indium (In(CH.sub.3).sub.3) (TMI hereinafter), diethylzinc ((C.sub.2 H.sub.5).sub.2 Zn) (DEZ hereinafter), silane (SiH.sub.4), and biscyclopentadienyl magnesium (Mg(C.sub.5 H.sub.5).sub.2) (CP.sub.2 Mg hereinafter).

The sapphire substrate 1 which is single crystalline, whose main surface was tilted by 2 degrees from the axis "a" <1120> and was cleaned by an organic washing solvent and heat treatment, was placed on a susceptor in a reaction chamber for the MOVPE treatment. Then the sapphire substrate 1 was etched at 1100.degree. C. by a vapor of H.sub.2 fed into the chamber at a flow rate of 2 liter/min. under normal pressure for a period of 5 min.

A 500 .ANG. thick AlN buffer layer 2 was epitaxially formed on the sapphire substrate 1 under conditions of lowering the temperature of the substrate 1 to 400.degree. C., keeping the temperature constant, and supplying H.sub.2, NH.sub.3 and TMA for a period of about 90 sec. at a flow rate of 20 liter/min., 10 liter/min., and 1.8.times.10.sup.-5 mol/min., respectively. On the buffer layer 2, about a 2.2 .mu.m thick Si-doped GaN n.sup.+ -layer 3 of high carrier concentration with an electron concentration of about 2.times.10.sup.18 /cm.sup.3 was formed under conditions of keeping the temperature of the sapphire substrate 1 at 1150.degree. C. and supplying H.sub.2, NH.sub.3, TMG, and diluted silane to 0.86 ppm by H.sub.2 for 30 min. at a flow rate of 20 liter/min., 10 liter/min., 1.7.times.10.sup.-4 mol/min. and 200 ml/min., respectively.

The following manufacturing process provides for an emission layer 5 as an active layer, and an n.sup.+ -layer 4 of high carrier concentration and a p-layer 6 as clad layers; the LED 10 is designed to emit at a 500 nm wavelength peak in the luminous spectrum and have luminous centers of Zn.

On the n.sup.+ -layer 3, about a 0.5 .mu.m thick Si-doped (Al.sub.0.3 Ga.sub.O.7).sub.0.94 In.sub.0.06 N n.sup.+ -layer 4 of high carrier concentration with an electron concentration of 1.times.10.sup.19 /cm.sup.3 was formed under conditions of keeping the temperature of the sapphire substrate 1.degree. at 800.degree. C. and supplying H.sub.2 or N.sub.2, NH.sub.3, TMG, TMA, TMI, and diluted silane to 0.86 ppm by H.sub.2 for 60 min. at a flow rate of 20 liter/min., 10 liter/min., 1.12.times.10.sup.-4 mol/min., 0.47.times.10.sup.-4 mol/min., 0.1.times.10.sup.-4 mol/min. and 10.times.10.sup.-9 mol/min., respectively.

On the n.sup.+ -layer 4, about a 0.5 .mu.m thick Mg- and Zn-doped (Al.sub.0.09 Ga.sub.0.91).sub.0.99 In.sub.0.01 N emission layer 5 was formed under conditions of keeping the temperature of the sapphire substrate 1.degree. at 1150.degree. C. and supplying H.sub.2 or N.sub.2, NH.sub.3, TMG, TMA, TMI, CP.sub.2 Mg, and DEZ for 7 min. at a flow rate of 20 liter/min., 10 liter/min., 1.53.times.10.sup.-4 mol/min., 0.47.times.10.sup.-4 mol/min., 0.02.times.10.sup.-4 mol/min., 2.times.10.sup.-7 mol/min. and 2.times.10.sup.-4 mol/min., respectively. At this stage, the emission layer 5 exhibited high resistivity of 10.sup..OMEGA..cndot. cm or more. The impurity concentrations of Mg and Zn doped to the emission layer 5 were 2.times.10.sup.18 /cm.sup.3 and 2.times.10.sup.18 /cm.sup.3 respectively

On the emission layer 5, about a 0.5 .mu.m thick Mg-doped (Al.sub.0.3 Ga.sub.0.7).sub.0.94 In.sub.0.06 N p-layer 6 was formed under conditions of keeping the temperature of the sapphire substrate 1.degree. at 1100.degree. C. and supplying N.sub.2 or H.sub.2, NH.sub.3, TMG, TMA, TMI, and CP.sub.2 Mg for 120 min. at a flow rate of 20 liter/min., 10 liter/min., 1.12.times.10.sup.-4 mol/min., 0.47.times.10.sup.-4 mol/min., 0.1.times.10.sup.-4 mol/min. and 2.times.10.sup.-4 mol/min., respectively. Resistivity of the p-layer 6 was 10.sup.8 .OMEGA..cndot.cm or more exhibiting insulative characteristics. The impurity concentration of Mg doped into the p-layer 6 was 1.times.10.sup.20 /cm.sup.3.

Then, electron rays were uniformly irradiated into the emission layer 5 and the p-layer 6 using a reflective electron beam diffraction device. The irradiation conditions were set at 10 KV for the accelerating voltage, 1 .mu.A for the sample current, 0.2 mm/sec. for the speed of the beam scanning, 60 .mu.m for the beam aperture, and 5.0.times.10.sup.-5 Torr vacuum. This irradiation changed the insulative emission layer 5 and p-layer 6 into a p-type conductive semiconductor with a hole concentration of 2.times.10.sup.17 /cm.sup.3 and a resistivity of 2 .OMEGA..cndot.cm. Thereby, a wafer with multi-structural layers was obtained as shown in FIG. 2.

The following FIGS. 3 to 7 show sectional views of an individual element on the wafer. In actual practice and in accordance with industry custom, a wafer with a large number of elements thereon is treated by the following process, and then, divided or diced into individual elements.

A 2000 .ANG. thick SiO.sub.2 layer 11 was formed on the p-layer 6 by sputtering. Then, the layer 11 was coated with a photoresist layer 12. Two selected parts or areas of the photoresist layer 12, named A and B, were removed by photolithography as shown in FIG. 3. The part or area A is an electrode forming part which corresponds to a place where a hole 15, shown in FIG. 5, is formed extending to and into the n.sup.+ -layer 4 of high carrier concentration. The part or area B corresponds to a place where a groove 9 shown in FIGS. 5 and 6 is formed for insulating or electrically insulating the part or area A from an electrode in contact with the p-layer 6.

As shown in FIG. 4, two parts of the SiO.sub.2 layer 11 which were not covered with the photoresist layer 12 were etched off by an etching liquid such as hydrofluoric acid. Then, the exposed part of the following successive three layers from the surface of the device, the p-layer 6, the emission layer 5, and the upper part of the n.sup.+ -layer 4 of high carrier concentration, were removed by dry etching, or supplying a high-frequency power density of 0.44 W/cm.sup.2 and BC1.sub.3 gas of 10 ml/min. at a vacuum degree of 0.04 Torr as shown in FIG. 5. After that, dry etching with argon (Ar) was carried out on the device. Consequently, a hole 15 for forming an electrode reaching the n.sup.+ -layer 4 of high carrier concentration and a groove 9 for insulation were formed.

The SiO.sub.2 layer 11 remaining on the p-layer 6 was removed by hydrofluoric acid as shown in FIG. 6. A nickel (Ni) layer 13 was laminated on the entire surface of the device by vapor deposition. Thus, the so-formed Ni layer 13 in the hole 15 is in electrical contact with the n.sup.+ -layer 4 of high carrier concentration. A photoresist 14 was deposited on the Ni layer 13 and, then, was selectively etched off by photolithography as shown in FIG. 7 leaving patterns of configuration for electrodes connected to the n.sup.+ -layer 4 of high carrier concentration and the p-layer 6, respectively.

Using the photoresist 14 as a mask, the exposed part or area of the Ni layer 13 from the photoresist 14 was etched off by an etching liquid such as nitric acid. At this time, the nickel layer 13 laminated in the groove 9 was also removed completely. Then, the photoresist layer 14 was removed by a photoresist removal liquid such as acetone. There were formed two electrodes, the electrode 8 for the n.sup.+ -layer 4 of high carrier concentration and the electrode 7 for the p-layer 6. A wafer treated with the above-mentioned process was divided or diced into each element which exhibits a gallium nitride light-emitting diode with a p-n junction structure as shown in FIG. 1.

The obtained LED 10 was found to have a luminous intensity of 200 mcd and a wavelength of 500 nm by driving current of 20 mA. The luminous condition of the LED 10 becomes a plane as shown in FIG. 9. FIG. 8 exhibits a luminous condition of an LED with a just substrate of sapphire for comparison. The luminous condition of FIG. 8 is a group of dots. The luminous intensity of the LED 10 with the off substrate is 1.5 to 1.8 folds of the LED with the just substrate.

Various luminous intensities of the LED with an off substrate from the axis "a" are measured respectively setting the tilt angle to 0.5, 2, and 5 degrees. The result shown in FIG. 10 tells that the most desirable tilt angle to improve luminous intensity is from 1 to 4 degrees from the axis "a" <1120>.

The emission layer 5 preferably contains impurity concentrations of Mg and Zn within a range of 1.times.10.sup.17 /cm.sup.3 to 1.times.10.sup.20 /cm.sup.3 respectively, in order to improve luminous intensity.

While the invention has been described in connection with what are presently considered to be the most practical and preferred embodiments using the LED satisfying the formula of Al.sub.x Ga.sub.y In.sub.1-x-y N, inclusive of x=0, y=0, and x=y=0, the invention is not to be limited to the disclosed embodiments, but on the contrary, is intended to cover various modifications and equivalent arrangements such as laser diodes and manufacturing method of thin films with the formula of Al.sub.x Ga.sub.y In.sub.1-x-y N, inclusive of x=0, y=0, and x=y=0 within the spirit and scope of the appended claims.