Built-in Input Filter Forward Converter

1. Field of the Invention

The present invention relates to a built-in input filter forward converter, and more particularly to a converter that exhibits non-pulsating input current.

2. Description of the Prior Art

Pulse-width modulation, quasi-resonant, multi-resonant and pulse-width modulation zero-voltage-transition forward converters have been proposed in the prior art to provide output voltage despite changes in load or input voltage. See [1] K. H. Liu and F. C. Lee, "Secondary-Side Resonance for High-Frequency Power Conversion," IEEE Applied Power and Electronics Conference Proc., 1986, pages 83-89. [2] W. A. Tabisz and F. C. Lee, "A Novel Zero-Voltage-Switched Multi-Resonant Forward Converter," High Frequency Power Conversion Conference Proc., 1988, pages 309-318. [3] H. J. Kim, C. S. Leu, R. Farrington, and F. C. Lee, "Clamp Mode Zero-Voltage-Switched Multi-Resonant Converters," IEEE Power Electronics Conference Record, 1992, pages 78-84. [4] G. Hua, C. S. Leu, and F. C. Lee, "Novel Zero-Voltage-Transition PWM Converters," IEEE Power Electronics Conference Record, 1992, pages 55-61.

A controller varies the duty cycle at a power MOSFET which is turned on and off in order to maintain constant the DC load voltage. Hence, a pulsating input current flows from power source. A typical example of this is a conventional prior art tertiary-winding forward converter shown in FIG. 8, where a transformer comprises two identical primary windings and a secondary winding with 1:1:N turns ratio, and "N" is a positive integer. FIG. 9 shows the key waveforms in the operation of the tertiary-winding forward converter of FIG. 8. As seen from FIG. 9, pulsating current results in getting a higher RMS value to cause additional losses and generating undesired current harmonics in the source. An input filter stage is thus required to alleviate those problems.

The present invention has arisen to mitigate and/or obviate the afore-described disadvantages of the conventional forward converter.

The primary objective of the present invention is to provide an improved built-in input filter forward converter (BIFFC) topology that reduces ripple and harmonics of an input current.

Briefly, this invention contemplates improving the performance of the forward converter by shaping the input current obtained by placing two capacitors (referred to as cross-coupled capacitor) to the splitting windings of the power transformer such that the input current can flow through the current path provided by the cross-coupled capacitor during the turning off of the switch.

Further objectives and advantages of the present invention will become apparent from a careful reading of the detailed description provided hereinbelow, with appropriate reference to the accompanying drawings.

FIG. 1 is a schematic diagram of a built-in input filter forward converter (BIFFC) in accordance with the present invention;

FIG. 2 is a diagram showing certain waveforms of the circuit of FIG. 1;

FIG. 3 is a first operation stage within one switching cycle of the circuit in FIG. 1;

FIG. 4 is a second operation stage within one switching cycle of the circuit in FIG. 1;

FIG. 5 is a third operation stage within one switching cycle of the circuit in FIG. 1;

FIG. 6 is a fourth operation stage within one switching cycle of the circuit in FIG. 1;

FIG. 7 is a fifth operation stage within one switching cycle of the circuit in FIG. 1;

FIG. 8 is a schematic diagram of a prior art tertiary-winding forward converter; and

FIG. 9 is a diagram showing certain waveforms of the circuit of FIG. 8.

Referring now to the drawings, and more particularly to FIG. 1, a built-in input filter forward converter (BIFFC) in accordance with the present invention is illustrated. A primary side of the power stage in this converter comprises a switch S1, a clamped diode D.sub.c, two cross-coupled capacitors C.sub.1 and C.sub.2, and a transformer. The transformer comprises four identical primary windings L.sub.P1, L.sub.P2, L.sub.P3, and L.sub.P4, and a secondary winding L.sub.S1 with 0.5:0.5:0.5:0.5:N turns ratio. The number "0.5" herein is compared relative to the turns ratio "1:1:N" of the transformer of FIG. 8, i.e., the two primary windings of FIG. 8 are split into two further windings. An input filter inductor L.sub.in is defined as the leakage inductance of the transformer and any stray inductance between an input source V.sub.i and the primary windings L.sub.P1, L.sub.P2, L.sub.P3, and L.sub.P4 of the transformer.

The operation of the BIFFC is different from that of the prior art tertiary-winding forward converter shown in FIG. 8.

A controller 10 alternately and periodically turns on and turns off a power switch S1. The power switch S1 in this embodiment is an N-type MOSFET. The frequency is fixed and the variable duty cycle is a function of the DC voltage applied to the load R as detected by a voltage sensing device 11. The controller 10 and the voltage sensing device 11 are conventional and well known and are not described in detail herein. In response to the input from the voltage sensing device 11, the controller 10 varies the duty cycle of the power switch S.sub.1 so as to maintain constant the load voltage. The typical waveforms of this converter are shown in FIG. 2.

To simplify the analysis, the output filter inductance is sufficiently large to be approximated by a current source with a value equaling the output current I.sub.0. The cross-coupled capacitor is assumed sufficiently large so that the voltage across it can be assumed constant. Under steady-state operation, five operation stages exist within one switching cycle as shown in FIGS. 3 to 7.

Referring to FIG. 3, from T.sub.0 to T.sub.1 interval, i.e,, immediately after a controller 10 turns on the power switch S.sub.1, the forward diode D.sub.1 is turned on and the freewheeling diode D.sub.2 is turned off. Besides the main current loop to transfer the energy to the load via L.sub.P1 -S.sub.1 -L.sub.P2, two additional circulating current loops C.sub.1 -L.sub.P2 -L.sub.P3 and C.sub.2 -L.sub.P4 -L.sub.P1 are formed in a resonant fashion to recover the energy from C.sub.1 and C.sub.2 to the load. A voltage V.sub.DC across the parasitic capacitance C.sub.D of the clamped diode D.sub.C increases up to 2V.sub.i and remains constant during this time interval.

Referring to FIG. 4, i.e., from time interval T.sub.1 to T.sub.2, the power switch S1 is turned off at T1. An equivalent capacitance Cs of the power switch S1 is linearly charged by a reflected filter inductor current I.sub.0 /N. When a drain-source voltage V.sub.DS of the power switch S1 reaches V.sub.i, the forward diode D.sub.1 is turned off and the freewheeling diode D.sub.2 is turned on at the same time. During the interval T.sub.1 to T.sub.2, the drain-source voltage V.sub.DS of the power switch S1 ramps up to 2V.sub.i, the clamped diode D.sub.c is turned on, and the capacitors C.sub.1 and C.sub.2 are charged by the source current i.sub.LP1 and i.sub.LP2 through L.sub.P1 -C.sub.1 -L.sub.P3 and L.sub.P4 -C.sub.2 -L.sub.P2, respectively.

Referring to FIG. 5, i.e., from time interval T.sub.2 to T.sub.3, the clamped diode D.sub.C remains in an "ON" status and the drain-source voltage V.sub.DS is thus clamped to 2V.sub.i.

Referring to FIG. 6, i.e., from time interval T.sub.3 to T.sub.4, the clamped diode D.sub.c is turned off at T.sub.3. This interval ends at T.sub.4, when the voltage V.sub.DS decreases from 2V.sub.i to V.sub.i and the voltage V.sub.DC ramps up to V.sub.i.

Referring to FIG. 7, i.e., from time interval T.sub.4 to T.sub.0, at T.sub.4, the voltage V.sub.DS reaches V.sub.i and remains constant during this time interval. At T.sub.0, the power switch S.sub.1 is turned on again, and another switching cycle is started again.

A built-in input filter function takes place in the above manner. Consequently, the input current I.sub.in maintains in a non-pulsating shape, decreases its RMS value as well as the ripple, reduces undesired harmonic components, and transfers energy to the load R when the power switch S.sub.1 is turned on thereafter. It should be noted that the transformer used in the invention may be a single transformer with four identical primary windings L.sub.P1, L.sub.P2, L.sub.P3, and L.sub.P4, and a secondary winding L.sub.s1. Alternatively, the single transformer may be replaced with four identical transformers with an equivalent circuit to the single transformer as shown in FIG. 1.

While the present invention has been explained in relation to its preferred embodiment, it is to be understood that various modifications thereof will be apparent to those skilled in the art upon reading this specification. Therefore, it is to be understood that the invention disclosed herein is intended to cover all such modifications as fall within the scope of the appended claim.