Alignment Method and Alignment System

This invention relates to an alignment method and an alignment system for correctly aligning plural objects with each other. The alignment method or alignment system of the present invention is particularly suitably usable in an apparatus (as an example, a reduction projection type exposure apparatus for projecting an electronic circuit pattern onto a semiconductor substrate) which apparatus needs precise alignment means.

The degree of integration of a semiconductor device, such as a DRAM has increased considerably recently. With the increasing degree of integration, the width of a pattern formed on a semiconductor device has been narrowed to the order of a submicron. In the field of semiconductor exposure apparatuses, many technology developments have been made to improve the precision of alignment of a mask and a wafer. Currently, reduction projection type (stepper type) semiconductor exposure apparatuses are used widely.

FIG. 1A is a schematic view of an example of a reduction projection type semiconductor exposure apparatus. With exposure light supplied by an exposure illumination system (not shown), an electronic circuit pattern formed on a reticle R is projected, through a projection optical system 1, onto a wafer W for exposure thereof, the wafer being placed on a stage 11 movable two-dimensionally. Denoted at S in the drawing is an alignment optical system which serves to detect the position with respect to the X direction, in this example. A similar alignment optical system (not shown) is provided to detect the position with respect to the Y direction. Prior to the exposure operation, relative alignment of the reticle R and the wafer W is done in the sequence as described below.

The wafer W is moved by means of a wafer conveying device (not shown) onto the X-Y stage 11. In response, a central processing unit (CPU) 9 supplies a command to a stage driving device 10 to cause it to drive the X-Y stage 11, so that an alignment mark M1x , formed in relation to a first measurement shot S1 (FIG. 2), is positioned within the range of the viewfield of the alignment optical system S. Here, a light beam projected by an alignment illumination device 2, providing non-exposure (non-sensitizing) light, passes through a beam splitter 3, the reticle R and the projection optical system 1 and illuminates the alignment mark M1x (hereinafter "wafer mark"). FIG. 1B illustrates the wafer mark M1x. It comprises rectangular patterns of the same shape disposed at a regular pitch .lambda.p. The light beam reflected by the wafer mark M1x passes again through the projection optical system 1 and the reticle R, and it impinges on the beam splitter. The light beam is reflected by the beam splitter and, through an imaging optical system 4, it forms an image WM of the wafer mark M1x upon an image pickup surface of an image pickup device. With this image pickup device 5, the image of the wafer mark M1x is photoelectrically converted and, by means of an analog-to-digital (A/D) converter 6, it is transformed into a two-dimensional digital signal train. Denoted at 7 in FIG. 1A is an integrating device which serves to define a processing window Wp (FIG. 1B) for the wafer mark image WM having been digitalized by the A/D converter 6. Within the processing window, a moving/averaging operation with respect to the Y direction (FIG. 1B) is performed which a two-dimensional imagewise signal is transformed into a one-dimensional digital signal train S(x).

Denoted at 8 in FIG. 1A is a position detecting device in which the pattern matching operation is performed to the one-dimensional digital signal train S(x) produced by the integrating device 7, by using a template pattern having been memorized beforehand. The position detecting device outputs the address of S(x) having the highest degree of matching with the template pattern, to a central processing unit (CPU) 9. This output signal represents the mark position determined with reference to the image pickup surface of the image pickup device 5, and the CPU 9 then calculates the position a.sub.x1 of the wafer mark M1x with respect to the reticle R on the basis of the relative position of the image pickup device 5 and the reticle R, having been detected beforehand.

With the process described above, any positional deviation of the first measurement shot with respect to the X direction is measured. Thereafter, the CPU 9 operates to drive the X-Y stage 11 so that a Y-direction measurement mark M1y of the first measurement shot comes into the range of the viewfield of the Y-direction alignment optical system. Then, with a process similar to that of the X-direction measurement, any positional deviation a.sub.y1 with respect to the Y direction is measured.

With the process described above, the measurement of the first measurement shot S1 is completed. Then, the CPU 9 operates to measure any positional deviation of a second measurement shot S2 with respect to the X and Y directions, in a similar manner as that of the first measurement shot. Subsequently, measurement is repeated in a similar way, until measurements of the measurement shots of a predetermined number n (n=4 in FIG. 2 example) are completed. Positional deviations a.sub.xi and a.sub.yi (i=1, 2, . . . and n) measured in relation to these measurement shots are memorized.

On the basis of the positional deviations obtained in this manner with respect to the measurement shots, the CPU 9 then operates to relatively align the wafer W with the reticle R.

More specifically, when the design mark position d.sub.i =[d.sub.xi, d.sub.yi ].sup.T of each measurement shot is to be superposed through a correction transformation upon the actual mark position a.sub.i =[a.sub.xi, a.sub.yi ].sup.T obtained by the wafer mark measurement, and if the relationship between d.sub.i and the corrected position g.sub.i =[g.sub.xi, g.sub.yi ].sup.T =[a.sub.xi +e.sub.xi, a.sub.xi +e.sub.xi ].sup.T including the remainder of correction e.sub.i =[e.sub.xi, e.sub.yi ].sup.T, is represented by an equation:

then the CPU 9 operates to calculate such transformation parameters A and S that minimize the square sum of the remainder of correction e.sub.i being denoted by:

Subsequently, the CPU 9 operates to drive the X-Y stage in accordance with transformation parameters as determined by A and S, to execute step-and-repeat motion effective to minimize the error between the measured mark position and the design mark position. In this manner, exposures of all the shots defined on the wafer are executed.

Here, A and S are expressed as follows: ##EQU1## where .alpha..sub.x and .alpha..sub.y denote elongations of the wafer in the X and Y directions, respectively, and .theta..sub.x and .theta..sub.y denote X-axis and Y-axis rotational components of the shot array. Also, S denotes a translational deviation of the wafer as a whole. In the method described above, positional deviation measurement is not executed with respect to all the exposure shots but, rather, the alignment operation is done with respect to only a limited number of sample shots. It is therefore effective to improve the throughput of the exposure apparatus. However, the relationship as represented by equation (1) is linear, including the error factors of translation, rotation and elongation/contraction of the wafer W. Actually, some of wafers to be processed in the semiconductor device manufacturing processes may have local deformation. Thus, with the approximation to the wafers as a whole on the basis of such linear equation, sufficient precision is difficult to obtain.

This problem may be solved by dividing the surface of a wafer into plural regions with respect to each of which a transformation parameter is determined, such that for exposure of a certain region the parameter determined in relation to that region is used to control the step-and-repeat motion of the X-Y stage. With this method, however, in each region the measurements to plural sample shots are necessary. Thus, the throughput of the exposure apparatus decreases.

It is accordingly an object of the present invention to provide an improved alignment method or alignment system which is free from the problems as described above.

More specifically, it is an object of the present invention to provide an alignment method or alignment system, of the type that a substrate to be processed has a plurality of zones to be aligned and that the alignment method or alignment system is used to align the substrate as a whole on the basis of plural zones selected out of all the zones of the substrate, the alignment method or alignment system of the present invention being particularly effective to assure high alignment precision as well as high throughput even to such a substrate in which measured values of measurement zones and design positions of them are not in a fixed relationship represented by a predetermined transformation equation.

In accordance with a first aspect of the present invention, there is provided an alignment method wherein substrates each having zones, to be aligned and being disposed in accordance with a predetermined array, are supplied sequentially and wherein in each substrate the zones are brought into alignment with a predetermined reference position sequentially, said method comprising: a first step for measuring in sequence deviations of positions of zones of a first substrate with respect to positions determined in accordance with the predetermined array, and for detecting the actual array of the zones through the measurement; a second step for determining, in terms of a predetermined transformation parameter, the relationship between the predetermined array and the actual array detected in said first step, and for determining a transformation parameter for the first substrate effective to minimize an error; a third step for detecting and memorizing an error between the actual array and an array determined in accordance with the transformation parameter of the first substrate; and a fourth step for aligning, with respect to the predetermined reference position, a second substrate having zones of substantially the same array as the first substrate, by using the memorized error as an alignment correction value.

The fourth step may comprise determining a transformation parameter for the second substrate in the same manner as in the first and second steps, and using the determined transformation parameter of the second substrate as well as the error memorized in the third step, as the alignment correction value for the second substrate.

The third step may comprise detecting a zone having an error larger than a predetermined value, and determining again a transformation parameter for the first substrate in the same manner as the second step while excluding the measured value of the detected zone.

The first step may comprise measuring in sequence deviations of the positions of zones of a predetermined combination, out of the zones of the first substrate, with respect to the positions determined in accordance with the predetermined array.

The third step may comprise determining an error of a zone, not measured in the first step, on the basis of the error of a zone measured in said first step.

The alignment method may further comprise a fifth step for measuring in sequence deviations of the positions of zones of a second combination different from the first-mentioned combination, with respect to the positions determined in accordance with the predetermined array, and a sixth step for determining and memorizing errors of the zones of the second combination essentially in the same manner as the second and third steps.

The fourth step may comprise comparing the errors of the first combination and the errors of the second combination, and selecting one of the first and second combinations.

The fourth step may comprise comparing minimums of the errors of the first and second combinations.

The fourth step may comprise comparing least square averages of the errors of the first and second combinations.

These and other objects, features and advantages of the present invention will become more apparent upon a consideration of the following description of the preferred embodiments of the present invention taken in conjunction with the accompanying drawings.

FIG. 1A is a schematic view of a main portion of an alignment system of a known type.

FIG. 1B is an enlarged view of a mark used in the alignment system of FIG. 1A.

FIG. 2 is a plan view of a wafer, showing sample positions to be measured with the alignment system of FIG. 1A.

FIG. 3 is a schematic view of an alignment system according to an embodiment of the present invention.

FIGS. 4A and 4B are plan views, respectively, each showing sample positions to be measured with the alignment system of the FIG. 3 embodiment.

FIG. 5 is a flow chart of the operation of the alignment system of the FIG. 3 embodiment.

FIGS. 6A and 6B are plan views, respectively, each showing sample positions to be measured in accordance with a second embodiment of the present invention.

FIGS. 7A and 7B are graphs, respectively, showing examples of non-linear components in the second embodiment.

FIG. 8 is a flow chart of the operation of the alignment system according to the second embodiment.

FIGS. 9A, 9B, 9C and 9D are plan views, respectively, each showing sample positions in a third embodiment of the present invention.

FIG. 10 is a flow chart of the operation of the alignment system according to the third embodiment.

FIGS. 11A and 11B are graphs, respectively, showing the absolute values of non-linear components and a corresponding contour line map, in a fourth embodiment of the present invention.

FIG. 3 illustrates in a schematic view an alignment system according to a first embodiment of the present invention. In the arrangement illustrated, an alignment optical system S, an A/D converter 6, an integrating device 7 and a position detecting device 8 have a similar structure as those of the FIG. 1A example, and a detailed description of them will be omitted here. It is to be noted that, in this embodiment, a memorizing device 12 is added as compared with the structure of the FIG. 1A example. The alignment process to be done in this embodiment will be explained below with reference to FIGS. 3, 4A and 4B.

A wafer W1 is conveyed onto an X-Y stage 11 by means of a wafer conveying device (not shown). In response, a CPU 9 supplies a command to a stage driving device 10 to cause it to drive the X-Y stage 11, so that an alignment mark M1x formed in relation to a first measurement shot (first measurement sample) S1 (FIG. 4A) is positioned within the range of viewfield of the alignment optical system S (namely, at the sample position). A light beam projected by an alignment illumination system 2, providing non-exposure (non-sensitizing) light, passes through a beam splitter 3, a reticle R and a projection optical system 1, and it illuminates the alignment mark M1x. The alignment mark M1x comprises a grating mark such as illustrated in FIG. 1B. The A/D converter 6, the integrating device 7 and the position detecting device 8 then operate to detect the relative positional deviation of the mark M1x with respect to the reticle R, essentially in the same manner as described with reference to the FIG. 1A example. Subsequently, the CPU 9 operates to drive the X-Y stage 11 so that a Y-direction alignment mark M1y comes into the range of viewfield of the alignment optical system S. Any relative positional deviation of the mark M1y with respect to the reticle R is then detected in a similar manner as that of the mark M1x.

After this, the CPU 9 operates to move the X-Y stage 11 so that an X-direction measurement mark M2x of a second measurement shot S2 comes into the range of viewfield of the alignment optical system S. Then, in a similar way as the measurement to the shot S1, measurements of the positional deviations in the X and Y directions are performed with respect to those shots S3, S4, . . . and S24 defined on the wafer W1. FIG. 4A illustrates the shots on the wafer W1.

When the design mark position d.sub.i =[d.sub.xi, d.sub.yi ].sup.T of each measurement shot is to be superposed through a correction transformation upon the actual mark position a.sub.i =[a.sub.xi, a.sub.yi ].sup.T obtained by the wafer mark measurement, and if the relationship between d.sub.i and the corrected position g.sub.i =[g.sub.xi, g.sub.yi ].sup.T =[a.sub.xi +e.sub.xi, a.sub.xi +e.sub.xi ].sup.T including the remainder of correction e.sub.i =[e.sub.xi, e.sub.yi ].sup.T, is represented by an equation:

then the CPU 9 operates to calculate such transformation parameters B, .theta. and S that minimize the squared sum of the remainder of correction e.sub.i being denoted by: ##EQU2## Here, parameters B, .theta. and S are expressed as follows: ##EQU3## wherein .beta..sub.x and .beta..sub.y denote elongations of the wafer in the X and Y directions, respectively, and .theta..sub.x and .theta..sub.y denote X-axis and Y-axis rotational components of the shot array. Also, S denotes a translational deviation of the wafer as a whole. These transformation parameters represent error factors of a magnification component, a rotational component and a translational component, from an ideal position, of a pattern formed on the wafer W1. The CPU 9 stores into the memorizing device 12 the remainder E=(e.sub.1, e.sub.2, . . . and e.sub.24) based on the determined parameters. Since the transformation equation (3) is a linear equation, this remainder corresponds to the non-linear component of the shot array defined on the wafer W1. For wafers of the same lot, it is considered as being substantially constant. Thus, the CPU 9 operates to execute the step-and-repeat motion of the X-Y stage 11 in accordance with a grid obtained by transforming the design shot array grid on the basis of the determined transformation parameters, whereby shots of the wafer W1 are exposed in sequence. After exposures of all the shots are completed, the wafer W1 is moved into a wafer accommodating carrier (not shown) by means of the wafer conveying device.

Then, the CPU 9 operates to place a second wafer W2, to be processed subsequently, on the X-Y stage 11 by using the wafer conveying device. For the second wafer, measurements are made sequentially to the alignment marks of those shots as shown in FIG. 4B, in a similar manner as described, and deviations a.sub.2i =[a.sub.2xi, a.sub.2yi ].sup.T of those shots with respect to the X and Y directions are detected. The CPU 9 determines transformation parameters B.sub.2, .theta..sub.2 and S.sub.2 in a similar manner as of the wafer W1. Then, by using the non-linear error component E=e.sub.1, e.sub.2, . . . and e.sub.24 stored in the memorizing device 12, the CPU 9 calculates

and executes the step-and-repeat motion of the X-Y stage 11 in accordance with the shot array based on this. In this manner, all the shots of the second wafer are exposed. Here, if the difference between B and B.sub.2 is large, the exposure operation may not be started but an alarm may be outputted. Alternatively, the term e.sub.i in equation (6) may be substituted by (B.sub.2 /B)e.sub.i and the shot array may be determined. To a third wafer and to the remaining wafers of the same lot, sequential processes of measurement, step-and-repeat motion and exposure are made in the same manner as of the wafer W2. The number of wafers in one lot has been memorized in the CPU 9 beforehand. If a wafer of a different lot is introduced, the non-linear error component of it is measured and memorized in the same process as having been performed on the first wafer W1. For the remaining wafers in the same (second) lot, a similar process as that performed on the wafer W2 is repeated. The operations described above is illustrated in the chart of FIG. 5.

A second embodiment of the present invention will now be explained. In the first embodiment, measurement is made of all the shots defined on first one of the wafers of one lot to measure non-linear errors. In the second embodiment, however, measurement is made only to those shots indicated in FIG. 6A by the character S with a numeral. In this example, if the number of measurement shots is 1, then non-linear errors detected are expressed by E.sub.s =(e.sub.s1, e.sub.s2, . . . and e.sub.s1). The sequences of processing a second wafer and the remaining wafers by using obtained E.sub.s, will be explained below.

The CPU 9 controls the wafer conveying device to place a wafer W2, to be processed subsequently, on the X-Y stage 11. For this wafer, a measurement is performed sequentially to those shots as illustrated in FIG. 6B, in a similar manner as has been described, whereby deviations a.sub.s2i =[a.sub.s2xi, a.sub.s2yi ].sup.T of those shots with respect to the X and Y directions are detected. Then, in a similar manner as that of the first wafer W1, transformation parameters B.sub.s2, .theta..sub.s2 and S.sub.s2 are determined. Here, since errors E.sub.s obtained above are not based on measurements to all the shots, the CPU 9 calculates errors of the positions of those shots not having been measured, through interpolation. If a non-linear error e.sub.sk of a k-th measurement shot, obtained from a first one W1 of the wafers of one lot, is ##EQU4## the CPU 9 calculates and memorizes spline functions C.sub.x (x, y) and Cy(x, y) satisfying the following relations:

FIGS. 7A and 7B illustrates the non-linear errors obtained by the measurement and those being spline interpolated.

By using the obtained functions C.sub.x (x, y) and C.sub.y (x, y), the CPU 9 executes the interpolation while taking the position of an i-th shot of an n-th wafer as

where ##EQU5## In this manner, the number of measurement shots of a first one of the wafers of one lot is reduced, and this reduces the time necessary for the measurement and thus improves the throughput of the exposure apparatus. The above-described operations of the present embodiment are illustrated in the flow chart of FIG. 8.

A third embodiment of the present invention will be explained below. In the first and second embodiments, the measurement shots are predetermined. In the third embodiment, however, optimum measurement shots are selected on the basis of non-linear errors obtained through measurement.

After a first one W1 of the wafers of one lot is placed on the X-Y stage 11, the CPU 9 operates to calculate non-linear errors, essentially in the manner as has been described with reference to the second embodiment, with respect to some combinations (sample patterns) of measurement shots as illustrated in FIGS. 9A-9D. In the illustrated example, four patterns (sample patterns) are selected, and thus four type of linear errors E.sub.s1, E.sub.s2, E.sub.s3 and E.sub.s4 are obtained. From these non-linear errors, the CPU 9 determines a sample pattern SP.sub.min that satisfies the following relation:

where

and where n is the number of the measurement shots of the corresponding measurement sample pattern. Alternatively, on the basis of the following condition: ##EQU6## the minimum non-linear error of each sample pattern may be determined, and the sample pattern selection may be made on the basis of comparison of least square values.

In any event, the CPU 9 memorizes the selected sample pattern SP.sub.min as the measurement shot pattern to be used in the alignment operation for the wafers of the lot, just to be processed. The subsequent alignment operation is performed essentially in the same way as of the second embodiment. When all the wafers of the one lot are processed and they are replaced by those of a second lot, selection of a suitable measurement shot pattern is performed on the wafers of the second lot. The operations described above are illustrated in the flow chart of FIG. 10.

In the example described just above, some measurement shot patterns are determined beforehand and, of them, a suitable pattern is selected. However, as an alternative, a suitable measurement shot pattern may be determined on the basis of the distribution of non-linear errors obtained through measurement. This will be explained below in detail.

After a first one W1 of the wafers of one lot is placed on the X-Y stage 11, the CPU 9 operates to measure positional deviations in X and Y directions, the measurement being done sequentially in accordance with the measurement shot pattern as shown in FIG. 4A, and to determine transformation parameters B.sub.a, .theta. and S.sub.a on the basis of the actual mark position a.sub.i and the design mark position d.sub.i, essentially in the same manner as that of the first embodiment. Then, the distribution in magnitude of non-linear errors E.sub.a determined in accordance with these transformation parameters, is detected by calculation. In FIGS. 11A and 11B, the thus obtained non-linear errors .vertline.E.sub.a .vertline. are illustrated in a contour map. Subsequently, the CPU 9 operates to determine those measurement shot positions, out of errors .vertline.E.sub.a .vertline., having a value greater than a predetermined threshold t.sub.h. As an example, the arrow in FIG. 11B indicates a measurement shot position having a non-linear error larger than the threshold. Here, if this sample shot position is denoted by p=(x.sub.p, Y.sub.p), the transformation parameter calculation is made again while excluding the measured values of those measurement shots lying within the range of a radius r about the position (center) p. The non-linear errors E.sub.r based on the re-calculated transformation parameters are stored in the memory device 12. As for a second wafer and the remaining wafers, they are processed in a similar manner as of the first embodiment, but in the processing, those measurement shots in which in the case of the wafer W1 measurement shots are excluded so as not exceed the threshold t.sub.h are used. Here, the threshold t.sub.h and the radius r may be suitably selected while taking into account the alignment precision required and/or the throughput desired.

In the example described above, even if wafers in the same lot have local deformation, zones in such locally deformed portion are not used as the measurement shots. This effectively avoids degradation of precision of approximation where linear approximation is done to the wafers as a whole. Additionally, with respect to the portion near the locally deformed portion, interpolation is done by using non-linear components measured beforehand. As a result, a very high alignment precision is assured.

While the invention has been described with reference to the structures disclosed herein, it is not confined to the details set forth and this application is intended to cover such modifications or changes as may come within the purposes of the improvements or the scope of the following claims.