US 5,402,301 AGrant
Damping Circuit Providing Capability of Adjusting Current Flowing Through Damping Component
Issue Date:1995-03-28
•8 Claims
•1 Drawing Sheets
Abstract
A damping circuit includes two circuits. Each circuit has a PNP transistor, an NPN transistor, and a shunt resistor. The PNP transistors are connected in series to the NPN transistors through level shift stages. The PNP transistor and the NPN transistor have emitter functions of the same area. The shunt resistors are connected to the emitters of the NPN transistors. Both of the two circuits are connected to a coil in parallel in such a manner that the two circuits have opposite polarities to each other about the coil.
Metadata
Assignee
- Sharp Kabushiki Kaisha
Inventors
- Shunro Mori
- Toshihide Miyake
Application Information
Application Number:US 9950001
Filing Date:1992-12-22
Priority Date:1991-12-24
Art Unit:214
Classifications
IPC:
H01H 4732
Field of Search:
36132356;159286;287
Patent Drawings (1 sheets)
Description
Background of the Invention
1. Field of the Invention
The present invention relates to a damping circuit which is capable of damping a current oscillation caused across a coil when switching the coil for alternating a magnetizing direction of a magnetic body, and more particularly to the damping circuit which provides a technique for adjusting a magnitude of current flowing through a damping component.
2. Description of the Related Art
The inventors of the present application know the damping circuit, as shown in FIG. 2, which is arranged to have a coil 11, a first diode 15a, a second diode 15b, and a shunt resistor 13. Those two diodes 15a, 15b are connected in parallel to the coil 11 so that the first diode 15a may be directed in a reverse manner to the second diode 15b. The shunt resistor 13 is connected in series to both of these two diodes 15a, 15b. That is, the coil 11 is connected in parallel to the first diode 15a and the shunt resistor 13 connected in series to the first diode 15a as well as the second diode 15b directed reversely to the first diode 15a and the shunt resistor 13 connected to the second diode 15b.
When current flows from one terminal C to the other terminal D of the coil 11, counter electromotive force is caused between both of the terminals of the coil 11. The combination of the first diode 15a and the shunt resistor serves to damp the counter electromotive force caused by the current flowing in the direction. On the other hand, when current flows in an opposite manner, likewise, counter electromotive force is caused between both of the terminals of the coil 11. The combination of the second diode 15b and the shunt resistor 18 serves to damp the counter electromotive force caused by the current flowing in the opposite direction.
As described above, the known damping circuit uses those diodes for properly allowing or inhibiting the passage of current. However, the diode bridge circuit disables to adjust the current flowing through the shunt resistor. Therefore, the damping effect can not be improved.
Summary of the Invention
It is therefore an object of the present invention to provide a damping circuit having improved damping effect.
It is another object of the present invention to provide a damping circuit which provides a shunting technique for flowing a larger magnitude of current to its shunt resistor than the known damping circuit if the voltage applied to both terminals of the coil and the shunt resistance of this circuit is the same as those of the known damping circuit.
In carrying out the object, the damping circuit according to an aspect of the invention, comprises: a first damping means for damping a counter electromotive force caused by a current flowing through the coil from a first terminal to a second terminal; and a second damping means for damping a counter electromotive force caused by a current flowing through the coil from the second terminal to the first terminal, each of said first damping means and said second damping means including a first transistor serving as an emitter follower circuit, a second transistor being connected in series to said first transistor through a level shifter stage, the second transistor having the same emitter-joint area as and an opposite polarity to the first transistor, and a shunt resistor connected to an emitter of the second transistor, the first and second damping means being connected in parallel to the coil in a manner to reverse their polarities of the damping means to each other.
The damping circuit of this invention provides a larger damping capability than the known damping circuit if the voltage applied between both terminals of the coil and the shunt resistors of the invention have the same value as that of the known circuit.
Further objects and advantages of the present invention will be apparent from the following description of the preferred embodiment of the invention as illustrated in the accompanying drawings.
Brief Description of the Drawings
FIG. 1 is a circuit diagram showing a damping circuit according to an embodiment of the invention.
FIG. 2 is a circuit diagram of the known damping circuit.
Description of the Preferred Embodiment
Hereafter, a preferred embodiment of the invention will be described as referring to FIG. 1.
FIG. 1 shows a damping circuit of this embodiment. Numeral 1 denotes a coil. Numerals 2a and 2d denote respectively PNP transistors serving as an emitter follower circuit. Numerals 2b and 2c denote respectively NPN transistors. Numerals 3a and 3d denote respectively resistors, each for a level shift stage. Numerals 3b and 3c denote respectively shunt resistors. Numerals 4a and 4d denote constant current sources, each for supplying current to each emitter of the PNP transistors 2a and 2d. Since the joint area of the emitters of the PNP transistors 2a and 2d is equal to that of the NPN transistors 2b and 2c, the voltage V.sub.PBE between the base and the emitter of each PNP transistor is equivalent to the voltage V.sub.NBE between the base and the emitter of each NPN transistor.
The base of the PNP transistor 2a is connected to one terminal A of the coil 1 and the collector of the PNP transistor 2a is connected to the other terminal of the coil 1 so that current flows from the constant current source 4a to the emitter of the PNP transistor 2a. The emitter of the PNP transistor 2a is connected in series to the base of the NPN transistor 2b through the level shift stage composed of the resistor 3a and the constant current source 4b. The collector of the NPN transistor 2b is connected to the terminal A of the coil and the emitter of the NPN transistor 2b is connected to one end of the shunt resistor 3b, the other end of which is connected to the terminal B of the coil.
The PNP transistor 2a, the resistor 3a, the NPN transistor 2b and the resistor 3b serve as a first damping means.
The base of the PNP transistor 2d is connected to one terminal B of the coil 1 and the collector of the PNP transistor 2d is connected to the other terminal A of the coil 1 so that current flows from the constant current source 4d to the emitter of the PNP transistor 2d. The emitter of the PNP transistor 2d is connected in series to the base of the NPN transistor 2c through the level shift stage composed of the resistor 3d and the constant current source 4c. The collector of the NPN transistor 2c is connected to the terminal B of the coil and the emitter of the NPN transistor 2c is connected to one end of the shunt resistor 3c, the other end of which is connected to the terminal A of the coil.
The PNP transistor 2d, the resistor 3d, the NPN transistor 2c and the resistor 3c serve as a second damping means.
The damping circuit of this invention is characterized to provide the first damping means and the second damping means having an opposite polarity to each other about the coil 1, both of the damping means being connected in parallel.
Next, the description will be oriented to how the foregoing circuit performs the damping operation as referring to FIG. 1, in which the counter electromotive force caused when current flows from the terminal B to A of the coil is damped through the effect of the NPN transistor 2b and the shunt resistor 3b.
At first, assuming that the potential at the terminal A is via, the potential v.sub.01 at the point F is derived by the following expression. ##EQU1## As such, the current I.sub.01 flowing through the shunt resistor R2 is derived as follows.
On the other hand, considering the known damping circuit of the related art shown in FIG. 2, assuming that the potential at the terminal corresponding to the terminal A of FIG. 1 is v.sub.ic and a forward voltage of the diode 15a is V.sub.F, the potential v.sub.02 at a contact G between the first diode or the second diode directed in an opposite manner and the shunt resistor is derived as follows.
Hence, the current I.sub.02 flowing through the shunt resistor becomes as follows.
where the potential v.sub.ia is equivalent to the potential v.sub.ic.
Assuming that the shunt resistor R.sub.2 of the embodiment has the same resistance as that of the known circuit, therefore, the voltage V.sub.F is a fixed value, while I.sub.2 *R.sub.1 is allowed to be adjusted into a lower value than V.sub.F since a value of I.sub.2 can be changed. That is, the know circuit disables to adjust the current flowing through the shunt resistor, while the circuit of this embodiment enables to do it.
Now, the description will be directed to the operation of the forgoing circuit to damp the counter electromotive force caused by the current flowing from the terminal B to the terminal A.
The level shift stage consisting of the resistor 3a and the constant current source 4b operates to switch the NPN transistor 2b on. The emitter level V.sub.AE of the NPN transistor 2b at this time point A is derived as follows by using a base to emitter voltage V.sub.PBE of the PNP transistor 2a, a voltage R.sub.1 *I.sub.2 caused by flowing the current I.sub.2 through the resistor 3a, and a base to emitter voltage V.sub.NBE of the NPN transistor 2b.
Since V.sub.PBE =V.sub.NBE, V.sub.AE =R.sub.1 *I.sub.2 is established.
By reducing the current magnitude of the constant current source I.sub.12, therefore, the current flowing through the shunt resistor 3b is made larger so that the shunt resistor 3b may provide a larger damping effect on the vibrations caused when switching the coil from the terminals A to B than the known circuit.
Likewise, the counter electromotive force caused by the coil when the current flows from the terminals A to B is damped through the effect of the shunt resistor 3c and the NPN transistor 2c.
The level shift stage consisting of the resistor 3d and the constant current source 4c operates to switch the NPN transistor 2c on. The emitter level V.sub.AE of the NPN transistor 2c at this time point A is derived as follows by using a base to emitter voltage V.sub.PBE of the PNP transistor 2d, a voltage R4*I3 caused by flowing the current I.sub.3 through the resistor 3d, and a base to emitter voltage V.sub.NBE of the NPN transistor 2c.
Since V.sub.PBE =V.sub.NBE, V.sub.AE =R4*I.sub.3 is established.
By reducing the current magnitude of the constant current source I.sub.3, therefore, the current flowing through the shunt resistor 3c is made larger so that the shunt resistor 3c may provide a larger damping effect on the vibrations caused when switching the coil from the terminals B to A than the known circuit.
Many widely different embodiments of the present invention may be constructed without departing from the spirit and scope of the present invention. It should be understood that the present invention is not limited to the specific embodiments described in the specification, except as defined in the appended claims.
Claims
What is claimed is:
1. A damping circuit for damping a counter electromotive force caused by a current flowing through a coil having first and second terminals, comprising: a first damping means for damping a first counter electromotive force caused by a current flowing through the coil from the first terminal to the second terminal; and a second damping means for damping a second counter electromotive force caused by a current flowing through the coil from the second terminal to the first terminal, each of said first damping means and said second damping means including a first transistor serving as an emitter follower circuit, a second transistor being connected in series to said first transistor through a level shift stage, said first and second transistors having respectively emitter junctions of the same area and polarities opposite to each other, and a shunt resistor connected to an emitter of said second transistor, said first and second damping means being connected in parallel to the coil and having a polarities opposite to each other about the coil.
2. A damping circuit as claimed in claim 1, wherein said first transistor is a PNP transistor and said second transistor is an NPN transistor.
3. A damping circuit as claimed in claim 2, wherein the base, the emitter and the collector of the first transistor of the first damping means are connected to the second terminal of the coil, the level shift stage of the first damping means and the first terminal of the coil, respectively.
4. A damping circuit as claimed in claim 2, wherein the base, the emitter and the collector of the first transistor of the second damping means are connected to the first terminal of the coil, the level shift stage of the second damping means and the second terminal of the coil, respectively.
5. A damping circuit as claimed in claim 1, wherein said level shift stage of each of said first and second damping means includes a resistor and a constant current source.
6. A damping circuit as claimed in claim 2, wherein the base of said second transistor of each of said first and second damping means is connected to respective one of constant current sources.
7. A damping circuit as claimed in claim 2, wherein the collector of said second transistor and the shunt resistor of said first damping means are connected to said second terminal of the coil and the first terminal of the coil, respectively.
8. A damping circuit as claimed in claim 2, wherein the collector of said second transistor and the shunt resistor of said second damping means are connected to said first terminal of the coil and said second terminal of the coil, respectively.
Patent Citations (6)
Non-Patent Literature (2)
- Kuniaki Makabe, "Design of Control Circuit for Stepping Motor", pp. 62-75, published in 1987, Tokyo, Japan.
- Hajime Kato, "IC for Controlling Small Motor", pp. 252-257, published in 1986, Tokyo, Japan.