Automatic Gain Control System

This invention relates to a spread spectrum receiver, and more particularly to an improvement of an automatic gain control system thereof.

FIG. 4 shows a prior art automatic gain control system used in a spread spectrum receiver. In this drawings, reference numeral 1 refers to a correlator, 2 to an IF (intermediate frequency) amplifier, 3 to a correlation detector, and 4 to an AGC (automatic gain control) amplifier.

The correlator 1 is supplied with a received spread-spectrum signal and gives a correlation output to the correlation detector 3 via the IF amplifier 2.

The correlation detector 3 produces an output which exhibits a correlation spike A as shown in FIG. 5. When the correlation spike A is large, the AGC amplifier 4 exhibits a large output level and controls the IF amplifier 2 to decrease its gain.

When the correlation spike A is small, the AGC amplifier 4 exhibits a small output level and controls the IF amplifier 2 to increase its gain.

As described, the prior art automatic gain control system uses the correlation detector for detecting an output of the IF amplifier. Therefore, when two convolvers are used as the correlator 1, two correlation detectors are required to detect respective correlation outputs from two convolvers, and this invites a complicated circuit arrangement and an increase in the manufacturing cost.

The prior art system also requires two IF amplifiers and corresponding two AGC amplifiers, and this further complicates the circuit arrangement.

Beside this, in case of a waveform such as the correlation spike A, an AGC circuit which follows the peak value is used generally. Such an AGC circuit is provided with a short time constant for electric charge and a long time constant for electric discharge. In this case, however, the AGC circuit, although quickly responsive to a change causing an increase of the correlation spike, exhibits a slow response to a change causing a decrease. Further, although the discharge time constant is long, the AGC circuit discharges little by little continuously when the correlation spike does not exist. Therefore, the AGC control voltage changes continuously, and this invites an erroneous operation caused by a noise or spurious response during absence of the correlation spike.

In an SSC receiver, direct detection of an SSC signal is impossible. Therefore, a carrier sense signal indicative of whether the SSC signal is received or not is obtained using a correlator output. The above-indicated conventional carrier sense system using the AGC system, as shown in FIG. 16A, detects a correlation spike S.sub.1 of a correlator output by comparing it with a threshold value S.sub.2, counts the number of detected correlation spikes S.sub.3 in a counter, and outputs a carrier sense signal S.sub.4.

In this system, however, when the received signal level is weak, as shown in FIG. 16B, the number S'.sub.3 of noises N detected by an erroneous operation of the correlator caused by the noises is accumulated, and an erroneous carrier sense signal S'.sub.4 is produced.

It is therefore an object of the invention to provide a spread spectrum receiver having an automatic gain control system which is quickly responsive to the correlation spike alone to control the receiver to never increase the noise level and never degrade the signal-to-noise ratio.

A further object of the invention is to provide a spread spectrum receiver having an automatic gain control system suitable for the use of a correlator of a type producing at least two correlation outputs.

In order to achieve the objects, an inventive system includes a variable gain amplifier means which amplifies a correlation output and whose gain is controlled in response to a demodulation output of a demodulator which demodulates an output of the amplifier.

In a first preferred embodiment of the invention, two correlators and two corresponding variable gain amplifiers are used, and a gain of each amplifier is controlled by a single AGC circuit in response to the demodulation output.

In a second embodiment of the invention, the correlation spike supplied from the demodulator is compared to two positive or negative threshold voltages in accordance with the polarity of the correlation spike, and the gain of the variable gain amplifier is controlled in response to a resultant comparison output so as to maintain the peak of the correlation spike between the said two positive or negative threshold voltages.

In a spread spectrum receiver having the automatic gain control system of the first embodiment, the gain of the variable gain amplifier for amplifying respective correlation outputs is controlled in response to a single demodulation output in lieu of an amplified output of the amplifier itself. Therefore, the system requires no correlation detector used in the prior art system. Further, since gain controls of respective amplifiers are effected simultaneously in response to a single demodulation output, a single AGC circuit suffices for these amplifiers.

A novel carrying sensing circuit detects a matching condition between the transmitted and locally generated pseudorandom number (PN code) to govern the synchronizing operation of the (PN code) generator of the receiver.

FIG. 1 is a block diagram of an embodiment of the invention;

FIGS. 2A-2C show waveforms to explain an operation of the embodiment of FIG. 1;

FIG. 3 is a block diagram of a further embodiment of the invention;

FIG. 4 is a block diagram of a prior art gain control system in a spread spectrum receiver;

FIG. 5 shows a waveform of a correlation spike in the system of FIG. 4;

FIG. 6 is a block diagram showing a general arrangement of a second embodiment of the invention;

FIG. 7 is a block diagram of the second embodiment of the invention;

FIGS. 8 through 12 show waveforms to explain operations of the embodiment.

FIG. 13 shows details of a carrier sensed circuit and data switch circuit shown in FIG. 7.

FIG. 14 is a block diagram showing an example of the synchronous signal generating circuit of FIG. 7.

FIG. 15 is a timing chart for explaining the operation of the circuit of FIG. 14.

FIGS. 16A and 16B show waveforms for explaining the conventional carrier sense system.

The invention is described below in detail, referring to preferred embodiments illustrated in the drawings as using a multiplier as a demodulator.

FIG. 1 shows a general arrangement of an embodiment of an inventive spread spectrum receiver in which reference numerals 5 and 6 refer to convolvers, 7 and 8 to multipliers, 9 to a phase shifter, 10 and 11 to variable gain amplifiers, 12 to a multiplier used as a demodulator, 13 to a low-pass filter, and 14 to an automatic gain control circuit.

A received spread-spectrum signals are applied to one of the inputs of each convolver 5 (6) while the other ends of the convolvers 5 and 6 are supplied with first and second reference signals Rf1 and Rf2, respectively.

A CW signal CW.sub.1 having the same frequency as an RF carrier signal of a spread-spectrum signal S is applied to one of the inputs of the phase shifter 9 and one of the inputs of the multiplier 7. The phase shifter 9 shifts the CW signal CW.sub.1 by a predetermined value, e.g. 90 degrees, and gives it to one of the inputs of the multiplier 8.

The other ends of the multipliers 7 and 8 are supplied with PN codes PN1 and PN2, respectively, and their outputs are used as the first and second reference signals Rf1 and Rf2.

The convolvers 5 and 6 correlate the first and second reference signals Rf1 and Rf2 with the spread-spectrum signal S, respectively, and respective correlation outputs Vc1 and Vc2 are applied to the multiplier 12 via the amplifiers 10 and 11. The multiplier 12 gives its output to the low-pass filter 13 to obtain a data demodulation signal Vf.

It is explained below how the data demodulation signal Vf is obtained from the received spread-spectrum signal S in the above-described arrangement.

The received spread-spectrum signal S is expressed by:

where P1(t) and P2(t) are first and second PN codes used in modulation in a transmitter's station, A is data which exhibits 1 or -1, and the signal S is applied equally to two convolvers.

The first and second reference signals Rf1 and Rf2 entered in two convolvers are expressed by:

where P1(t) and P2(t) are receiver's PN codes PN1 and PN2 used in demodulation, and they are mirror images (time-inverted signals) of the transmitter's P1(t) and P2(t).

Respective outputs Vc1 and Vc2 of two convolvers are:

where CONV{V1(t), V2(t)}indicates a convolution of two inputs V1(t) and V2(t).

When establishing:

the convolver output CONV{V1(t), V2(t)}is expressed by:

where n is the efficiency of the convolver, .PHI. is an additive phase inherent in the convolver, and it is acknowledged that the phase change .theta. in one input V2(t) appears at the output in the original form.

Since the mutual correlations between P1(t) and P2(t) and between P2(t) and P1(t) is small, a large error is not produced also when establishing:

Expressions (9) and (10) can be rewritten into:

where R1(t) and R2(t) are convolutions between P1(t) and P1(t) and P2(t) and P2t, respectively, and .PHI..sub.1 and .PHI..sub.2 are additional phases inherent in respective convolvers.

When an output Vm(t) after multiplication of Vc1(t) and Vc2(t) is expressed by: ##EQU1## where

the following equation is established: ##EQU2##

The demodulation signal Vf(t) obtained by filtering Vm(t) through the low-pass filter is expressed by:

FIG. 2 shows waveforms of Vc1(t), Vc2(t) and Vf(t) when .PHI..sub.1 =.PHI..sub.2. From FIG. 2 and equation (16) it is known that the arrangement of FIG. 2 enables data demodulation.

In the above-described spread spectrum receiver, the invention particularly employs the automatic gain control circuit 14 positioned between the low-pass filter 13 and the variable gain amplifiers 10 and 11 and configured to control gains of the amplifiers in response to the multiplication output of the multiplier 12 so as to prevent saturation of outputs of the amplifiers 10 and 11.

Therefore, as understood from the above-described arrangement, the invention is configured to perform indirect gain control of the amplifiers 10 and 11 in response to the multiplication output of the subsequent stage thereof, in lieu of direct gain control responsive to outputs of the amplifiers in the prior art system.

In the spread spectrum receiver of FIG. 1, the correlator is made of two convolvers, and respective correlation outputs are entered in a single multiplier so as to obtain a single multiplication output as a demodulation output. Taking this arrangement of the correlation demodulation system into consideration, the inventive gain control system is configured so that the gain control circuit 14 controls gains of the amplifiers 10 and 12 concurrently in response to the afore-mentioned single multiplication output.

Apparently, the inventive gain control system may be used not only in an arrangement using two convolvers as the correlator but also in any other arrangement capable of producing at least two correlation outputs.

The same automatic gain control system may be used also in a spread spectrum receiver using an adder and a subtractor as the demodulator as shown in FIG. 3.

FIG. 6 shows a further embodiment of the invention in which an inventive automatic gain control system is used in a spread spectrum receiver. In the drawing, reference numeral 21 refers to a correlator, 22 to a variable gain amplifier, 23 to a demodulator and AGC to an AGC circuit responsive to an output of the demodulator 23 to control the gain of the variable gain amplifier 22.

The AGC circuit is made of a comparison stage CA, a reference voltage generating stage RV, a count control stage CC, a clock selecting stage CL, a count stage CU and a gain control current generating stage GC.

The comparison stage CA may be made of a comparator circuit 24 as shown in FIG. 7, and the reference voltage generating stage RV may have a threshold voltage producing circuit 25. The count control stage CC includes absolute value circuits 26 and 26', digital mono-multivibrators 27 and 27' gates 28 and 28' and clock gates 29 and 29'.

The clock selecting stage CL consists of a clock switch circuit 35, the count stage CU includes an up/down counter 30 and a decoder 34, and the gain control current generating stage GC consists of a D/A converter. Reference numeral 31 denotes a data switch circuit, and 2 denotes a carrier sense circuit.

The comparator 24 includes four comparators 24a through 24d having plus (+) terminals supplied with an output of the demodulator 23 and minus (-) terminals supplied with threshold voltages f and g of the threshold voltage generating circuit 25. Minus (-) terminals of the comparators 24c and 24d are supplied with an output of the demodulator 23, and plus (+) terminals thereof are supplied with threshold voltages h and i of the circuit 25.

The absolute value circuits 26 and 26' may consist of OR circuits, for example, which are supplied with comparison outputs b through e of respective comparators, and outputs of the circuits 26 and 26 pass through the mono-multivibrators 27-27' gates 28-28' and clock gates 29-29' and reach up and down terminals UP and DOWN of the up/down counter 20.

The counter 20 gives its output to the D/A converter 23 via the data switch circuit 31, and the gain of the variable gain amplifier 22 is controlled by an output of the D/A converter 23.

In the arrangement of FIG. 6, a correlation spike supplied from the demodulator 23 is compared in the comparison stage CA with positive or negative two threshold voltages supplied from the reference voltage generating stage RV and selected according to the polarity of the correlation spike. Responsively to a comparison result, the count stage CC selects a clock from the clock selecting stage CL and gives it to the count stage CU which responsively counts it in the positive or negative direction. The gain control current generating stage GC produces a current corresponding to the counted value, and the gain of the variable gain amplifier 22 is controlled to hold the correlation spike between the positive or negative threshold voltages. These operations are further described below, referring to the embodiment of FIG. 7.

In FIG. 7, the correlator 21 produces a high-frequency, intermittent correlation spike at every T interval when, for example, all data which has been spread-spectrum-demodulated is a sequence of "1" or "0", and varies at T/2 interval as shown in FIG. 8 (where T is one period of a PN code used for spread spectrum of data. The correlation spike is amplified by the variable gain amplifier 22 and demodulated by the demodulator 23 to obtain a base band signal a shown in FIG. 9.

The comparator 24 is supplied from the threshold voltage generating circuit 25 with threshold voltages v2+f, v1+g, v1-h and v2-i shown in FIG. 10.

When the base band signal a exceeds v1+, v3c is outputted, and when it exceeds v2+, v4b and v3c are outputted.

When the base band signal a is below v1-, v2d is outputted, and when it is below v2-, v1e and v2d are outputted.

The absolute value circuit 26 is supplied with v4b and v1e whereas the other absolute value circuit 26' is supplied with v3c and v2d. These circuits 26 and 26' perform respective OR operations and obtain signals j and k. These relationships are shown in FIG. 11.

An aimed operation of the AGC circuit of FIG. 7 is to control the variable gain amplifier based on these signals so as to maintain the positive peak of the base band signal a between the threshold levels v1+ and v2+ and the negative peak between the threshold levels v1- and v2-.

The digital mono-multivibrators 27 and 27', as shown in FIG. 11 is triggered by signals j and k and obtains pulse signals l and m of .tau.1. Referring to FIG. 8, .tau.1 selectively exhibits T/2<.tau.1<T corresponding to the correlation spike at T/2 interval and T/2<.tau.1<2T corresponding to the correlation spike at T interval, and one of them can be selected by switching the time clock v of the digital mono-multivibrators by the clock switch circuit 35. This is because the AGC may be erroneously operated by a noise when outputs l and m of the mono-vibrators are below one period of correlation peaks, and the AGC will become slow in its operation when the correlation peak exceeds 2 periods.

The gates 28 and 28' are responsive to a control signal y entered in adjustment of the receiver to prevent signals l and m from appearing at outputs of the gates 28 and 28' and to maintain signals n and o in condition D in Table 1.

The clock gates 29 and 29' are responsive to output signals n and o of the gates 28-28', and UP count prohibit signal x and a DOWN count prohibit signal u to control the count clock t and produce an UP pulse p and a DOWN pulse q as shown in Table 2.

The up/down counter 30 is triggered by the UP pulse p and the DOWN pulse q to effect a counting operation and outputs binary data of N bits.

The data switch circuit 31 is responsive to the control signal y entered upon adjustment of the receiver to switch the output to data r and fix the gain of the variable gain amplifier 22 to a fixed value.

The D/A converter 33 analog-converts an output of N bits of the data switch circuit and gives it to the variable gain amplifier 22 to control the gain. The D/A converting operation of the D/A converter 33 is done well when using a non-linear D/A converter to effect a linear control by correcting the control characteristic of the variable gain amplifier 22.

It is not desirable that the counter 30 operates as a ring counter and causes all the N bits of the output to exhibit "0" due to UP pulses subsequent to "1" or oppositely change to "1" from all "0" condition due to subsequent DOWN pulses. In this connection, the decoder 34 decodes the output of the counter, and when all the N bits are "1", produces an UP count prohibit signal x, and when all the N bits exhibit "0" produces a DOWN count prohibit signal u to control the clock gate circuits 29 and 29' in order to prohibit an UP counting from all "1" condition to all "0" condition and prohibit a DOWN counting from all "0" condition to all "1" condition.

The carrier sense circuit 32 compares the output of the counter with the data s, and when the value of the counter output is larger than the data s, produces a carrier sense signal w.

The clock switch circuit 35 switches clocks CL1 and CL2 in response to a control signal z and the carrier sense signal w, and produces a time clock v as shown in FIG. 12.

Therefore, the AGC circuit operates to output a DOWN pulse in condition A or D in Table 2, effect a DOWN counting and increase the gain of the variable gain amplifier. This is effected when the base band signal a is above the threshold voltage v1+ and not below v1-, i.e., when the level of the base band signal a is small.

Further, the AGC circuit operates to an UP pulse to effect an UP counting in condition C or I and reduce the gain of the variable amplifier. This is effected when the base band signal a is above the threshold voltage v2+ or below v2-, i.e., when the base band signal level is large.

In this fashion, condition B, E or H is finally established where the value of the counter does not change and hence the gain of the variable gain amplifier does not change. As a result, the positive peak of the base band signal a is positioned between the threshold levels v1+ and v2+, and the negative peak thereof is positioned between the threshold levels v1- and v2-, so that the aimed object of the AGC circuit of FIG. 7 is attained.

Since the AGC circuit of FIG. 7 uses a correlation spike having both the positive and negative polarities, it has two threshold voltages respectively and has the absolute value circuits 26 and 26' at positive and negative sides. However, if the correlation spike has a waveform of the positive or negative part alone, the threshold voltages are only two in either polarity, and the absolute value circuits 26 and 26' are not required.

Although a circuit using the up/down counter has been described heretofore, the same operation can be performed by using a CPU in lieu of the up/down counter for software processing or by using a bi-directional shift register.

As described above, according to the invention, also when two convolvers are used as a correlator, detection of correlation outputs of respective amplifiers is not necessary. Further, since the gains of the amplifiers are controlled simultaneously using a single multiplication output and not by individual control, the circuit arrangement is simplified and the manufacturing cost is reduced.

Additionally, the invention provides an excellent AGC circuit in a spread spectrum receiver which reliably prevents erroneous operations caused by noises and permits a free selection of the control range without adjustment.

Although a number of carrier sensed circuits 34 for producing a controlled signal waveform indicative of a match between the PN codes received from the transmitter with those locally generated would be readily evident to one skilled in the art, FIG. 13 shows the preferred form, including the data switch 31. First, recapitulating the foregoing, it will be recalled that the data r signal is an externally set signal applied to the upper left input of the data switch circuit 31. This signal is preferably a constant signal of N bits which are, for example, all "0" or all "1". The signal indicated as data s shown in FIG. 7 is also an externally set signal applied to one of the input of the carrier sensor circuit 32, and is preferably the constant signal of an N bit. Finally the carrier sensed circuit 32 generates the carrier sensing w when the counter output value is larger than the data s value. FIG. 13 shows the specific arrangements of the carrier sensed circuit 32 and the data switch circuit 31. For the carrier sensed circuit 32, a known digital comparator, for example, Texas Instruments type 74LS85 may be used. For the data switch circuit 31, a variety of 3-terminal relay switches or a logic circuit as demonstrated may be used. In FIG. 13 AND 1 and AND 2 denote AND circuits and NOT designates a NOT circuit (invertor). The carrier sensed signal w generated by the carrier sensed circuit 32 is not only applied to the clock switch circuit 35, but is also used to determine a match between a PN code over the receiver corresponds to that received from the transmitter. For example, it is used for starting the synchronizing operation of PN code generator of the receiver.

In this connection, a synchronous signal generating circuit 36 is used, for example, in FIG. 7.

The synchronous signal generating circuit 36 may be arranged as shown in FIG. 14. The timing chart of this circuit is shown in FIG. 15. The carrier sense circuit 32 compares a digital data corresponding to the count value of a counter 30 with a comparison data S and outputs a carrier sense signal II. The synchronous signal generating circuit 36 is responsive to the carrier sense signal and a control signal CL3 to output a synchronous signal I. When the data is changed from "1" to "0 (or from "0" to "1"), an intermittent correlation spike of a high frequency is outputted in the period T.

Next the operation of the synchronous signal generating circuit 36 is explained. The circuit consists of, for example, a D-flip-flop, NAND gate, mono-multivibrator A and mono-multivibrator B. The D-flip-flop is supplied with the carrier sense signal II and the clock signal t, and when the carrier sense signal is "H," the output O.sub.1 of the flip-flop represents "H." However, unless a buffer-ready signal CL3 of another signal entering in the NAND is "H," the NAND output O.sub.2 is not changed, and the subsequent signals are not changed either.

The carrier sense signal represents "H" when the AGC value exceeds a certain value. This means that a received signal above a certain level enters continuously, i.e., an SSC signal is received. The buffer-ready signal represents "H" when the system is ready for signal reception.

Therefore, when the carrier sense signal is inputted while the buffer-ready signal CL3 is "H," the NAND gate output O.sub.2 represents "L," and the output O.sub.3 of the mono-multivibrator A represents "H." The output O.sub.3 is changed to "L" after the setting time (t) of the mono-multivibrator A. This drop causes the mono-multivibrator B to be triggered to represent "H" at its output, and a synchronous signal I having the length of the setting time of the mono-multivibrator B is outputted accordingly. The mono-multivibrator A functions to delay the output timing by the time t from entry of the carrier sense signal II to exit of the synchronous signal I.

AGC system of the spread spectrum communication receiver is configured to control the gain of the variable gain amplifier for amplification of correlation outputs not by counting the correlation spikes themselves but by counting clock signals in response to the correlation output, and the generation of the carrier sensed signal is based on a count output of said clock signals. Therefore, the AGC signal is free from the influence of noise, and generation of the carrier sensed signal is accurately done. Additionally, since such signal generation is digitally done, external control thereof is facilitated.

Further, the conventional carrier sense system is largely affected by noises because it is configured to output the carrier sense signal in response to all noises above the threshold. In contrast, the inventive carrier sense system using the AGC circuit is configured to output the carrier sense signal in response to correlation spikes alone, which results in the same effect as passing the correlation output through a window, and noise influence is reduced.

While the invention has been described with reference to a preferred embodiment, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the broader aspects of the invention. Also, it is intended that broad claims not specifying details of a particular embodiment disclosed herein as the best mode contemplated for carrying out the invention should not be limited to such details. Furthermore, while, generally, specific claimed details of the invention constitute important specific aspects of the invention in appropriate instances even the specific claims involved should be construed in light of the doctrine of equivalents.