Method of Manufacturing a Semiconductor Device Having an Insulating Layer Composed of a BPSG Film and a Plasma-CVD Silicon Nitride Film

1. Field of the Invention

The present invention relates to a semiconductor device comprising a semiconductor substrate and an insulating layer which may serve as a primary insulating film for passivating active regions formed in the semiconductor substrate, an interlayer-insulating film provided between metal wiring layers and a final insulating film applied on an uppermost surface of the semiconductor device. The invention also relates to a method of manufacturing such an insulating layer.

2. Description of the Related Art

The final passivation film applied on the uppermost surface of a semiconductor device should have such properties that the introduction of impurities into a semiconductor chip can be prevented and the impurities are held in the passivation film due to its gettering effect. Further, it is required that the insulating film be formed at a low temperature and have excellent mechanical, physical and chemical properties.

It has been proposed to form the final insulating layer by a PSG (phosphosilicate glass) film which has a good gettering function for alkali ions and which can be formed at a lower temperature. However, it is well known that the PSG film has poor moisture resistance and waterproof properties. It is also known to use a plasma-CVD silicon nitride film as the final insulating film. This plasma-CVD silicon nitride film can be formed at a low temperature and has excellent mechanical and chemical blocking properties. However, the plasma-CVD silicon nitride film has a poor gettering effect. In order to compensate the above-mentioned drawbacks of the known insulating film, it has been further proposed to use a double-layer final insulating layer in which a plasma-CVD silicon nitride film is formed on a PSG film. Such a final passivation film is disclosed in Japanese Patent Application Laid-open Publications Kokai Sho 60-214534 and 63-84122.

FIG. 1 is a cross-sectional view showing the above-mentioned known semiconductor device in which the final insulating layer is formed by a double-layer of a PSG film and a plasma-CVD silicon nitride film. As illustrated in FIG. 1, an aluminum wiring pattern 1 is formed on an insulating film in the form of protrusions and a PSG film 2 is formed on the wiring pattern 1. A plasma-CVD silicon nitride film 4 is formed on the PSG film 2. The PSG film 2 does not have a sufficient step coverage due to its low flattening characteristic. Therefore, when the PSG film 2 is formed on the aluminum wiring pattern 1, there are formed overhangs 3 corresponding to the protrusions of the wiring pattern 1. Moreover, the plasma-CVD silicon nitride film 4 formed on the PSG film 2 has similar overhangs 5 as those of the underlying PSG film 2. At these overhangs 3 and 5, the thickness of the insulating layer, particularly the upper plasma-CVD silicon nitride film, becomes very thin. The plasma-CVD process for forming the plasma-CVD silicon nitride film 4 is generally carried out by utilizing a parallel electrode type plasma CVD apparatus. The movement of ions is predominantly limited to the up and down direction, so that the plasma-CVD silicon nitride film 4 is liable to be porous, and thus it does not have sufficient moisture resistance and waterproof properties necessary for the final passivation layer. This results in a serious deterioration in the reliability of the semiconductor device. Similar drawbacks would equally occur in the primary insulating layer and interlayer-insulating film.

In order to mitigate the above-explained drawback, it is proposed to increase the thickness of the upper plasma-CVD silicon nitride film. However, this solution might cause another problem because the plasma-CVD silicon nitride has a large residual stress, so that the thick silicon nitride film might cause the aluminum wiring pattern to deform and break, introducing cracks and aluminum slide into the semiconductor device. Further, it would be difficult to obtain the required precision for etching pads. Moreover, there might be a problem in the anti-plasma property against the resist for use in the pad etching.

The present invention provides a novel and useful semiconductor device including an insulating film having an excellent step coverage at a low temperature.

The invention also provides a semiconductor device with a final passivation layer having excellent gettering, moisture resistance and waterproof characteristics.

According to the invention, a semiconductor device comprises:

a semiconductor substrate having a main surface;

a metal wiring pattern formed on the main surface of the semiconductor substrate; and

an insulating layer including a borophosphosilicate glass film formed by a chemical vapor deposition of a gaseous mixture of an organic silane, alkoxides of boron and phosphorus and ozone under atmospheric pressure.

In a preferred embodiment of the semiconductor device according to the invention, the insulating layer further comprises a plasma-CVD silicon nitride film formed on the borophosphosilicate glass film. Such an insulating layer is particularly suitable as the final passivation layer of the semiconductor device.

The present invention also relates to a method of manufacturing a semiconductor device and provides a novel and useful method of manufacturing a semiconductor device comprising an insulating film having excellent gettering, moisture resistance and waterproof properties.

According to the invention, a method of manufacturing a semiconductor device comprises the steps of:

forming active regions in a semiconductor substrate;

forming a metal wiring pattern on the semiconductor substrate; and

forming a borophosphosilicate glass film over the metal wiring pattern by chemical vapor deposition by introducing the semiconductor substrate into a reaction vessel kept at atmospheric pressure and supplying a gaseous mixture of an organic silane, alkoxides of boron and phosphorus and ozone.

In a preferred embodiment of the method according to the invention, after the borophosphosilicate glass film has been formed, the semiconductor substrate is introduced into a plasma-CVD reactor and a plasma-CVD silicon nitride film is formed on the borophosphosilicate glass film by introducing a gaseous mixture of SiH.sub.4, NH.sub.3 and N.sub.2 into the reactor.

FIG. 1 is a cross-sectional view showing a known semiconductor device having an insulating layer made of a phosphosilicate glass film and a plasma-CVD silicon nitride film;

FIG. 2 is a cross-sectional view illustrating a part of an embodiment of the semiconductor device according to the invention;

FIG. 3 is a cross-sectional view depicting defects formed in the known semiconductor device;

FIG. 4 is a cross-sectional view showing the step coverage of the insulating layer of the known semiconductor device; and

FIG. 5 is a cross-sectional view illustrating the step coverage of the insulating layer of the semiconductor device according to the invention.

FIG. 2 is schematic view showing part of an embodiment of the semiconductor device according to the invention. On an aluminum wiring pattern 11 formed on an insulating film such as a silicon oxide film provided on a main surface of a semiconductor substrate, there are formed a borophosphosilicate glass (BPSG) film 12 and a plasma-CVD silicon nitride film 13. According to the invention, the BPSG film 12 is formed by chemical vapor deposition by introducing the semiconductor substrate into a reaction vessel kept at atmospheric pressure and supplying a gaseous mixture of an organic silane, alkoxides of boron and phosphorus, and ozone into the reaction vessel. A known BPSG film formed by an atmospheric pressure CVD process using SiH.sub.4 gas has to be reflowed in order to obtain a flat surface. During this reflow process, the aluminum wiring pattern 11 is subject to a high temperature and might be melted. The BPSG film 12 formed by the organic silane-O.sub.3 atmospheric pressure-CVD according to the invention has an excellent step coverage, so that even if the aluminum wiring 11 has a large step, the BPSG film 12 has a rather flat surface as depicted in FIG. 2. This is due to the fact that in the organic silane-O.sub.3 atmospheric pressure-CVD process, the ozone gas is very active and the organic silane such as TEOS (tetra ethyl ortho silicate) is easily decomposed at a low temperature so that phosphorus and boron atoms are introduced into the borophosphosilicate glass film. The phosphorus and boron atoms decrease the viscosity of the film so that the step coverage is improved. Moreover, the plasma-CVD silicon nitride film 13 also has a flat surface, and thus has excellent moisture resistance and waterproof properties.

Therefore, the insulating layer according to the invention formed by the organic silane-O.sub.3 atmospheric pressure CVD film 12 and the plasma CVD silicon nitride film 13 is particularly suitable as the uppermost final passivation layer of the semiconductor device. However, the insulating layer according to the invention may be advantageously used as the primary insulating layer for protecting the active regions formed in the semiconductor substrate and the interlayer-insulating layer provided between successive wiring pattern layers. For instance, when the organic silane-O.sub.3 atmospheric pressure-CVD film according to the invention is used as the interlayer-insulating layer, an upper aluminum wiring pattern having a uniform thickness can be formed on the insulating layer having a flat surface and undesired breakage of the upper aluminum wiring pattern can be effectively avoided.

In the present embodiment, the borophosphosilicate glass film 11 has a thickness of about 6000 .ANG. and the plasma CVD silicon nitride film 12 has a thickness of about 4000 .ANG.. According to the present invention, it is preferable that the borophosphosilicate glass film is deposited to have a thickness of 2000.about.10000 .ANG. and the plasma CVD silicon nitride film is formed to have a thickness of 2000.about.5000 .ANG.. Then, the thickness of the plasma CVD silicon nitride film having a large residual stress can be made smaller, so that the influence upon the underlaying metal wiring can be reduced to a large extent. Moreover, by reducing the thickness of the plasma CVD silicon nitride film, the amount of hydrogen (H) contained in this film is correspondingly decreased, so that fluctuation in electric characteristics of transistors can be avoided and the problem of the pad etching can be eliminated.

In a preferred embodiment of the method of forming the insulating layer according to the invention, TEOS gas, TMP (tri methyl phosphate) gas, TMB (tri methyl borate) gas and ozone gas are supplied into a reaction vessel in which a silicon wafer is placed. In this case nitrogen gas may be used as a carrier gas. The reaction vessel is maintained at atmospheric pressure (760 Torr) and the silicon wafer is heated at a temperature of 350.degree..about.450.degree. C. The above-mentioned gases are supplied into the reaction vessel at the following preferable flow rates under the following conditions.

Further, the plasma-CVD silicon nitride film can be advantageously formed under the following conditions, while the silicon wafer is placed in a plasma-CVD reactor.

After necessary regions have been formed in a silicon substrate, an aluminum film having a thickness of 1 .mu.m was formed on a main surface of the silicon substrate, and then the aluminum film was selectively etched to form a desired wiring pattern. Next, a BPSG film having a thickness of about 6000 .ANG. was formed on the wiring pattern by chemical vapor deposition under the following conditions.

Then, a plasma-CVD silicon nitride film having a thickness of about 4000 .ANG. was formed on the BPSG film under the following conditions.

As a comparative example, an insulating layer was formed by an atmospheric pressure-CVD PSG film having a thickness of 6000 .ANG. and a plasma-CVD film having a thickness of 4000 .ANG.. The plasma-CVD silicon nitride film was formed in the same manner as that of the plasma-CVD silicon nitride film of the above-mentioned example of the present invention. The PSG film was formed under the following conditions.

Next the anti-BHF etching property and the step coverage of the final insulating layers formed by the methods described in the above example and comparative example were measured. The anti-BHF etching property was measured by etching the insulating layers for five minutes with the aid of 10:1 BHF and then cross-sections were observed by means of SEM (scanning type electron microscope). The anti-BHF etching property was estimated by etching conditions of lower side wall portions of overhangs. The step coverage was estimated by observing the cross-sections and calculating inclined angles of the side wall portions of the insulating layers.

FIGS. 3 and 4 are cross-sections of the known insulating layers formed on an aluminum wiring pattern 21 and consisting of a PSG film 22 formed on the aluminum wiring pattern 21 and a plasma-CVD silicon nitride film 23 formed on the PSG film 22. As shown in FIG. 3, in the known insulating layer, at the lower side wall portions there are formed slits or cracks which extend up to the aluminum wiring pattern 21. Further, as depicted in FIG. 4, the side wall of the insulating layer extends substantially perpendicularly to the remaining portion. That is to say, the inclination angle of the side wall portion of the step is about 90 degrees. In the insulating layer according to the invention, the BPSG film 32 formed on an aluminum wiring pattern 31 has an excellent step coverage and a substantially flat surface. Therefore, the plasma-CVD silicon nitride film 33 also has a flat surface as shown in FIG. 5. The step coverage was estimated as an angle of a tangential line S which is drawn at a middle point P on the side wall of the final passivation layer, with respect to a plane which is in parallel with the surface of the silicon substrate. Point P was determined as a point which bisects a distance h between heights H1 and H2 (h.dbd.H1--H2). Height H1 is a distance from the surface of the underlaying insulating film to the upper surface of the plasma CDV silicon nitride film 33 at a portion above the aluminum wiring pattern 31. Height H2 is a distance from the surface of the underlaying insulating film to the upper surface of the plasma CVD silicon nitride film at a portion except for the aluminum wiring pattern. In the semiconductor device according to the invention, this angle is very small, such as about 30.degree..

In the above explained Example I, TEOS gas was used as the organic silane gas, but in the present example II HMDS (hexs methyl disiloxane) was used as the raw material gas. A BPSG film having a thickness of about 6000 .ANG. was first formed under the following conditions.

Then a silicon nitride film having a thickness of about 4000 .ANG. was formed by the plasma-CVD process under the same conditions as that of Example I. The thus formed final passivation film had an excellent gettering property as well as superior moisture resistance and waterproof properties.

According to the invention, when using HMDS as the organic silane to form the BPSG film, the atmospheric pressure CVD process is preferably performed under the following conditions.

As explained above in detail, according to the invention, it is possible to obtain an insulating layer having excellent step coverage, moisture resistance and waterproof properties without increasing the thickness of the insulating layer. Therefore, the insulating layer according to the invention comprising a BPSG film formed by chemical vapor deposition of the organic silane-O.sub.3 atmospheric pressure CVD and a plasma-CVD silicon nitride film is particularly suitable as the uppermost final insulating layer of the semiconductor device. Further, because the organic silane-O.sub.3 atmospheric pressure CVD BPSG film has an excellent step coverage at a low temperature, it is no longer necessary to perform the reflow process, and thus the wiring pattern is not subjected to the high temperature heating and can be protected against melting.

The present invention is not limited to the embodiments explained above, but many alternations and modifications may be conceived by those skilled in the art within the scope of the invention. For instance, in the above preferred embodiments, the BPSG film is formed by using TEOS and HMDS as the organic silane, but according to the invention other organic silanes, for instance OMCTS (octa methyl cyclo tetrasiloxine) may be utilized.