US 5,334,950 AGrant
Class-Ab Push-Pull Drive Circuit
Issue Date:1994-08-02
•8 Claims
•2 Drawing Sheets
Abstract
The gate of a first source-grounded transistor and the input of a buffer circuit are directly connected to an input terminal of a class-AB push-pull circuit. An input signal directly drives the first source-grounded transistor and is transmitted through the buffer circuit to a voltage-to-current converter and converted into a current signal. On receipt of the current signal, an inverting amplifier develops a voltage of reversed polarity which is applied to the gate of a second source-grounded transistor to drive the second transistor. The drains of the first and second transistors are connected to each other and their connecting point serves as an output terminal of the circuit. A class-AB push-pull drive circuit having such an arrangement requires a significantly reduced input signal voltage and a reduced power supply voltage.
Metadata
Assignee
- Mitsubishi Denki Kabushiki Kaisha
Inventor
- Masao Arimoto
Application Information
Application Number:US 018537&
Filing Date:1993-02-17
Priority Date:1992-03-13
Art Unit:255
Classifications
IPC:
H03F 318
Field of Search:
330264;269;263;288;277;262
Patent Drawings (2 sheets)
Description
Background of the Invention
1. Field of the Invention
The present invention relates to a class-AB push-pull drive circuit operable with a decreased input voltage as with a low power supply voltage.
2. Description of the Background Art
FIG. 2 is a circuit diagram of a conventional class-AB push-pull drive circuit disclosed in Japanese Patent Application No. 2-189908 by the applicant of the present application. The class-AB push-pull drive circuit of FIG. 2 comprises a buffer circuit 10, a voltage-to-current converter 20, and an inverting amplifier (or a current-to-voltage converter) 30.
The buffer circuit 10 includes an N-channel MOS transistor Q.sub.3, a P-channel MOS transistor Q.sub.4, and constant current sources I.sub.1, I.sub.4. The gate of the transistor Q.sub.3 is connected to an input terminal 1; the source thereof is connected to the source of the transistor Q.sub.4 and is grounded through the constant current source I.sub.4 ; and the drain thereof is connected to a power supply terminal 100 for supplying a power supply voltage V.sub.cc. The gate and drain of the transistor Q.sub.4 are connected in common and are connected to the gate of the N-channel MOS transistor Q.sub.1 serving as a first source-grounded transistor and are grounded through the constant current source I.sub.1.
The voltage-to-current converter 20 includes N-channel MOS transistors Q.sub.5, Q.sub.8, and resistors R.sub.1, R.sub.3, R.sub.4. The gate of the transistor Q.sub.8 is connected to the drain thereof and to the gate of the transistor Q.sub.5. The connecting point is connected to the source of the transistor Q.sub.3 in the buffer circuit 10 through the resistor R.sub.1 . The source of the transistor Q.sub.8 is grounded through the resistor R.sub.3, and the source of the transistor Q.sub.5 is grounded through the resistor R.sub.4.
The inverting amplifier (current-to-voltage converter) 30 includes P-channel MOS transistors Q.sub.6, Q.sub.7, a constant current source I.sub.2, and a resistor R.sub.2. The source of the transistor Q.sub.6 is connected to the power supply terminal 100, and the drain thereof is connected to the gate of the P-channel MOS transistor Q.sub.2 serving as a second source-grounded transistor and to one end of the resistor R.sub.2. The other end of the resistor R.sub.2 is connected to the gate of the transistor Q.sub.7 and to the drain of the transistor Q.sub.5 in the voltage-to-current converter 20 and is also grounded through a constant current source I.sub.3. The source of the transistor Q.sub.7 is connected to the gate of the transistor Q.sub.6 and is connected to the power supply terminal 100 through the constant current source I.sub.2, and the drain thereof is grounded.
The drain of a transistor Q.sub.1 is connected to an output terminal 2, and the source thereof is grounded. The drain of a transistor Q.sub.2 is connected to the output terminal 2, and the source thereof is connected to the power supply terminal 100.
As output-side drive transistors in the class-AB push-pull drive circuit, the P-channel transistor Q.sub.2 serving as the second source-grounded transistor is provided between the output terminal 2 and the power supply terminal 100, and the N-channel transistor Q.sub.1 serving as the first source-grounded transistor is provided between the output terminal 2 and the ground. The buffer circuit 10, the voltage-to-current converter 20 and the inverting amplifier (current-to- converter) 30 are provided so that a potential difference between the bases of the transistors Q.sub.1 and Q.sub.2 is always held constant independently of the input voltage of the input terminal 1. The buffer circuit 10 converts a high-impedance input signal into a low-impedance signal and applies a voltage in accordance with the input voltage of the input terminal 1 to the gate of the transistor Q.sub.1. The voltage-to-current converter 20 produces a current in accordance with the input voltage. The inverting amplifier (current-to-voltage converter) 30 converts the current again into a voltage which, when the input voltage is raised (or drops) and then a gate-source voltage V.sub.GS1 increases (or decreases), accordingly causing a source-gate voltage V.sub.SG2 of the transistor Q.sub.2 to decrease (or increase). This permits the voltage sum (V.sub.GS1 +V.sub.SG2) to be always held constant, so that the potential difference between the gates of the transistors Q.sub.1 and Q.sub.2 (i.e., V.sub.CC -(V.sub.GS1 +V.sub.SG2)) is also always held constant.
With respect to a source voltage V.sub.S3 of the transistor Q.sub.3 in the buffer circuit 10 of the class-AB push-pull drive circuit, a source-gate voltage of the transistors Q.sub.4 in the buffer circuit 10 is designated as V.sub.SG4 ; the gate-source voltage of the transistor Q.sub.1 for output drive is designated as V.sub.GS1 ; a gate-source voltage of the transistor Q.sub.8 in the voltage-to-current converter 20 is designated as V.sub.GS8 ; and a drain-source current thereof is designated as I.sub.DS8. Then the following relations hold.
where R.sub.1, R.sub.3 are resistances of the resistors R.sub.1, R.sub.3 in the voltage-to-current converter 20, respectively.
From Expressions (1) and (2), the drain-source current I.sub.DS8 of the transistor Q.sub.8 is given as: ##EQU1## It is assumed that the transistors Q.sub.5 and Q.sub.8 in the voltage-to-current converter 20 provide a current mirror having a 1:1 mirror ratio. A drain current of the transistor Q.sub.5 is designated as I.sub.D5. Then the following relation holds.
The source-gate voltage of the transistor Q.sub.2 for output drive is designated as V.sub.SG2 ; a source-gate voltage of the transistor Q.sub.6 in the inverting amplifier 30 is designated as V.sub.SG6 ; a drain current thereof is designated as I.sub.D6 ; and a source-gate voltage of the transistor Q.sub.7 in the inverting amplifier 30 is designated as V.sub.SG7. Then the following relation holds.
where R.sub.2 is a resistance of the resistor R.sub.2 in the inverting amplifier 30.
A constant bias current from the constant current source I.sub.3 is designated as I.sub.B3. The drain current I.sub.D6 is expressed as:
Therefore ##EQU2##
A drain current of the transistor Q.sub.1 is designated as I.sub.D1 ; a constant determined by the configuration of the transistor Q.sub.1 is designated as .beta..sub.1 ; a drain current of the transistor Q.sub.2 is designated as I.sub.D2 ; a constant determined by the configuration of the transistor Q.sub.2 is designated as .beta..sub.2 ; a constant determined by the configuration of the transistor Q.sub.4 is designated as .beta..sub.4 ; a constant determined by the configuration of the transistor Q.sub.6 is designated as .beta..sub.6 ; a constant determined by the configuration of the transistor Q.sub.7 is designated as .beta..sub.7 ; and a constant determined by the configuration of the transistor Q.sub.8 is designated as .beta..sub.8. A threshold voltage of the N-channel MOS transistors is designated as V.sub.THON ; and a threshold voltage of the P-channel MOS transistors is designates as V.sub.THOP. Since the source-drain currents of the transistors Q.sub.4 and Q.sub.7 are respectively equal to the constant bias currents I.sub.B1 and I.sub.B2 given from the constant current sources I.sub.1 and I.sub.2, the following relationships hold. ##EQU3##
Expressions (8) to (13) are respectively transformed into: ##EQU4##
Substitution of Expression (6) into Expression (17) gives: ##EQU5##
Substitution of Expression (4) into Expression (20) gives: ##EQU6##
Substitution of Expressions (14) to (16), (18), (19), (21) into Expression (7) gives: ##EQU7##
Setting R.sub.1 +R.sub.3 =R.sub.2 for the purpose of simplification, the following relation holds. ##EQU8## Since I.sub.B1, I.sub.B2, I.sub.B3 are constant currents, the value on the right side of Expression (24) is approximately constant when variation of I.sub.DS8 is small. Accordingly ##EQU9##
Inserting R.sub.1 +R.sub.3 =R.sub.2 in Expression (7) for the purpose of simplification, Expression (7) is transformed into:
Since I.sub.B1 and I.sub.B2 are the constant currents, V.sub.SG4 and V.sub.SG7 are constant from Expressions (16) and (18). If the variation of I.sub.DS8 is small as above described, V.sub.GS8 and V.sub.SG6 are also approximately constant from Expressions (19) and (20). Suitable setting of R.sub.2 and I.sub.B3 permits the value (V.sub.GS1 +V.sub.SG2) to be always held constant. The potential difference between the gates of the transistors Q.sub.1 and Q.sub.2, which is equal to V.sub.CC -(V.sub.GS1 +V.sub.SG2), is always held constant by keeping the sum (V.sub.GS1 +V.sub.SG2) constant.
A current flowing between the drains of the transistors Q.sub.2 and Q.sub.1 when there is no load current flow in the output terminal 2 is referred to as an idle current I.sub.idle expressed as:
From Expression (24) is derived: ##EQU10## The idle current is minimized by increasing R.sub.2 and I.sub.B3 as shown by Expression (28).
When a load is connected to the output terminal 2 and an outflow current I.sub.source is present, the source-gate voltage V.sub.SG2 of the transistor Q.sub.2 increases. Since the potential difference between the gates of the transistors Q.sub.1 and Q.sub.2 is then approximately constant as described with reference to Expression (26), the gate-source voltage V.sub.GS1 of the transistor Q.sub.1 decreases and the drain current I.sub.D1 of the transistor Q.sub.1 accordingly decreases.
In this state, if a source-drain voltage of the transistor Q.sub.2 is designated as V.sub.SD2, a maximum voltage V.sub.2max of the output terminal 2 is given as:
Since the source-drain voltage V.sub.SD2 of the transistor Q.sub.2 is permitted to be sufficiently low (for example, 0.2 V or less), a high voltage approximately equal to the power supply voltage V.sub.CC is output.
Conversely, when a load is connected to the output terminal 2 and an inflow current I.sub.sink is present, the gate-source voltage V.sub.GS1 of the transistor Q.sub.1 increases. Since the potential difference between the gates of the transistors Q.sub.1 and Q.sub.2 is approximately constant as described with reference to Expression (26), the source-gate voltage V.sub.SG2 of the transistor Q.sub.2 decreases and the drain current I.sub.D2 of the transistor Q.sub.2 accordingly decreases.
In this state, if a drain-source voltage of the transistor Q.sub.1 is designated as V.sub.DS1, a minimum voltage V.sub.2min of the output terminal 2 is given as:
Since the drain-source voltage V.sub.DS1 of the transistor Q.sub.1 is permitted to be sufficiently low (for example, 0.2 V or less), a low voltage approximate to the ground potential is output.
The operating voltage of the class-AB push-pull drive circuit of FIG. 2 will be described below. The respective transistors operate within a saturation region. Thus
where ##EQU11## where V.sub.GS5 is a gate-source voltage of the transistor Q.sub.5, V.sub.DS5 is a drain-source voltage thereof, and .beta..sub.5 is a constant determined by the configuration of the transistor Q.sub.5.
If a gate-source voltage of the transistor Q.sub.3 is designated as V.sub.GS3, an input voltage V.sub.1 is expressed as:
Since the transistors Q.sub.1, Q.sub.3, Q.sub.4 operate in the saturation region, the following relations hold. ##EQU12## Substitution of Expressions (41), (42), (43) into Expression (40) gives: ##EQU13##
A drain current I.sub.D3 of the transistor Q.sub.3 is separated into constant currents I.sub.B1, I.sub.B4 and a drain-source current I.sub.D8 of the transistor Q.sub.8 as expressed by:
Expression (44) is transformed into: ##EQU14##
As the input voltage V.sub.1 is decreased, the currents I.sub.D1 and I.sub.DS8 decrease. As a result, a voltage across the resistor R.sub.2 decreases, so that the source-gate voltage V.sub.SG2 of the transistor Q.sub.2 and, accordingly, the drain current I.sub.D2 thereof increase. Conversely, as the input voltage V.sub.1 is increased, the currents I.sub.D1 and I.sub.DS8 increase. As a result, the voltage across the resistor R.sub.2 increases, so that the source-gate voltage V.sub.SG2 of the transistor Q.sub.2 and, accordingly, the drain current I.sub.D2 thereof decrease.
In the conventional class-AB push-pull drive circuit having such arrangement, the operating power supply voltage V.sub.CC is calculated from Expression (31). Variable terms on the right side of Expression (31) are I.sub.DS8 .multidot.R.sub.1, V.sub.DS5, and I.sub.D6 .multidot.R.sub.2. By setting the variable terms small, the operating power supply voltage V.sub.CC is considerably decreased. The input voltage V.sub.1 required to drive the first and second source-grounded transistors Q.sub.1 and Q.sub.2 as output transistors must be at some minimum levels since it is necessary for the input voltage V.sub.1 to operate the transistors Q.sub.3 and Q.sub.4 forming the buffer circuit 10 and the first source-grounded transistor Q.sub.1 within the saturation region. When the power supply voltage V.sub.CC is decreased approximately to the threshold level of Expression (31), the required minimum input voltage sometimes reaches or exceeds the power supply voltage. In such cases, the output voltage is fixed to a certain voltage level, so that the linear relationship between the input and output is broken. The conventional class-AB push-pull drive circuit has been disadvantageous in that it is not practical decrease the power supply voltage V.sub.CC significantly.
Summary of the Invention
According to the present invention, a class-AB push-pull drive circuit comprises: first and second power supply terminals for supplying first and second different power supply potentials, respectively; input and output terminals receiving input signals and producing output signals, respectively; a first transistor having a first electrode connected to the output terminal, a second electrode connected to the first power supply terminal, and a control electrode directly connected to the input terminal and receiving the input signal, conduction of the first transistor being controlled in accordance with a potential difference between the control and second electrodes, a second transistor of a polarity opposite to that of the first transistor having a first electrode connected to the output terminal, a second electrode connected to the second power supply terminal, and a control electrode, conduction of the second transistor being controlled in accordance with a potential difference between the control and second electrodes of the second transistor; a voltage-to-current converter coupled to the input terminal and having an output terminal for generating a current in accordance with the voltage of the input signal; and an inverting amplifier connected between the output terminal of the voltage-to-current converter and the control electrode of the second transistor for converting the current generated by the voltage-to-current converter into a voltage opposite in polarity to the current and applied to the control electrode of the second transistor.
The voltage input to the input terminal, which is required to operate the first transistor within the saturation region, has a small level since the gate of the first transistor is directly connected to the input terminal. The small voltage enables the second transistor to operate within the saturation region through the voltage-to-current converter and the inverting amplifier.
In the present invention, the control electrode of the first transistor is directly connected to the input terminal, and the control electrode of the second transistor is connected to the input terminal through the current-to-voltage converter and the inverting amplifier. This permits the input voltage to be decreased to a threshold voltage on which the first transistor is operable within the saturation region. Thus, operation with a low power supply voltage is achieved. Thus the output voltage widely ranges approximately from the ground voltage to the power supply voltage. Furthermore, the number of devices are reduced.
An object of the present invention is to provide a class-AB push-pull drive circuit operable with a decreased input voltage and with a low power supply voltage.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
Brief Description of the Drawings
FIG. 1 is a circuit diagram of a class-AB push-pull drive circuit embodying the present invention; and
FIG. 2 is a circuit diagram of a conventional class-AB push-pull drive circuit.
Description of the Preferred Embodiments
FIG. 1 is a circuit diagram of a class-AB push-pull drive circuit of a preferred embodiment according to the present invention. The circuit of this preferred embodiment is different from the conventional circuit of FIG. 2 in that the gate-source voltage of the first source-grounded transistor Q.sub.1 is not applied through the buffer circuit 10 but is applied directly from the input terminal 1 so that the buffer circuit 10 only drives the second source-grounded transistor Q.sub.2.
Specifically, the gate of the transistor Q.sub.1 is directly connected to the input terminal 1. The buffer circuit 10 includes a P-channel MOS transistor Q.sub.31 and a constant current source I.sub.11. The gate of the transistor Q.sub.31 is connected to the input terminal; the source thereof is connected to the power supply terminal 100 through the constant current source I.sub.11 and to one end of the resistor R.sub.1 in the voltage-to-current converter 20; and the drain thereof is grounded. The other arrangements of the circuit of FIG. 1 are identical with those of the conventional circuit of FIG. 2.
In the operation in the circuit of FIG. 1 the potential difference between the gates of the transistors Q.sub.1 and Q.sub.2 (i.e., V.sub.CC -(V.sub.GS1 +V.sub.SG2)) is always constant and is the same as that in the conventional circuit of FIG. 2.
With respect to a source voltage V.sub.S31 of the transistor Q.sub.31 in the buffer circuit 10 of the circuit of FIG. 1, the gate-source voltage of the transistor Q.sub.8 is designated as V.sub.GS8, and the drain-source current thereof is designated as I.sub.DS8. Then
The input voltage V.sub.1 to the input terminal 1 is equal to the gate-source voltage V.sub.GS1 of the first source-grounded transistor Q.sub.1 as expressed by:
Using a source-gate voltage V.sub.SG31 of the transistor Q.sub.31, the following relation holds.
From Expressions (47) to (49), the drain-source current I.sub.DSS of the transistor Q.sub.8 is expressed as: ##EQU15## The transistors Q.sub.5 and Q.sub.8 provide a current mirror having a 1:1 mirror ratio. The drain current I.sub.D5 of the transistor Q.sub.5 is accordingly expressed as:
For the second source-grounded transistor Q.sub.2, Expressions (5) and (6) hold as described with reference to the conventional circuit of FIG. 2. Therefore ##EQU16##
A drain current of the transistor Q.sub.31 is designated as I.sub.D31, and a constant determined by the configuration of the transistor Q.sub.31 is designated as .beta..sub.31. Then ##EQU17## From Expression (53) is derived: ##EQU18##
Substitution of Expressions (14), (15), (18), (19), (21), (54) into Expression (52) gives the following Expression (55) (FIG. 1) in corresponding relation to Expression (22) (FIG. 2). ##EQU19## Setting R.sub.1 +R.sub.3 =R.sub.2 for the purpose of simplification, the following relation holds in corresponding relation to Expression (23). ##EQU20## The expression corresponding to Expression (24) is: ##EQU21## Since I.sub.B1, I.sub.B2, I.sub.B3 are constant currents, the value on the right side of Expression (57) is approximately constant when variations of I.sub.DS8, I.sub.D31 are small. Accordingly ##EQU22##
Inserting R.sub.1 +R.sub.3 =R.sub.2 in Expression (52) for the purpose of simplification, Expression (52) is transformed into:
Since I.sub.B2 is the constant current, it is apparent from Expression (18) that V.sub.SG7 is constant. It is also apparent from Expressions (19), (21), (54) that V.sub.GS8, V.sub.SG6, V.sub.SG31 are approximately constant when the variations of I.sub.DS8, I.sub.D31 are small as above described. Suitable setting of R.sub.2, I.sub.B3 permits the value (V.sub.GS1 +V.sub.SG2) to be always held constant. The potential difference between the gates of the transistors Q.sub.1 and Q.sub.2, which is equal to V.sub.CC -(V.sub.GS1 +V.sub.SG2), is always held constant by holding the value (V.sub.GS1 +V.sub.SG2) constant.
When there is no load current flow in the output terminal 2, Expression (57) is expressed from Expression (27) as: ##EQU23## It is apparent from Expression (60) that the idle current I.sub.idle flowing between the drains of the transistors Q.sub.1 and Q.sub.2 is minimized by increasing R.sub.2 and I.sub.B3.
The maximum and minimum output voltages V.sub.2 to be outputted to the output terminal 2 are calculated from Expressions (29) and (30), respectively. The voltage outputted from the output terminal 2 ranges approximately from a voltage adjacent the ground potential to the power supply voltage V.sub.CC in the same fashion as the conventional circuit of FIG. 2.
The operation voltage will now be discussed hereinafter. The respective transistors operate within the saturation region. The following expression holds in corresponding relation to Expression (31) (FIG. 2):
where ##EQU24##
In the class-AB push-pull drive circuit of FIG. 1, the operating power supply voltage V.sub.CC is calculated from Expression (61). Variable terms on the right side of Expression (61) are I.sub.DS8 .multidot.R.sub.1, I.sub.D6 .multidot.R.sub.2 and V.sub.SG31. The operating power supply voltage V.sub.CC is considerably decreased by setting the variable terms small.
It is necessary that the input voltage V.sub.1 satisfies the following expression in corresponding relation to Expression (40) (FIG. 2) from Expression (48). ##EQU25## It is also necessary that the following expression holds in corresponding relation to Expression (46) (FIG. 2) from Expression (50). ##EQU26##
The input voltage V.sub.1 should be adapted to fall in a range that permits the transistors Q.sub.1 and Q.sub.31 to operate within the saturation region (which satisfies Expressions (70) and (71), respectively). Adjustment of the terms I.sub.DS8 (R.sub.1 +R.sub.3) of Expression (71) enables the level of the input voltage V.sub.1 given by Expression (70) to be minimized. This minimum level may be made much lower than the minimum level of the input voltage V.sub.1 required in the conventional circuit of FIG. 2.
While the invention has been shown and described in detail, the foregoing description is in all aspects illustrative and not restrictive. It is therefore understood that numerous modifications and variations can be devised without departing from the scope of the invention.
Claims
I claim:
1. A class-AB push-pull circuit comprising: first and second power supply terminals for supplying first and second power supply potentials, respectively; input and output terminals for receiving an input signal voltage and outputting an output signal, respectively; a first transistor having a polarity, a first electrode connected to said output terminal, a second electrode connected to said first power supply terminal, and a control electrode directly connected to said input terminal for receiving the input signal voltage, conduction of said first transistor being controlled in accordance with a potential difference between said control and second electrodes of said first transistor; a second transistor having a polarity opposite to the polarity of said first transistor, a first electrode connected to said output terminal, a second electrode connected to said second power supply terminal, and a control electrode, conduction of said second transistor being controlled in accordance with a potential difference between said control and second electrodes of said second transistor; a voltage-to-current converter having an output terminal and coupled to said input terminal for generating a current in response to the input signal voltage; an inverting amplifier connected between said output terminal of said voltage-to-current converter and said control electrode of said second transistor for converting the current generated by said voltage-to-current converter into an inverted voltage opposite in polarity to the current and applying the inverted voltage to said control electrode of said second transistor; and a buffer circuit connected between said input terminal and said voltage-to-current converter for buffering the input signal voltage and supplying a buffered input signal voltage to said voltage-to-current converter.
2. The class-AB push-pull drive circuit of claim 1, wherein said buffer circuit comprises a constant current source and a third transistor having a first electrode connected to said second power supply terminal through said constant current source and to said voltage-to-current converter, a second electrode connected to said first power supply terminal, and a control electrode connected to said input terminal.
3. A class-AB push-pull drive circuit comprising: first and second power supply terminals for supplying first and second power supply potentials, respectively; input and output terminals for receiving an input signal voltage and outputting an output signal, respectively; a first transistor having a polarity, a first electrode connected to said output terminal, a second electrode connected to said first power supply terminal, and a control electrode directly connected to said input terminal for receiving the input signal voltage, conduction of said first transistor being controlled in accordance with a potential difference between said control and second electrodes of said first transistor; a second transistor having a polarity opposite to the polarity of said first transistor, a first electrode connected to said output terminal, a second electrode connected to said second power supply terminal, and a control electrode, conduction of said second transistor being controlled in accordance with a potential difference between said control and second electrodes of said second transistor; a voltage-to-current converter having an output terminal and coupled to said input terminal for generating a current in response to the input signal voltage; and an inverting amplifier connected between said output terminal of said voltage-to-current converter and said control electrode of said second transistor for converting the current generated by said voltage-to-current converter into an inverted voltage opposite in polarity to the current and applying the inverted voltage to said control electrode of said second transistor wherein said voltage-to-current converter comprises a resistor and a third transistor having a first electrode connected to said inverting amplifier, a second electrode connected to said first power supply terminal through said resistor, and a control electrode coupled to said input terminal.
4. A class-AB push-pull drive circuit comprising: first and second power supply terminals for supplying first and second power supply potentials, respectively; input and output terminals for receiving an input signal voltage and outputting an output signal, respectively; a first transistor having a polarity, a first electrode connected to said output terminal, a second electrode connected to said first power supply terminal, and a control electrode directly connected to said input terminal for receiving the input signal voltage, conduction of said first transistor being controlled in accordance with a potential difference between said control and second electrodes of said first transistor; a second transistor having a polarity opposite to the polarity of said first transistor, a first electrode connected to said output terminal, a second electrode connected to said second power supply terminal, and a control electrode, conduction of said second transistor being controlled in accordance with a potential difference between said control and second electrodes of said second transistor; a voltage-to-current converter having an output terminal and coupled to said input terminal for generating a current in response to the input signal voltage; and an inverting amplifier connected between said output terminal of said voltage-to-current converter and said control electrode of said second transistor for converting the current generated by said voltage-to-current converter into an inverted voltage opposite in polarity to the current and applying the inverted voltage to said control electrode of said second transistor wherein said voltage-to-current converter comprises a first resistor, a third transistor having a first electrode coupled to said input terminal through said first resistor, a second electrode coupled to said first power supply terminal, and a control electrode connected to said first electrode of said third transistor, and a fourth transistor having a first electrode connected to said inverting amplifier, a second electrode coupled to said first power supply terminal, and a control electrode connected to said control electrode of said third transistor.
5. The class-AB push-pull drive circuit of claim 4, wherein said voltage-to-current converter comprises a second resistor connected between said second electrode of said transistor and said first power supply terminal and a third resistor connected between said second electrode of said fourth transistor and said first power supply terminal.
6. A class-AB push-pull drive circuit comprising: first and second power supply terminals for supplying first and second power supply potentials, respectively; input and output terminals for receiving an input signal voltage and outputting an output signal, respectively; a first transistor having a polarity, a first electrode connected to said output terminal, a second electrode connected to said first power supply terminal, and a control electrode directly connected to said input terminal for receiving the input signal voltage, conduction of said first transistor being controlled in accordance with a potential difference between said control and second electrodes of said first transistor; a second transistor having a polarity opposite to the polarity of said first transistor, a first electrode connected to said output terminal, a second electrode connected to said second power supply terminal, and a control electrode, conduction of said second transistor being controlled in accordance with a potential difference between said control and second electrodes of said second transistor; a voltage-to-current converter having an output terminal and coupled to said input terminal for generating a current in response to the input signal voltage; and an inverting amplifier connected between said output terminal of said voltage-to-current converter and said control electrode of said second transistor for converting the current generated by said voltage-to-current converter into an inverted voltage opposite in polarity to the current and applying the inverted voltage to said control electrode of said second transistor wherein said inverting amplifier comprises a resistor, a third transistor having a first electrode connected to said voltage-to-current converter through said resistor, a second electrode connected to said second power supply terminal, and a control electrode, and a fourth transistor having a first electrode connected to said first power supply terminal, a second electrode connected to said control electrode of said third resistor, and a control electrode connected to said voltage-to-current converter.
7. The class-AB push-pull drive circuit of claim 6, wherein said inverting amplifier comprises a just constant current source connected between said control electrode of said third transistor and said second power supply terminal.
8. The class-AB push-pull drive circuit of claim 7, comprising a second constant current source connected between said control electrode of said fourth transistor and said first power supply terminal.