Field Emission Device Having a Central Anode

This invention relates generally to cold-cathode field emission devices and in particular to cold-cathode field emission devices employing non-conical emitting edges, and is more particularly directed toward devices having a central anode of conductive or semi-conductive material, an annular emitting edge, and annular gate extraction electrodes.

Cold-cathode field emission devices (FEDs) are known in the art. These FEDs employ an electric field in concert with a geometric discontinuity of small radius of curvature to reduce the potential barrier and provide for increased electron tunneling from the surface of the emitter electrode. In many practical devices, the electric field is realized by supplying a voltage between the electron emitters and a gate extraction electrode. These prior art FEDs may be formed by a variety of methods, all of which yield structures with the primary purpose of emitting electrons from an emitter electrode.

In some prior art embodiments, the emitted electrons are collected by an anode that resides on a supporting structure. The anode supporting structure is generally made of insulating material and resides on the structure in which emitter electrodes and gate extraction electrodes have been formed. In other prior art embodiments, an anode may be disposed substantially co-planar with an electron emitting tip.

Although these prior art FEDs are functional, they suffer from a number of shortcomings. First, anode placement in those embodiments employing non-coplanar anodes is difficult to realize; non-coplanar FEDs require complex fabrication methods. In addition, for structures employing co-planar anode electrodes, electron emission is effected from individual sharp tips that do not maximally benefit from electric field enhancing effects. Accordingly, a need arises for an improved FED that does not suffer from these deficiencies.

The above-described need is satisfied through the FED structure disclosed herein. Pursuant to this invention, a central anode of conductive or semiconductive material provides a foundation for construction of the device, which also includes an annular emitting edge, and annular gate extraction electrodes.

In one embodiment, a series of selective etch and oxide growth/deposition steps is employed during the formation process to yield a device with an annular emitter electrode and annular gate extraction electrodes, each electrically isolated from and concentrically located with respect to a central anode electrode. This structure does not require the complex deposition processes of the prior art, nor does it suffer from prior art electron emission restrictions.

According to the invention, a field emission device is provided comprising a substrate and a central anode extending from a first surface of the substrate. A first gate extraction electrode is disposed on at least a part of the first surface of the substrate and further disposed substantially annularly and concentrically about at least a portion of the central anode.

A first insulator layer is disposed on at least a part of the first surface of the substrate and further disposed substantially annularly and concentrically about at least a portion of the central anode. A conductive emitter electrode is disposed on at least a part of the first insulator layer and further disposed substantially annularly and concentrically about at least a portion of the central anode.

A second insulator layer is disposed on at least a part of a surface of the conductive emitter electrode and further disposed substantially annularly and concentrically about at least a portion of the central anode. A second gate extraction electrode layer is disposed on at least a part of a surface of the second insulator layer and further disposed substantially annularly and concentrically about at least a portion of the central anode.

In still other embodiments of the invention, additional conductive layers may be employed forming tetrode or pentode structures where suitable potentials may be applied to the subsequent electrodes to yield desired operation.

FIG. 1 is a side elevational cutaway view of an FED structure, including an emitter electrode, gate extraction electrodes, and central anode electrode;

FIG. 2 is a side elevational cutaway view of an FED structure, including a preferentially formed emitter electrode, gate extraction electrodes, and central anode electrode;

FIG. 3 is a top plan view of an FED formed with a central anode;

FIG. 4 is a top elevational view of an array of central anodes surrounded by a common emitter conductor located annularly about each anode;

FIG. 5 is a side elevational view of FED electrodes; and

FIG. 6, is a side elevational view, similar to FIG. 5, of another embodiment of FED electrodes.

FIG. 1 depicts a substrate (101) that has disposed on a surface a first insulator layer (102), a first gate extraction electrode layer (107), and an anode electrode layer (104). A second insulator layer (103) is shown disposed on a surface of the first insulator layer (102) and at least part of a surface of the first gate extraction electrode (107). An emitter electrode (105) is disposed on a surface of the second insulator layer (103). A third insulator layer (108) is disposed on a surface of the emitter electrode (105), and a second gate extraction electrode (106) is disposed on a part of a surface of the third insulator layer (108). In this embodiment, the first and second gate extraction electrodes (107 and 106) are symmetrically disposed about the annular electron emitting edge of the emitter electrode (105). So disposed, the first and second gate extraction electrodes (107 and 106) will provide for maximal electric field enhancement at the electron emitting edge of the emitter electrode (105). The first gate extraction electrode (107) and second gate extraction electrode (106) are generally operated at the same voltage in order that the gradient of the electric field at the emitting edge of the emitter electrode (105) be directed parallel to the plane of the emitter electrode (105). However, independent operation of the first and second gate extraction electrodes (107 and 106) will permit the emitted electron beam to be directed other than substantially parallel to the plane of the emitter electrode (105). The anode (104), which is designed to collect electrons emitted from the emitter electrode (105), is shown as extending from the substrate (101) to a height which will provide for effective collection of emitted electrons and may be lower in extent for structures wherein the anode (104) is realized with a larger diameter. Further, the anode (104) may be formed by many known methods, including, but not limited to, evaporative deposition and preferential etching of a semiconductor substrate material.

The first and second gate extraction electrodes (107 and 106) may be realized by depositing a pattern or layer of metallic material or doped semiconductor material. The first and second insulator layers (102 and 103) may, alternatively, be realized as a single insulator deposition or oxide growth. The emitter electrode and anode may each be realized independently by depositing a layer or pattern of metallic material or doped semiconductor material. So formed, the structure will operate as an FED wherein the anode (105) is centrally disposed with respect to an electron emitting annular edge.

FIG. 2 shows an alternative embodiment FED wherein the first gate extraction electrode (107) is disposed on the first insulator layer (102). Further, FIG. 2 depicts the emitter electrode (105) having a sharpened emitting edge. Sharpening of the emitting edge of the emitter electrode (105) provides a geometric discontinuity of reduced radius of curvature which will effectively reduce the voltage required between the emitter electrode (105) and first and second gate extraction electrodes (107 and 106) for suitable operation of the FED.

FIG. 3 is a top plan view of an FED of the present invention, constructed as described previously with reference to FIGS. 1 and 2. The FED shown provides for the second gate extraction electrode (106) to be formed as an annular ring disposed substantially symmetrically and peripherally about the central anode. A conductor stripe (301) is disposed on the third insulator layer (108) and operably coupled to the second gate extraction electrode (106). Similarly, the first gate extraction electrode and emitter electrode may be selectively patterned and operably coupled to respective associated conductor stripes, although these details are not shown in the figure for the sake of clarity.

FIG. 4 depicts an array of FEDs, constructed as described above with the reference to FIG. 3. The individual FEDs of the array are operably interconnected such that the individual FEDs of the array may be operated as groups of FEDs. For the embodiment shown, the individual second gate extraction electrodes (106) are interconnected by a plurality of conductive stripes (301) in a manner which forms rows of interconnected second gate extraction electrodes (106). The first gate extraction electrodes, not shown in the figure, may be similarly interconnected to form rows of operably coupled first gate extraction electrodes. The emitter electrodes (also not shown) may be selectively interconnected in a preferred group to form rows or columns of interconnected emitter electrodes. The central anodes (not shown) may also be interconnected to yield an electronic device comprised of an array of FEDs wherein the plurality of anodes of the array are substantially operably coupled to each other or where select groups of anodes are operably coupled only to other anodes of the same group.

FIG. 5 is a side elevational cross-sectional view of the electrodes of an FED constructed in accordance with the invention. An electron beam (501) is shown that is a representation of a possible beam configuration which may be realized by constructing an FED with the depicted configuration.

It is immediately obvious that the inclusion of (110), in FIG. 6, additional electrodes or electrode pairs, such as tetrode or pentode structures, in the intervening anode-emitter electrode space, will yield a device with additional control mechanisms. These additional control mechanisms may include electron emission control or focusing.