Image Processing Apparatus

1. Field of the Invention

This invention relates to an image processing apparatus which performs pseudo-halftone processing of multivalue image data.

2. Description of the Related Art

An error diffusion method and an average density approximation method have been proposed as pseudo-halftone processing methods in an image processing apparatus, such as a facsimile apparatus, a digital copier or the like.

In the error diffusion method, as disclosed in "An Adaptive Algorithm for Spatial Gray Scale", SID 75 Digest, pp. 36-37, by R. Floyd and L. Steinberg, multivalue image data of a target picture element are binary-coded (converted into either the densest level or the lightest level), predetermined weighting processing is performed on the binarization error (the difference between the binary-coded level and the multivalue image data before the binary-coding processing), and the resultant weighted data are added to the data of picture elements near the target picture element.

In the average density approximation method, as described in Japanese Patent Application Public Disclosure (Kokai) No. 57-104369 (1982), each weighted average value of a target picture element and neighboring picture elements when the target picture element is binary-coded to black or white is obtained using already binary-coded data near the target picture element, and image data of the target picture element are binary-coded using the average of the two average values as the binarization threshold value.

Since the above-described error diffusion method is a method of correcting an error between input image data and output image data, it is possible to preserve the densities of the input image in the output image, and to provide an image having excellent resolution and gradation.

In the error diffusion method, however, a large amount of two-dimensional calculation must be performed when correcting for (distributing) the errors between input image data and output image data. Hence, this method has the disadvantage that the configuration of hardware becomes very complicated due to the large amount of processing required.

Since the average density approximation method performs calculation using binary data after binary-coding processing, it is possible to simplify the configuration of hardware, and to realize high-speed processing due to the extremely small amount of needed processing.

In the average density approximation method, however, binary-coding processing is performed while approximating a target picture element to an average value of a region including the target picture element. Hence, this method has the disadvantages that the number of gradation is limited, and that a peculiar low-frequency texture is produced for an image having a gentle density variation, degrading picture quality.

In order to remove the above-described disadvantages, the assignee of the present application has filed patent applications on inventions for correcting an error produced by binary-coding processing by the average density approximation method in CFO 6620US (application No. 476,766, filed Feb. 8, 1990), CFO 6621US (application No. 476,618, filed Feb. 7, 1990), CFO 6773US (application No. 514,616, filed Apr. 26, 1990), CFO 6774US (application No. 515,222, filed Apr. 27, 1990), CFO 7074US (application No. 587,217, filed Sep. 24, 1990), and CFO 7075US (application No. 587,858, filed Sep. 25, 1990).

In general, in a conventional method, when it is intended to obtain a reduced binary-coded image, some of the binary-coded data after binary-coding processing are removed, or a reading system controls data to be input in advance. Hence, the conventional method has the disadvantage that the hardware becomes complicated.

Furthermore, the conventional method has the disadvantages that fine lines disappear and that gradation deteriorates when reduction is performed by simple removal of some data.

Particularly, in the above-described average density approximation method, binary data after binary-coding processing are used also for the subsequent binary-coding processing. Hence, this method has the disadvantage that simple removal of some data in reduction influences even the subsequent binary-coding processing.

The method also has the disadvantages that when reduction is performed by simple removal of some data, fine lines might disappear and gradation might deteriorate. Such phenomena appear more pronouncedly as the reduction ratio is smaller.

The present invention has been made in order to solve the above-described problems.

It is an object of the present invention to provide an image processing apparatus which can obtain an image having excellent gradation and resolution in a short time with a simple configuration of hardware, and which can obtain an image not having deterioration of picture quality even in reduction.

It is a further object of the present invention to provide an image processing apparatus which can prevent deterioration of picture quality when removal processing of some data is performed, by reflecting multivalue data of a removed picture element upon multivalue data of adjacent picture elements.

It is a still further object of the present invention to provide an image processing apparatus which can obtain an image having high picture quality with a simple configuration by quantizing multivalue data subjected to partial removal processing based on an average density obtained using quantized data.

It is still another object of the present invention to provide an image processing apparatus wherein partial removal processing is varied between edge portions and non-edge portions of an image.

It is still a further object of the present invention to provide an image processing apparatus wherein partial removal processing is varied in accordance with a reduction ratio of an image.

The foregoing and other objects and features of the present invention will become more apparent from the following detailed description of the preferred embodiments taken in connection with the accompanying drawings.

FIGS. 1(1), 1(2) and 1(3) illustrate multivalue-image data, binary-coded-image data, and weighting-mask data for picture elements, respectively;

FIG. 2 illustrates an example of image data in a first embodiment of the present invention;

FIGS. 3(1) and 3(2) illustrate a principle of binary-coding processing in the first embodiment;

FIG. 4 is a block diagram showing the configuration of an image processing apparatus of the first embodiment;

FIG. 5 is a block diagram showing the details of the binary-coding circuit shown in FIG. 4;

FIGS. 6(1) and 6(2) illustrate the schematic operations of the removed-picture-element processing circuit shown in FIG. 5;

FIG. 7 illustrates the details of the removed-picture-element processing circuit of the first embodiment;

FIGS. 8(1) and 8(2) are operational timing charts of the removed-picture-element processing circuit of the first embodiment;

FIG. 9 illustrates the details of a removed-picture element processing circuit of a second embodiment of the present invention;

FIG. 10 is an operational timing chart of the removed-picture-element processing circuit of the second embodiment;

FIG. 11 is a block diagram showing the details of a binary-coding circuit of a third embodiment of the present invention; and

FIG. 12 illustrates the detail of a removed-picture-element processing circuit of the third embodiment.

The preferred embodiments of the present invention will now be explained in detail with reference to the drawings.

The principle of the present method will be first explained.

FIG. 1(1) illustrates multivalue image data of picture elements of an input image.

In FIG. 1(1), f(i, j) represents multivalue density data of an input picture element at the position of a target picture element to be binary-coded. Picture elements above the broken line have already been subjected to binary-coding processing. After binary-coding of the target picture element, the same binary-coding processing is sequentially performed for f(i+1, j), f(i+2, j), . . .

FIG. 1(2) illustrates binary-coded image data. In FIG. 1(2), B(i, j) represents the density (having a value of 0 or 1) of the target picture element after binary-coding processing. Data within the portion surrounded by the broken line are image data which have already been subjected to binary-coding processing before the target picture element is processed. These data are used in binary-coding processing of the target picture element.

FIG. 1(3) illustrates a weighting mask. In FIG. 1(3), the respective R's represent weighting-mask components for obtaining an average density, and constitutes a 5.times.3-size matrix. In this case, the weights for the picture elements not yet subjected to binary-coding processing are R(0, 0)=R(1, 0)=R(2, 0)=0.

In the present method, when it is intended to perform binary-coding processing of input multivalue data f(i, j) (0-63), a weighted average value m(i, j) is obtained from the binary data B(i, j) within the portion surrounded by the broken line shown in FIG. 1(2) and the previously-provided weighting-mask component R(x, y) shown in FIG. 1(3), and binary-coding processing is performed using the average value m(i, j) as a threshold value. The density is preserved by correcting adjacent input multivalue data to be subsequently binary-coded using a difference value, the value of the difference between the average value m(i, j) and the input multivalue data f(i, j). ##EQU1##

The above-described principle will now be more specifically explained according to the contents of FIG. 2.

As shown in the upper portion of FIG. 2, a weighting mask used in the present embodiment is set so that the sum of its components is 63 for the 12 picture elements near the target picture element which are in the mask. Accordingly, m(i, j) can be used as is for binary-coding processing as a threshold value for values between 0-63.

The threshold value m(i, j) for performing binary-coding processing of multivalue data "5", for example, of a target picture element shown in FIG. 2 can be obtained using binary data B(i, j) illustrated in the middle portion of FIG. 2 as

Hence, B(i, j) is binary-coded as "0", the binarization error is 5-21=-16, and E.sub.1 (i+j, j)=E.sub.2 (i, j+1)=-8. By diffusion of this error, f(i+1, j) is corrected from 10 to 10-8=2, and f(i, j+1) is corrected from 15 to 15-8=7.

FIGS. 3(1) and 3(2) illustrate expression (2) in diagrams.

In expression (2), E(i, j) is an error obtained by adding 1/2 of an error produced when a picture element (i-1,j) immediately preceding the target picture element (i, j) is binary-coded and 1/2 of an error produced when a picture element (i, j-1) on the immediately preceding line is binary-coded.

By binary-coding processing the corrected value obtained by adding the binary-coded error E(i, j) to the target picture element f(i, j), the average density over the entire input image is obtained. Hence, it is possible to preserve completely the image density after binary-coding processing.

By performing such processing which takes binary-coded errors into consideration, halftone-reproducing capability is greatly improved compared with the above-described average density approximation method.

In the foregoing explanation, E.sub.0 (i, j) represents an error produced when binary-coding processing is performed for the target picture element (i, j), and E.sub.1 (i+1, j) represents an error allocated to picture element f(i, j+1) immediately after the target picture element (i, j), E.sub.2 (i, j+1) represents an error allocated to picture element f(i, j+1) on the line immediately succeeding the target picture element (i, j).

In the present embodiment, it is assumed that:

where E.sub.0 (i, j) is an error to be distributed to adjacent picture elements, and

for other cases.

Accordingly, as indicated by the above-described expressions (3) and (4), in the comparison of the average density m at binary-coding processing with the corrected density of the target picture element, if the corrected density of the target picture element is within a predetermined range such that the density has a value close to the average density m (if the error between the average density m and the corrected density of the target picture element is within the predetermined range), the difference E.sub.0 between the corrected density of the target picture element and the average density is allocated as a correction value when the next picture element and a picture element on the immediately succeeding line are subjected to binary-coding processing according to expression (4) (E.sub.1 and E.sub.2). On the other hand, if the corrected density of the target picture element is out of the predetermined range, that is, if the error between the corrected density of the target picture element and the average density is sufficiently large, the next picture element and a picture element on the immediately succeeding line are not corrected at binary-coding processing, making the correction value 0. That is, error correction is performed if a change in the density of the image near the target picture element is small and the region near the target picture element can therefore be determined as a halftone image region. As a result, a gradual change in the density of the image can be faithfully subjected to pseudo-halftone processing by correcting for a difference with the average density produced by performing binary-coding processing in adjacent picture elements. That is, gradation can be improved. On the other hand, error correction is not performed if the density of the target picture element is determined to change abruptly from the densities of neighboring picture elements, as in edge portions in characters, line drawings or the like, the correction value for the neighboring picture elements is set to 0, and binary-coding processing is performed while suppressing a decrease in resolution caused by preserving the density. It is thereby possible to improve resolution at edge portions.

As described above, in the method of the present embodiment, processing is performed in accordance with a change in the density of the image. That is, the density of a halftone image region is preserved on a binary-coded image using binary-coded errors. The density of a high resolution image region, such as a character region or the like, is not subjected to correction using binary-coded errors in order to prevent a decrease in resolution of the image caused by preserving the density, but is approximated to the average density m.

FIG. 4 is a block diagram of an image processing apparatus according to the present embodiment. In FIG. 4., an input sensor unit A comprises a photoelectric conversion device, such as a CCD (charge-coupled device), and a driving unit for scanning the device, and performs reading scanning of an original. Image data of the original read by the input sensor unit A are sequentially transmitted to an A/D conversion unit B, which converts data of respective picture elements into 6-bit digital data, and so quantizes the data into data having 64 gradation levels. Subsequently, a correction circuit C performs digital calculation processing, such as shading correction for correcting uneven sensitivity of the CCD sensor and uneven illuminance due to an illuminating light source, or the like. Data after the correction processing are transmitted to a binary-coding circuit D. The binary-coding circuit D quantizes the input 6-bit multivalue image data into 1-bit (binary) data according to the above-described method. A printer E comprises a suitable printer, e.g., a laser-beam printer or an ink-jet printer, and reproduces the image of the original on recording paper by performing on-off control of dots in accordance with the binary data transmitted from the binary-coding circuit D.

FIG. 5 is a block diagram showing the details of the binary-coding circuit D shown in FIG. 4.

In FIG. 5, each of line memories 1 and 2 stores binary data for one line to be subjected to binary-coding processing. An error memory 3 stores error data for one line output from a divider 22. Each of D F/Fs 4-14 delays data by one picture element.

An average density calculation ROM 15 calculates an average density of a predetermined region from binary data around a target picture element, and outputs a threshold value when the data of the target picture element is subjected to binary-coding processing. A subtracter 16 calculates a difference between the input multivalue data of the target picture element and the threshold value output from the ROM 15. A comparator 17 compares the threshold value output from the ROM 15 with the multivalue data of the target picture element. An adder 19 for error correction adds error data output from the divider 22 (the error distributed from the immediately preceding picture element), error data output from the D F/F 14 (the error distributed from a picture element on the immediately preceding line), and 6-bit multivalue input data transmitted from the correction circuit C. A comparator 20 compares error data to be distributed to adjacent picture elements transmitted from the subtracter 16 with a predetermined value .alpha.. The divider 22 divides the error data to be distributed to adjacent picture elements transmitted from the subtracter 16 to 1/2. A selector 21 selects either 0 or the output from the subtracter 16 in accordance with a select signal from the comparator 20. A register 23 sets a reduction ratio. A removed-pattern formation circuit 24 comprising a ROM outputs patterns to be removed in accordance with reduction ratio set in the register 23. A gate 25 outputs a removal clock signal by providing a logical sum of the output of the ROM 24 and a picture-element clock signal. When some of corrected target-picture-element data transmitted from the adder 19 are removed for the purpose of reduction, a removed-picture-element processing circuit 26 obtains the average of the removed picture-element data and data of the immediately preceding picture element, and outputs the average value as the corrected target-picture-element data.

In the above-described configuration, the comparator 17 outputs 1-bit data B(i, j) binary-coded according to expression (2).

The binary-coded data are input to the line memory 2 and the D F/F 12. At that time, the D F/F 12, the line memory 2 and the line memory 1 output binary data B(i-1, j) of the immediately preceding picture element, B(i+2, j-1) and B(i+2, j-2) to the ROM 15, respectively. The D F/Fs 4-11 and 13 also output shifted binary data.

These binary data are binary-coded image data within the region shown in FIG. 1(2). If these data are connected to input addresses of the ROM 15, a binary-coded threshold value can be obtained at high speed, since binary-coded threshold values m(i, j) expressed by expression (2) have been stored in advance based on expression (1).

This threshold value is input to the subtracter 16 and the comparator 17. The value f(i, j)+E(i, j) is also input from the removed-picture element processing circuit 26 to the subtracter 16 and the comparator 17.

Based on the two inputs, the subtracter 16 calculates the difference between the two sides of the inequality in expression (2).

On the other hand, the comparator compares f(i, j)+E(i, j) with m(i, j) based on the above-described two inputs, and outputs binary-coded data B(i, j). The error E.sub.0 (i,j) output from the subtracter 16 based on expression (5) is input to the selector 21 and the comparator 20.

The comparator 20 compares the error E.sub.0 (i, j) with the constant .alpha. using expression (3), and outputs a select signal to the selector 21 based on the result of the comparison.

In accordance with the select signal transmitted from the comparator 20, the selector 21 selectively outputs E.sub.0 (i,j)=0 if the absolute value of the error E.sub.0 (i, j) is greater than .alpha., and the output of the subtracter 16 as it is if the absolute value of the error E.sub.0 (i, j) is equal to or smaller than .alpha..

The error E.sub.0 output from the selector 21 is divided by 1/2 by the divider 22, and is distributed to E.sub.1 (i+1, j) and E.sub.2 (i, j+1).

E.sub.1 (i+1, j) is input to the adder 19, and is added to input image data f(i+1, j) of the next picture element.

E.sub.2 (i, j+1) is input to the error memory 3, and is added to input image data f(i, j+1) of a picture element on the immediately succeeding line by the adder 19 after passing through the D F/F 14.

The removed-picture-element processing circuit 26 delays the added value by one picture-element clock pulse when the image is not reduced.

Binary-coding processing is sequentially performed by repeating the above-described processing every time image data are input. An explanation will now be provided of reduction of an image.

The register 23 is connected to a CPU bus, and a reduction ratio is set in the register 23. The removed pattern formation circuit 24 outputs patterns indicating which data are to be removed, based on the set reduction ratio. The output of the pattern of data to be removed gates a picture-element clock signal in the gate 25. The output of the gate 25 is connected to the line memories 1 and 2, the error memory 3, the D F/Fs 4-14 and the removed-picture-element processing circuit 26. For example, if the reduction ration is 100%, the output of the circuit 24 is "L", and the gate 25 outputs the picture-element clock signal as it is. If the reduction ratio is 50%, circuit 24 outputs a square wave wherein "H" and "L" are repeated in synchronization with picture-element clock pulses. Hence, the output of the gate 25 has a waveform wherein a clock pulse is removed for every two picture elements. The line memories 1 and 2, the error memory 3, the D F/Fs 4-14 and the removed-picture-element processing circuit 26 thereby operate only for one picture element in every two picture elements. Thus, picture elements are partially removed (reduced).

FIGS. 6(1) and 6(2) illustrate the schematic operations of the removed-picture-element processing circuit 26.

FIG. 6(1) represents a case wherein the reduction ratio is greater than 50%. It is assumed that B is a picture element to be removed. An average value C of the input multivalue data of the picture element B and the input multivalue data of a picture element A immediately before the picture element B which is not to be removed is obtained. The value C is used as the input multivalue data for the picture element A.

FIG. 6(2) represents a case wherein the reduction ratio is smaller than 50%. In this case, there is a possibility that two or more consecutive picture elements may have to be removed. In such case, the above-described processing is performed only for the leading picture element among a set of consecutive picture elements to be removed, and other picture elements (the picture element 1 in the case of FIG. 6(2)) are simply removed.

As described above, in reduction, by not rejecting input multivalue data of a picture element to be removed, but by modifying adjacent picture elements to reflect that data, it is possible to prevent discontinuity of gradation and disappearance of fine lines. This approach is particularly effective when binary data after binary-coding processing are used for the subsequent binary-coding processing, as in the present embodiment.

FIG. 7 illustrates the detail of the removed-picture-element processing circuit 26. In FIG. 7, there are shown D F/Fs 18, 29 and 31. An adder 27 adds input multivalue data (corrected target-picture-element data "a") and data c of the immediately preceding picture-element which is not removed. A divider 28 divides the added value by 2 to obtain an average value. A selector 30 selects whether the corrected target-picture-element data c is output, or an average value c with the removed picture element is output. Also shown are a removed-pattern signal b, an a signal d obtained by delaying the signal b by an amount of one picture element.

FIGS. 8(1) and 8(2) are operational timing charts for the removed-picture-element processing circuit 26.

The corrected target-picture-element data a are latched with removal clock pulses g to provide signal c. In this case, the third and the sixth components of the corrected target-picture-element data a are removed.

Signals a and c are input to the adder 27, pass through the divider 28, and the average (signal e) of signals a and c is latched by the D F/F 29. The latch timing is provided by an OR signal of signal d obtained by delaying removed-pattern signal b by one picture element and a picture-element clock signal.

Signals e and c are input to the selector 30, whose output is selected by an inverted signal, formed by inverting signal d.

Accordingly, in the present case, components 3 and 6 are removed from among components 1, 2, 3, 4, 5, 6 and 7 of the input corrected target-picture-element data, and the output signal (f) of the removed-picture-element processing circuit 26 assumes values 1, (2+3)/2, 4, (5+6)/2 and 7.

As explained above, according to the present embodiment, the average density is calculated using only binary data after binary-coding processing has been completed, and binary-coding processing of input multivalue data is performed using the average density as the threshold value. Hence, it is possible to reduce the amount of processing for binary-coding from what is needed in the average density approximation method. Furthermore, since input multivalue data are subjected to error correction if an error between the input multivalue data and the average density produced when the data are subjected to binary-coding processing is within a predetermined range, it is possible to improve greatly gradation.

In the present embodiment, if an error between the average density and the input multivalue data is greater than a predetermined value, the error is not corrected. Hence, it is possible to prevent a decrease in resolution caused by preserving the density, and to reproduce edge portions clearly. Furthermore, since reduction is performed by controlling clock signals for the line memories 1 and 2, the error memory 3, the D F/Fs 4-13 and the reduced-picture-element processing circuit 26, the configuration of hardware is greatly simplified, and, after all, binary-coding processing is performed after removing some of input image data. Moreover, by performing binary-coding processing while reflecting a removed picture element upon adjacent picture elements, it is possible to prevent deterioration of gradation and resolution due to reduction. Deterioration of picture quality can be prevented also when binary-coded data are used in binary-coding processing for picture elements after a target picture element.

In a second embodiment of the present invention, the removed-picture-element processing circuit 26 of the first embodiment is partly modified.

FIG. 9 illustrates the details of the removed-picture-element processing circuit 26 of the second embodiment. In FIG. 9, there are shown D F/Fs 18, 29, 31 and 33. An adder 27 adds input multivalue data (corrected target-picture-element data a) and data c of the preceding picture element which is not to be removed. A divider 28 divides the added value by 2, and obtains the average value of data a and c. A selector 30 selects whether the preceding-picture-element data c are to be output, or an average value e (the average of a and c) is to be output. A subtracter 34 obtains a difference between the corrected target-picture-element data a and preceding-picture-element data h. A comparator 35 compares the difference between the values a and c with a certain fixed value x (or a value set by a CPU or the like). b represents a removed-pattern signal. An AND gate 36 gates the removed-pattern signal with the output of the comparator 35. d represents a signal obtained by delaying the signal b by one picture element. There is also shown an OR gate 32, whose function is explained below.

FIG. 10 is an operational timing chart of the removed-picture-element processing circuit 26 of the second embodiment.

The corrected target-picture-element data a are latched by the D F/F 33 with picture-element clock pulses, and the signal h is obtained. That is, signal b comprises data of the immediately preceding picture element as compared with the corrected target-picture-element data a. When it is determined by the subtracter 34 and the comparator 35 that .vertline.a=h.vertline.>x, signal i becomes "L". In FIG. 10, the difference between the third and second picture elements of the signal a is greater than x; that is, an edge portion, such as a character portion or the like, is present in the image.

Picture elements corresponding to portions where the removed-pattern signal b is "H" must be removed.

The corrected target-picture-element data a are latched by another D F/F 18 with timing determined by a removal clock signal g, and signal c is obtained. In this case, the third and seventh picture elements are removed.

The signals a and c are input to the adder 27 and pass through the divider 28, and the average of the signals a and c is latched by the D F/F 29 (signal e). The latch timing is obtained from a signal which is gotten by ORing (1) a signal d obtained by delaying the result of ANDing signals i (obtained by removing a removed portion at an edge portion from a removed portion) and b, by one picture element, and (2) the picture-element clock signal.

The signals e and c are input to the selector 30, which selects its output in accordance with an inverted signal, obtained by inverting signal d.

Accordingly, in the present embodiment, components 3 and 7 are removed from among components 0, 1, 2, 3, 4, 5, 6, 7 and 8 of the input corrected target-picture-element data. The second picture element which corresponds to an edge portion is output as it is, and the average value of the sixth and seventh picture elements which do not correspond to a non-edge portion is output.

As explained above, according to the second embodiment, in reduction, it is possible to prevent deterioration of resolution at an edge portion by performing simple partial removal of the edge portion, and to prevent deterioration of gradation at a non-edge portion by modifying picture elements preceding a removed picture element to reflect data of the removed picture element.

An explanation will now be provided of a third embodiment of the present invention wherein the binary-coding circuit shown in FIG. 5 is partly modified. In the third embodiment, when the reduction ratio is greater than a predetermined value (i.e., is close to unit magnification), information of a picture element assigned by the removed-pattern formation circuit 24 is simply removed.

FIG. 11 is a block diagram showing the detail of the binary-coding circuit D in the third embodiment. In FIG. 11, like components to those in FIG. 5 are indicated by the same numerals, and detailed explanation of the binary-coding circuit will be omitted.

Reduction of an image in the third embodiment will now be explained.

The register 23 is connected to a CPU bus, and a reduction ratio is set in the register 23. The removed pattern formation circuit 24 outputs patterns to be removed based on the set reduction ratio. The output of a pattern to be removed gates a picture-element clock signal in the gate 25. The output of the gate 25 is connected to the line memories 1 and 2, the error memory 3, the D F/Fs 4-14 and a removed-picture-element processing circuit 200. For example, if the reduction ratio is 100%, the output of the circuit 24 is "L", and the gate 25 outputs the picture-element clock signal as it is. If the reduction ratio is 50%, a square wave wherein "H" and "L" are repeated in synchronization with picture-element clock pulses. Hence, the output of the gate 25 has a waveform wherein a clock pulse is removed for every two picture elements. The line memories 1 and 2, the error memory 3, the D F/Fs 4-14 and the removed-picture-element processing circuit 200 thereby operate only for one picture element in every two picture elements. Thus, picture elements are partially removed (reduced).

The reduction ratio set in the register 23 is input to a comparator 100, and is compared with a constant value .beta..

If the value of the reduction ratio is greater than .beta. (which is close to unit magnification), the comparator 100 outputs "H" so that an average value is not output from the removed-picture-element processing circuit 200. If the value of the reduction ratio is smaller than .beta., the comparator 100 outputs "L" so as to enable the operation of the removed-picture-element processing circuit 200.

It is thereby possible to prevent the phenomena that fine lines are apt to disappear and gradation is apt to be deteriorated as the reduction ratio is reduced, by enabling the removed-picture-element processing circuit 200 and reflecting data of a removed picture element upon adjacent picture elements.

It is also possible to prevent deterioration of resolution caused by performing removed-picture-element processing when the reduction ratio is high.

The schematic operations of the removed-picture-element processing circuit 200 are almost the same as those shown in FIG. 6.

FIG. 6(1) represents a case wherein the reduction ratio is greater than 50%. It is assumed that B is a picture element to be removed. An average C of the input multivalue data of the picture element B and the input multivalue data of a picture element A immediately before the picture element B which is not to be removed is obtained. The value C is used as input multivalue data for the picture element A. When the reduction ratio is greater than the above-described value .beta., the signal from the comparator 100 is "H". Hence, data of the picture element B are simply removed, and data of the picture element A are not replaced by the average value C.

FIG. 6(2) represents a case wherein the reduction ratio is smaller than 50%. In this case, there is a possibility that two or more consecutive picture elements may have to be removed. At that time, the above-described processing is performed only for the leading picture element among the consecutive picture elements to be removed, and other picture elements (the picture element 1 in the case of FIG. 6(2)) are simply removed.

As described above, in reduction, by not rejecting input multivalue data of a picture element to be removed, but by modifying adjacent picture elements to reflect that data, it is possible to prevent discontinuity of gradation and disappearance of fine lines. This approach is particularly effective when binary data after binary-coding processing are used for the subsequent binary-coding processing, as in the present embodiment.

FIG. 12 illustrates the detail of the removed-picture-element processing circuit 200. In FIG. 12, like components to those in FIG. 7 are indicated by the same numerals. In FIG. 12, there are shown D F/Fs 18, 29 and 31. An adder 27 adds input multivalue data (corrected target-picture-element data a) and data c of the immediately preceding picture-element which is not removed. A divider 28 divides the added value by 2 to obtain an average value. A selector 30 selects whether the corrected target-picture-element data c is output, or an average value e with the removed picture element is output. Also shown are a removed-pattern signal b, and a signal d obtained by delaying the signal b by one picture element.

When the output of the comparator 33 is "H", the signal c is always selected, and simple removal is performed. When the output of the comparator 33 is "L", switching between the signals c and e is performed, the removed-picture-element processing is performed.

As explained above, according to the present embodiment, the average density is calculated using only binary data after binary-coding processing has been completed, and binary-coding processing of input multivalue data is performed with making the average density a threshold value. Hence, it is possible to reduce the amount of processing for binary-coding than in the average density approximation method. Furthermore, since input multivalue data are subjected to error correction if an error between the input multivalue data and the average density produced when the data are subjected to binary-coding processing is within a predetermined range, it is possible to improve gradation greatly.

In the present embodiment, if an error between the average density and the input multivalue data is greater than a predetermined value, the error is not corrected. Hence, it is possible to prevent a decrease in resolution caused by preserving the density, and to reproduce edge portions clearly.

Furthermore, since reduction is performed by controlling clock signals for the line memories 1 and 2, the error memory 3, the D F/Fs 4-13 and the reduced-picture-element processing circuit 26, the configuration of hardware is greatly simplified, and, after all, binary-coding processing is performed after removing some of input image data. Moreover, when the reduction ratio is small, by performing binary-coding processing while modifying picture elements adjacent to a removed one to reflect the removed picture element, it is possible to prevent deterioration of gradation and resolution due to reduction. Deterioration of picture quality can be prevented also when binary-coded data are used in binary-coding processing for picture elements after a target picture element.

Although, in the above-described embodiment, the determination whether the removed-picture-element processing operation must be enabled or disabled is performed by comparing the reduction ratio with the fixed value .beta., a resister may be provided so that the value .beta. is variably set under the control of a CPU. Alternatively, the comparator 33 may be removed, and a resister for selecting enable/disable processing may be provided to control the operation.

As explained above, according to the present invention, it is possible to obtain an image having excellent gradation and resolution in a short time with a simple configuration of hardware, and to obtain an image not having deterioration of picture quality even in reduction.

While the present invention has been described with respect to what are presently considered to be the preferred embodiments, it is to be understood that the invention is not limited to the disclosed embodiments. The present invention is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.