Constant Current Circuit and an Oscillating Circuit Controlled by the Same

The present invention relates to a constant current circuit and an oscillating circuit controlled by the constant current circuit, the oscillating circuit capable of being used as a variable-frequency clock generator in a battery-powered computer.

Various methods for saving electric power are implemented in a computer which is powered by a battery. For example, operating voltage thereof is set lower in such operation modes not requiring high speed as the mode selection prior to the arithmetic processing, together with lowering the frequency of clock signal. Lower operating voltage and lower clock signal frequency both result in the reduction of power consumption.

In conventional battery-powered computers, one of the following techniques is applied thereto for changing clock signal frequency as described above: the first is implementing plural oscillators for generating clock signals of different frequencies, and selecting respective one of the oscillators, when performing, for example, a high speed operation such as arithmetic processing or a low speed operation such as mode selection; the second is providing a single oscillator of a relatively high frequency, and obtaining a desired low frequency by demultiplying the high frequency. However, these techniques include drawbacks of increase in the hardware such as oscillators and selecting circuits, and, of increase in the cost of the computers. Another drawback included in the above conventional technique is such that the lower frequency can not be changed continuously.

It is therefore an object of the present invention to provide an oscillating circuit capable of generating clock signals of higher frequency for operations such as arithmetic processing and of lower frequency for operations such as mode selection, within a simple circuit configuration and at low cost.

Another object of the present invention is providing an oscillating circuit which generates the higher frequency and the lower frequency clock signals, in response to the power source voltage change for the power saving.

Further an object of the present invention is providing an oscillating circuit whose oscillation frequency can continuously be changed by changing the voltage of a power supplying source.

These and other objects, features and advantages of the present invention will become clear when reference is made to the following description of the preferred embodiments of the present invention together with reference to the accompanying drawings.

FIG. 1 is a diagram showing the fundamental configuration of a constant current circuit according to the present invention;

FIG. 2 is a diagram showing the fundamental configuration of an oscillating circuit according to the present invention;

FIG. 3 is a graph showing the relation between power voltage V.sub.cc and current I.sub.2 in the constant current circuit of FIG. 1;

FIG. 4 is a graph for explaining the change of the slope of V.sub.cc - I.sub.2 characteristic curve of FIG. 3 with the change of R.sub.4 ;

FIG. 5 shows waveforms of the signal output from the oscillating circuit of FIG. 2, corresponding to different V.sub.cc s in the constant current circuit of FIG. 1;

FIG. 6 is a graph showing the relation between power voltage V.sub.cc in the constant current circuit of FIG. 1 and oscillation frequency f of the circuit of FIG. 2;

FIG. 7 is a graph showing the change of the slope of V.sub.cc -f characteristic curve of FIG. 6 with the change of R.sub.4 ;

FIG. 8 is a graph for explaining an extended change of I.sub.2 in the V.sub.cc -I.sub.2 characteristics of FIG. 3;

FIG. 9 is a graph for explaining an extended change of f in the V.sub.cc -f characteristics of FIG. 6;

FIG. 10 is a diagram showing the fundamental configurations of another constant current circuit according to the present invention;

FIG. 11 is a diagram showing the first embodiment of the present invention;

FIG. 12 is a graph for explaining the shift of I.sub.4 in the circuit of FIG. 11;

FIG. 13 is a graph for explaining the shift of frequency f in the circuit of FIG. 11;

FIG. 14 shows waveforms of the signal output from the circuit of FIG. 11, corresponding to different V.sub.cc S;

FIG. 15 is a diagram showing the second embodiment of the present invention;

FIG. 16 shows waveforms of the signal output from the circuit of FIG. 15, corresponding to different V.sub.cc S;

FIG. 17 is a diagram showing a third embodiment of the present invention;

FIG. 18 is a graph showing the V.sub.cc -I.sub.4 characteristics of the circuit of FIG. 17;

FIG. 19 is a graph showing the V.sub.cc -f characteristics of the circuit of FIG. 17; and

FIG. 20 shows waveforms of the signal output from the circuit of FIG. 17, corresponding to different V.sub.cc S.

A constant current circuit of the present invention is as shown in the circuit diagram of FIG. 1, which comprises a reference voltage source block 1, a differential amplifier block 3 including a constant current supplying source block 2 and a resistor R.sub.4, and a voltage dividing block 4 for dividing power source voltage V.sub.cc.

Differential amplifier block 3 comprises transistors Q.sub.3 and Q.sub.5, bipolar transistors, for example, each having a collector connected to the power source voltage V.sub.cc and an emitter connected to one of the constant current supplying source I.sub.A and I.sub.B. The base of the transistor Q.sub.3 is supplied with a reference voltage V.sub.1 from the reference voltage source block 1 and the base of transistor Q.sub.5 is supplied with a divided voltage V.sub.2 of power source voltage V.sub.cc from the node of resistors R.sub.2 and R.sub.3 constituting aforementioned voltage dividing block 4. The resistor R.sub.4 is connected between the emitters of the transistor Q.sub.3 and Q.sub.5. Hence, a current I.sub.2 relative to the difference between the voltages V.sub.1 and V.sub.2 flows through the collector of transistor Q.sub.5. The transistor Q.sub.4 provided between the power voltage source V.sub.cc and the collector of transistor Q.sub.5 constitutes a current mirror in cooperation with the transistor Q.sub.6. The transistors Q.sub.4 and Q.sub.6 are bipolar transistors, for example, each having an emitter connected to the power voltage source V.sub.cc and a base connected each other. The base of the transistor Q.sub.4 is connected to the collector of itself.

Characteristics and operation of the constant current circuit shown in FIG. 1 are described later.

The fundamental configuration of an oscillating circuit of the present invention is as shown in FIG. 2, which comprises a current integration block 6 and a charge-discharge control block 7. The current integration block 6 includes aforementioned transistor Q.sub.6 constituting a current mirror 5, and a capacitor C.sub.0 connected between the collector of the transistor Q.sub.6 and ground potential source. The capacitor C.sub.0 is charged with a current I.sub.4 which is substantially equal to the current I.sub.2 flowing through the transistor Q.sub.4, and the potential V.sub.0 at a terminal of the capacitor C.sub.0 increases with the charging. The charge-discharge control block 7 includes a voltage detection circuit D.sub.1 and a switch means SW. The voltage detection circuit D.sub.1 detects the voltage V.sub.0 of the capacitor C.sub.0 and instructs the switch means SW to close when detecting V.sub.0 higher than a first predetermined voltage (V.sub.S1) and to open when detecting V.sub.0 lower than a second predetermined voltage (V.sub.S2). Hence, the capacitor C.sub.0 is subject to be charged or discharged along with the ON-OFF operation of the switch means SW, and V.sub.0 changes as a triangular wave of a constant frequency. The frequency can be varied by changing the power source voltage V.sub.CC as described later.

Referring again FIG. 1 together with FIG. 3, the resistor R.sub.2 and R.sub.3 are selected so that V.sub.2 is equal to V.sub.1 when the power source voltage V.sub.CC is V.sub.4, hence I.sub.2 =I.sub.B and the current I.sub.3 flowing through the resistor R.sub.4 is zero. Under this condition, if the power source voltage V.sub.CC is increased higher than V.sub.4, V.sub.2 becomes larger than V.sub.1, hence, the current I.sub.2 increases while the current I.sub.1 decreases. Accordingly, the current I.sub.3 flows through the resistor R.sub.4 from the transistor Q.sub.5 to the constant current supplying source I.sub.A. At a higher power source voltage V.sub.5, the current I.sub.1 flowing through the transistor Q.sub.3 becomes almost zero, hence, I.sub.2 =I.sub.A +I.sub.B. If the power source voltage V.sub.CC is decreased lower than V.sub.4, V.sub.2 becomes smaller than V.sub.1, hence, the current I.sub.1 increases while the current I.sub.2 decreases. Accordingly, the current I.sub.3 flows through the resistor R.sub.4 from the transistor Q.sub.3 to the constant current supplying source I.sub.B. At a lower power source voltage V.sub.3, the current I.sub.2 flowing through the transistor Q.sub.5 becomes almost zero, hence, I.sub.2 =0. As described above, the direction of I.sub.3 flowing through R.sub.4 is reversed at a V.sub.CC where V.sub.CC =V.sub.4, and I.sub.2 can be changed continuously with V.sub.CC so as to be larger than I.sub.B in a range where V.sub.CC >V.sub.4 and to be smaller than I.sub.B in a range where V.sub.CC <V.sub.4. If V.sub.CC is in the range of V.sub.3 <V.sub.CC <V.sub.4, I.sub.2 is represented by I.sub.2 =I.sub.B -I.sub.3, hence, I.sub.2 .apprxeq.I.sub.B -(V.sub.1 -V.sub.2)/R.sub. 4, while, if V.sub.CC is in the range of V.sub.4 <V.sub.CC <V.sub.5, I.sub.2 is represented by I.sub.2 =I.sub.B +I.sub.3, hence, I.sub.2 .apprxeq.I.sub.B +(V.sub.2 -V.sub.1)/R.sub.4. Accordingly, the larger the resistance of the resistor R.sub.4, the larger the current I.sub.2 in the range of V.sub.3 <V.sub.CC <V.sub.4, while, the larger the resistance of the resistor R.sub.4, the smaller the current I.sub.2 in the range of V.sub.4 <V.sub.CC <V.sub.5. Thus, the slope of the V.sub.CC -I.sub.2 characteristic curve shown in FIG. 3 decreases with respect to the increase in R.sub.4. Such change in the V.sub.CC -I.sub.2 characteristic curve by the resistance of the resistor R.sub.4 is shown in FIG. 4. Accordingly, I.sub.2 can continuously be changed with the change of V.sub.CC, if the resistor R.sub.4 is selected to have a large enough resistance. This feature enables the oscillating circuit of FIG. 2 to be a variable frequency oscillator.

There is a disclosure in Japanese patent application publication by Tokukaisho 63-193618 for driving a loudspeaker, wherein a differential amplifier is used for controlling the current supplied to the loudspeaker and a drive circuit therefor so that the current is decreased along with the reduction of the power voltage. However, the differential amplifier is not provided with a resistor like R.sub.4 as described above and the concept of changing the slope of V.sub.CC -I.sub.2 characteristic curve by R.sub.4 as in the present invention is not suggested.

The operation of the oscillating circuit of FIG. 2 with the change of the power source voltage V.sub.cc is described in the following.

The current I.sub.4 to charge the capacitor C.sub.0 of the oscillating circuit is equal to I.sub.2 flowing through the transistor Q.sub.4 in the constant current circuit of FIG. 1, due to the function of the current mirror comprising the transistors Q.sub.4 and Q.sub.6. Hence, the rate of charging the capacitor C.sub.0 depends on the current I.sub.2 which can be controlled by changing the power source voltage V.sub.cc. On the other hand, the rate of discharging the capacitor C.sub.0 is constant regardless of the change of V.sub.cc. Therefore, the frequency of oscillating circuit of FIG. 2 changes according to the change of the power source voltage V.sub.cc. FIG. 5 shows exemplary waveforms of the signal output from the oscillating circuit of FIG. 2, corresponding to aforementioned specific V.sub.cc S of V.sub.3, V.sub.4 and V.sub.5, and FIG. 6 shows the change in the frequency f of the output signal with respect to the change of V.sub.cc. In FIG. 5, V.sub.s1 and V.sub.s2 represent the maximum and minimum of the voltages V.sub.0 at an end of the capacitor C.sub.0, respectively, which are detected by the voltage detection circuit D.sub.1 as described above with reference to FIG. 2. In other words, V.sub.s1 is a voltage V.sub.0 where the discharging of the capacitor C.sub.0 Initiates, and, V.sub.s2 is a voltage V.sub.0 where the charging of the capacitor C.sub.0 initiates. As shown in FIG. 5, the rise time of the output signal decreases as V.sub.cc increases, while the fall time of the signal is constant because it only depends on the resistance inherent in the switching means SW shown in FIG. 2. At a power source voltage where V.sub.cc =V.sub.3, the frequency of the output signal is zero as shown in FIGS. 5 and 6, because the current I.sub.4 becomes zero and the capacitor C.sub.0 is not charged.

As mentioned before with reference to FIG. 4, the slope of V.sub.cc -I.sub.2 characteristic curve is decreased by increasing the resistance of the resistor R.sub.4. Accordingly, the slope of V.sub.cc -f characteristic curve shown in FIG. 6 decreases with the increase of R.sub.4 as shown in FIG. 7. Thus, it is possible to attain fine tuning of the oscillation frequency f by changing the power source voltage V.sub.cc, and the circuit of FIG. 2 can be a variable frequency oscillator. It is obvious that if R.sub.4 is decreased to zero, the slope of V.sub.cc -I.sub.2 characteristic curve of FIG. 4, and hence, the slope of V.sub.cc -f characteristic curve of FIG. 7 become so steep that the circuit of FIG. 2 could not be used as a variable frequency oscillator.

Referring back to FIG. 1, if the constant current supplying sources I.sub.A and I.sub.B are replaced by corresponding ones having larger current capacities I.sub.A ' and I.sub.B ', respectively, the change of I.sub.2 in the V.sub.cc -I.sub.2 characteristic curve of FIG. 3 is extended as shown in FIG. 8, hence, the change of f in the V.sub.cc -f characteristic curve of FIG. 6 is extended as shown in FIG. 9. In FIGS. 8 and 9, respective dotted lines represent original V.sub.cc -I.sub.2 characteristic curve corresponding to that in FIG. 3 and V.sub.cc -f characteristic curve corresponding to that in FIG. 6, and f.sub.4 ' and f.sub.5 ' respectively indicate the frequencies f.sub.4 and f.sub.5 changed according to the increase in I.sub.A and I.sub.B.

FIG. 10 is a diagram showing the fundamental configurations of another constant current circuit according to the present invention. The circuit comprising a reference voltage source 1, a differential amplifier block 3 and a voltage dividing block 4 for dividing power source voltage V.sub.cc is almost the same as the circuit of FIG. 1, except for that the FIG. 10 circuit includes only one constant current supplying source I.sub.D connected to a point on the resistor R.sub.4, the point dividing R.sub.4 into two parts R.sub.41 and R.sub.42. If R.sub.4 is equally divided, i.e. R.sub.41 =R.sub.42, the constant current circuit of FIG. 10 has the same characteristics as that of the circuit of FIG. 1. The feature of R.sub.4 to change the slope of the V.sub.cc -I.sub.2 characteristics is also provided. When R.sub.4 is not equally divided, i.e. R.sub.41 .noteq.R.sub.42, the V.sub.cc -I.sub.2 characteristic curve regarding the circuit shifts along the V.sub.cc axis, wherein the direction and amount of the shift depends on the ratio R.sub.41 /R.sub.42.

The first embodiment of the present invention is shown in FIG. 11, comprising a constant current circuit and an oscillating circuit which have configurations respectively based on those of FIGS. 1 and 2. This embodiment circuit is provided with an additional constant current supplying block 8 including a current mirror comprising transistors Q.sub.7 and Q.sub.8, both being bipolar transistors, for example, and a constant current supplying source I.sub.c connected to the collector of the transistor Q.sub.8. The current I.sub.4 for charging the capacitor C.sub.0 is increased by the current I.sub.c such as represented by I.sub.4 .apprxeq.I.sub.2 +I.sub.c. Thus, the current I.sub.4 shifts larger by I.sub.c as shown in FIG. 12, wherein the dotted line represents the original V.sub.cc -I.sub.4 characteristic curve corresponding to that in FIG. 3. As a result of the shift, I.sub.4 is not zero but I.sub.c at V.sub.cc =V.sub.3, different from V.sub.cc -I.sub.2 characteristic curve corresponding to that of the circuit shown in FIG. 1, in which I.sub.2 is equal to I.sub.4, hence, I.sub.4 is zero at V.sub.cc =V.sub.3. Accordingly, the range of the oscillation frequency of the FIG. 11 circuit shifts higher by .DELTA.f as shown in FIG. 13, wherein the frequency f is not zero but f.sub.3 at V.sub.cc =V.sub.3. In FIG. 13, the dotted line represents the original V.sub.cc -f characteristic curve corresponding to FIG. 6. Waveforms of the signal output from the circuit of FIG. 11 are shown in FIG. 14, corresponding to the specific V.sub.cc s of V.sub.3, V.sub.4 and V.sub.5.

The second embodiment of the present invention is shown in FIG. 15, comprising a constant current circuit and an oscillating circuit which have configurations respectively based on those of FIGS. 1 and 2. This embodiment circuit has an additional constant current supplying source I.sub.0 connected in series to the switching means SW in the charge-discharge control block 7. With the addition of the constant current supplying source I.sub.0, the current flowing through the switching means SW during discharging the capacitor C.sub.0 is increased or decreased.

If the current I.sub.0 is selected as I.sub.0 =nI.sub.4, the ratio of the time for discharging to the time for charging of the capacitor C.sub.0 is represented by 1/(n-1), wherein n represents a positive number larger than 1. Thus, the rise time to fall time ratio of the signal output from the circuit of FIG. 15 can be controlled, depending on the current capacity of the constant current supplying source I.sub.0. Waveforms of the signal output from the circuit of FIG. 15 in which the constant current supplying source I.sub.0 has a current capacity of I.sub.0 =2 I.sub.4 are shown in FIG. 16, corresponding to the specific V.sub.cc s of V.sub.3, V.sub.4 and V.sub.5. As seen in FIG. 16, the duty factor of each waveform is 50%.

The third embodiment of the present invention is shown in FIG. 17, comprising a constant current circuit and an oscillating circuit which have configurations respectively based on those of FIGS. 1 and 2. This embodiment circuit includes constant current supplying sources I.sub.c and I.sub.0 introduced by the precedent embodiments described respectively with reference to FIGS. 11 and 15. In the circuit of FIG. 17, the transistors Q.sub.1 and Q.sub.2, both bipolar transistors, for example, and a resistor R.sub.1 constitute a source of reference voltage V.sub.1. The base-emitter junction voltage of the transistors Q.sub.1 and Q.sub.2 which are connected each other in series and supplied with a bias current is used as a constant voltage source. In FIG. 17, a transistor Q.sub.9 is used as a switching means and a Schmitt circuit D.sub.2 is used as a voltage detection circuit, respectively corresponding to those denoted by reference symbols SW and D.sub.1 in FIGS. 11 and 15. The Schmitt circuit D.sub.2 converts triangular pulse signals into rectangular pulse signals thanks to the waveform shaping function thereof based on the inherent hysteresis characteristics between the input and output. The V.sub.cc -I.sub.4 characteristics and the V.sub.cc -f characteristics of the circuit of FIG. 17 are as shown in FIGS. 18 and 19, respectively.

In the circuit of FIG. 17, the Schmitt circuit D.sub.2 has two threshold values of a high level S.sub.H and a low level S.sub.L, and jumps the output F.sub.out thereof to high level V.sub.H, if V.sub.0 increase up to the high level threshold S.sub.H. Hence, the transistor Q.sub.9 turns on and the capacitor C.sub.0 is discharged. Accordingly, the voltage V.sub.0 decreases but the output remains at high level V.sub.H. When the voltage V.sub.0 reaches the low level threshold S.sub.L, the Schmitt circuit D.sub.2 jumps the output F.sub.out to low level V.sub.L. As a result, the transistor Q.sub.9 turns off and the capacitor C.sub.0 is stopped from discharging and begins to be charged by the current I.sub.4. Hence, the voltage V.sub.0 increases but the output remains at low level V.sub.L until the voltage V.sub.0 reaches the high level threshold S.sub.H. Waveforms of the signal output from the circuit of FIG. 17 are shown in FIG. 20, corresponding to the specific power source voltages V.sub.cc of V.sub.3, V.sub.4 and V.sub.5. The waveforms are obtained when the constant current supplying source I.sub.0 having a current capacity of I.sub.0 =2 I.sub.4 is used, and, the rectangular pulses have a duty factor of 50%.

Any of the above embodiment circuits can be incorporated in a monolithic integrated circuit, therefore, they are suitably applied to computers like notebook-sized personal computers powered by batteries, hence, resulting in power savings of the computers by lowering the clock signal frequency and the power voltage during operations such as mode selection. The feature of variable frequency clock signals with the use of a single oscillating circuit, attained by the present invention also results in the reduction of hardware and production cost, while improving the reliability of the computers.