Electronic Devices Utilizing Superconducting Materials

This invention relates to an electronic device utilizing a superconducting material.

Attempts to construct solid electronic devices utilizing superconducting materials such as Nb-Ge series metallic compounds have been made so far. A representative example is the Josephson device which can operate on the basis of tunnel effects in superconducting state. This superconducting device is a two-terminal switching device.

However, since the Josephson device is a two-terminal device, input signals and output signals can not be treated independently and, therefore, no amplifying function is available. Because of this, while the superconducting device can operate at very high frequencies, the device designing is very complicated. Furthermore, there is another shortcoming in that it is inconvenient and difficult to apply for this device the conventional designing procedure which has been highly developed in semiconductor industries.

Furthermore, in case of application of ceramic superconductors to semiconductor integrated circuits, silicon semiconductor surfaces contacting ceramic superconductors tend to be oxidized after long use thereof. This oxidation makes nonconductive the interface between the semiconductor and the superconductor, so that current can not pass therethrough.

It is therefore an object of the invention to provide a superconducting device based on a new operational concept.

It is another object of the present invention is to provide a superconducting device having excellent frequency characteristics.

It is a further object of the present invention is to provide a new junction between a superconductor and a semiconductor surface.

In order to accomplish the above and other objects of the present invention, a surface portion of the semiconductor region of a superconducting device is coupled with a superconducting film with an insulating film therebetween. The insulating film functions to allow tunnel current thereacross between the superconducting film and the semiconductor region, and to protect the underlying semiconductor region from being degraded due to the influence of the overlying superconducting film or the fabricating process thereof. For this purpose, the insulating film is formed of an insulating or semi-insulating film whose thickness and energy gap are selected so as to allow tunnel currents.

FIGS. 1(A) to 1(C) are cross sectional views showing embodiments of superconducting devices in accordance with the present invention.

FIGS. 2(A) to 2(C) are explanational views showing the operation of a superconducting device in accordance with the present invention.

FIG. 3(A) is a circuit diagram showing an application of a superconducting device in accordance with the present invention.

Referring to FIGS. 1(A) to 1(C), insulated gate field effect transistors in accordance with the present invention are illustrated.

The device as illustrated in FIG. 1(A) is a first embodiment in accordance with the present invention. Superconducting ceramic films 3 and 5 are deposited on an insulating substrate 1 of YSZ (yttria stabilized zircon) or strontium titanate by screen press printing, sputtering, MBE (molecular beam epitaxial growth), CVD or the like. The ceramic material conforms to, for example, YBa.sub.2 Cu.sub.3 O.sub.6-8, YBaSrCu.sub.3 O.sub.6-8 or YBaCaCu.sub.3 O.sub.6-8. Other examples will be seen in the last portion of this description. When Ge, Sn, Pb, Sb, F and/or the like is added to these compositions, the height of barriers occuring at interfaces among crystals can be lowered. Simultaneously or thereafter, the structure is subjected to thermal annealing at 500.degree. C.-1200.degree. C. for 5 hours-10 hours, followed by gradually cooling.

After the formation of an insulating film over the ceramic films 3 and 5 and the intervening surface of the insulating substrate 1 between the films 3 and 5, a non-single-crystalline semiconductor film 4 such as an amorphous or microcrystalline silicon semiconductor film is formed on the structure straddling the intervening surface of the insulating substrate 1 by photo-CVD or plasma-CVD. The upper surface of the structure is insulated by a nonconductive film 11. A control electrode 10 is formed from a superconducting ceramic same as that described above, or a metallic material such as copper or a compound between copper and nickel by vapor evaporation. Although not illustrated, the superconducting films 18 and 19 make contact with superconducting leads at the ends 18 and 19 without contact resistance.

The operation of the device will be explained referring to FIGS. 2(A) to 2(C). The lateral direction of the diagrams corresponds to the lateral direction of FIG. 1(A) while the vertical direction is related to the energy level (potential).

Throughout FIGS. 2(A) to 2(C), the device is given a voltage at the superconducting films 3 and 5 across the semiconductor film 4. In FIG. 2(A) is depicted the energy state for the case where no voltage is applied to the control film 10. The potential level of the film 5 becomes higher than that of the film 3 by the differential 30. By virtue of the differential potential 30, the electron flow 20 exceeds the electron flow 20' and, as a result, a current 22 is observed. In FIG. 2(B) is depicted the energy state for the case where a negative voltage is applied to the control film 10. By virtue of the potential barrier established at the active semiconductor film 4, the electron flow 20' and the electron flow 20 are suppressed. Eventually, the limited current 22' is observed. In FIG. 2(C) is depicted the energy state for the case where a positive voltage is applied to the control film 10. By virtue of the depressed potential corresponding to the film 4, the electron flow 20' is enhanced while the electron flow 20 is suppressed. However, once the potential depression is filled with electrons, the potential line 24" is shifted to a potential line 25 (broken line). As a result, a current 22" comparable to the current 22 in FIG. 2(A) can flow therethrough.

As explained above, an output current passing through the semiconductor film 4 can be controlled in accordance with the input voltage applied to the control electrode 10. If the insulating film underlying the control electrode provides a sufficient isolation, the output energy can be larger than the input energy, and therefore amplification can be performed. Also, when arranged in a circuit illustrated in FIG. 3, the superconducting device functions as an invertor.

FIG. 1(B) is a cross sectional view showing a second embodiment in accordance with the present invention. Field insulating regions 2 are formed within a silicon semiconductor substrate 1, an active region 4 being situated between the regions 2. Superconducting films 3 and 5 are formed on the substrate surface at both sides of the active region 4 through an insulating film 8 and 9 provided for tunnel current. An insulating film 11 of silicon oxide is formed on the structure. A control electrode 10 is formed above the active region and the distal end portions of the superconducting films 3 and 5.

The insulating film for tunnel current is formed by heating the silicon substrate in a highly pure ammonia atmosphere at 700.degree.-950.degree. C. for 15-40 minutes in order to produce a silicon nitride film of 10-25 .ANG. thickness on the surface of the substrate 1. Other examples of materials forming insulating films are, silicon carbide and materials mainly comprising carbon such as diamond-like carbon. The formation process of carbon materials can be seen in U.S. patent application Ser. No. 159,857 filed on Feb. 24, 1988. The energy gaps of silicon oxide, silicon nitride and diamond-like carbon are 8eV, 5eV, 3eV and 1-5 eV respectively.

FIG. 1(C) shows a third embodiment in accordance with the present invention. Field insulating regions 2 are formed within a silicon semiconductor substrate in the same manner as the preceding embodiment. Between the insulating regions 2, an insulating film 11 is formed from a thermal oxidation film. Further, a control film 10 is formed from a superconducting ceramic, a silicon semiconductor or a metal oxide, followed by patterning the control film and the underlying insulating film 11.

Next, with the control film and/or the photo-resist remaining thereon as the mask, a p-type or n-type impurity is introduced into the semiconductor substrate by ion implantation in order to produce impurity regions 13 and 14 within the substrate. The impurity regions function as source and drain regions for IGFET. Insulating films 8 and 9 of a semi-insulating silicon carbide film of 10-30 .ANG. thickness is formed by heating the substrate in an atmosphere of a highly pure methane at 800.degree.-1050.degree. C. In this procedure, the doped semiconductor regions are annealed simultaneously to have an impurity density of 1.times.10.sup.19 to 1.times.10.sup.21 cm.sup.-3. A superconducting oxide is deposited on the structure by sputtering or electron beam evaporation, and patterned in the same manner as in the foregoing embodiments to form superconducting films 3 and 5. The superconducting films 3 and 5 cover most of the surface portions of the impurity regions 13 and 14. Further, superconducting or non-superconducting leads may be formed in contact with the superconducting films 3 and 5 for connection with external circuits, if desired. Reference numeral 12 designates an overlying insulating film.

As a modification, multi-layered superconducting structure can be designed by covering the upper surface of the superconducting film with an insulating film, forming an opening in the insulating film, and depositing another superconducting film on the insulating film in order to make contact with the lower superconducting film through the opening.

The lengths of the active regions of the semiconductor substrates in accordance with the present invention are chosen to be 1 micron or less, so that the devices can be operated at frequencies not lower than 1 nano second.

Superconducting ceramics for use in accordance with the present invention also may be prepared in consistence with the stoichiometric formulae (A.sub.1-x B.sub.x).sub.y Cu.sub.z O.sub.w X.sub.v, where A is one or more elements of Group IIIa of the Periodic Table, e.g., the rare earth elements, B is one or more elements of Group IIa of the Periodic Table, e.g., the alkaline earth metals including beryllium and magnesium, X is one or more elements of a group consisting of Ge, Sn, Pb, F and Cl, and x=0-1; y=2.0-4.0, preferably 2.5-3.5; z=1.0-4.0, preferably 1.5-3.5; w=4.0-10.0, preferably 6.0-8.0; and v=0-3. Also, superconducting ceramics for use in accordance with the present invention may be prepared consistent with the stoichiometric formulae (A.sub.1-x B.sub.x).sub.y Cu.sub.z O.sub.w, where A is one or more elements of Group Vb of the Periodic Table, such as Bi, Sb and As, B is one or more elements of Group IIa of the Periodic Table, e.g., the alkaline earth metals including beryllium and magnesium, and x=0.3-1; y=2.0-4.0, preferably 2.5-3.5; z=1.0-4.0, preferably 1.5-3.5; and w=4.0-10.0, preferably 6.0-8.0. Examples of this general formula are BiSrCaCuCu.sub.2 O.sub.x and Bi.sub.4 Sr.sub.3 Ca.sub.3 Cu.sub.4 O.sub.x. Tc onset and Tco samples confirmed consistent with the formula Bi.sub.4 Sr.sub.y Ca.sub.3 Cu.sub.4 O.sub.x (y is around 1.5) were measured to be 40.degree.-60.degree. K., which is not so high. Relatively high critical temperatures were obtained with samples conforming to the stoichiometric formulae Bi.sub.4 Sr.sub.4 Ca.sub.2 Cu.sub.4 O.sub.x and Bi.sub.2 Sr.sub.3 Ca.sub.2 Cu.sub.2 O.sub.x. The number x denoting the oxygen proportion is 6-10, e.g. around 8.1. Such superconducting materials can be formed by screen press printing, vacuum evaporation or CVD.

Also, organic superconducting materials which has received a great deal of attention can be used for embodying the present invention.

While a description has been made for several embodiments, the present invention should be limited only by the appended claims and should not be limited by the particular examples. For example, the present invention can be applied for MIS FETs, bipolar semicondutor devices, VLSIs or USLIs.